公开(公告)号：US20200161223A1

公开(公告)日：2020-05-21

申请号：US16748020

申请日：2020-01-21

申请人： Lapis Semiconductor Co., Ltd.

发明人： Masamichi Ishihara

IPC分类号： H01L23/48 ,  H01L29/78 ,  H01L23/498 ,  H01L23/00 ,  H01L23/31 ,  H01L25/04 ,  H01L25/065 ,  H01L23/488

摘要： A thin stacked semiconductor device has a plurality of circuits that are laminated and formed sequentially in a specified pattern to form a multilayer wiring part. At the stage for forming the multilayer wiring part, a filling electrode is formed on the semiconductor substrate such that the surface is covered with an insulating film, a post electrode is formed on specified wiring at the multilayer wiring part, a first insulating layer is formed on one surface of the semiconductor substrate, the surface of the first insulating layer is removed by a specified thickness to expose the post electrode, and the other surface of the semiconductor substrate is ground to expose the filling electrode and to form a through-type electrode. A second insulating layer is formed on one surface of the semiconductor substrate while exposing the forward end of the through-type electrode, and bump electrodes are formed on both electrodes.

公开(公告)号：US10199310B2

公开(公告)日：2019-02-05

申请号：US15852388

申请日：2017-12-22

申请人： Lapis Semiconductor Co., Ltd.

发明人： Masamichi Ishihara

IPC分类号： H01L23/00 ,  H01L23/48 ,  H01L23/488 ,  H01L25/065 ,  H01L25/04 ,  H01L23/31 ,  H01L23/498 ,  H01L29/78

摘要： A thin stacked semiconductor device has a plurality of circuits that are laminated and formed sequentially in a specified pattern to form a multilayer wiring part. At the stage for forming the multilayer wiring part, a filling electrode is formed on the semiconductor substrate such that the surface is covered with an insulating film, a post electrode is formed on specified wiring at the multilayer wiring part, a first insulating layer is formed on one surface of the semiconductor substrate, the surface of the first insulating layer is removed by a specified thickness to expose the post electrode, and the other surface of the semiconductor substrate is ground to expose the filling electrode and to form a through-type electrode. A second insulating layer is formed on one surface of the semiconductor substrate while exposing the forward end of the through-type electrode, and bump electrodes are formed on both electrodes.

公开(公告)号：US09559041B2

公开(公告)日：2017-01-31

申请号：US14743103

申请日：2015-06-18

申请人： Lapis Semiconductor Co., Ltd.

发明人： Masamichi Ishihara

IPC分类号： H01L23/00 ,  H01L23/48 ,  H01L23/488 ,  H01L25/065 ,  H01L25/04 ,  H01L23/31

CPC分类号： H01L23/481 ,  H01L23/3157 ,  H01L23/48 ,  H01L23/488 ,  H01L23/49838 ,  H01L24/13 ,  H01L25/04 ,  H01L25/0652 ,  H01L25/0657 ,  H01L29/78 ,  H01L2224/0554 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05684 ,  H01L2224/13025 ,  H01L2224/1403 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/17181 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/01327 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/013 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A thin stacked semiconductor device has a plurality of circuits that are laminated and formed sequentially in a specified pattern to form a multilayer wiring part. At the stage for forming the multilayer wiring part, a filling electrode is formed on the semiconductor substrate such that the surface is covered with an insulating film, a post electrode is formed on specified wiring at the multilayer wiring part, a first insulating layer is formed on one surface of the semiconductor substrate, the surface of the first insulating layer is removed by a specified thickness to expose the post electrode, and the other surface of the semiconductor substrate is ground to expose the filling electrode and to form a through-type electrode. A second insulating layer if formed on one surface of the semiconductor substrate while exposing the forward end of the through-type electrode, and bump electrodes are formed on both electrodes.

摘要翻译： 薄堆叠半导体器件具有多个电路，其以指定图案依次层叠并形成以形成多层布线部。 在形成多层布线部的阶段，在半导体基板上形成填充电极，使得表面被绝缘膜覆盖，在多层布线部的特定布线上形成柱状电极，形成第一绝缘层 在半导体衬底的一个表面上，将第一绝缘层的表面去除特定厚度以暴露后电极，并且研磨半导体衬底的另一个表面以露出填充电极并形成通孔型电极 。 如果形成在半导体衬底的一个表面上同时暴露通孔型电极的前端的第二绝缘层，并且在两个电极上形成凸块电极。

公开(公告)号：US10559521B2

公开(公告)日：2020-02-11

申请号：US16224846

申请日：2018-12-19

申请人： Lapis Semiconductor Co., Ltd.

发明人： Masamichi Ishihara

IPC分类号： H01L23/48 ,  H01L23/488 ,  H01L25/065 ,  H01L25/04 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L29/78

摘要： A thin stacked semiconductor device has a plurality of circuits that are laminated and formed sequentially in a specified pattern to form a multilayer wiring part. At the stage for forming the multilayer wiring part, a filling electrode is formed on the semiconductor substrate such that the surface is covered with an insulating film, a post electrode is formed on specified wiring at the multilayer wiring part, a first insulating layer is formed on one surface of the semiconductor substrate, the surface of the first insulating layer is removed by a specified thickness to expose the post electrode, and the other surface of the semiconductor substrate is ground to expose the filling electrode and to form a through-type electrode. A second insulating layer is formed on one surface of the semiconductor substrate while exposing the forward end of the through-type electrode, and bump electrodes are formed on both electrodes.

公开(公告)号：US20190122961A1

公开(公告)日：2019-04-25

申请号：US16224846

申请日：2018-12-19

申请人： Lapis Semiconductor Co., Ltd.

发明人： Masamichi Ishihara

IPC分类号： H01L23/48 ,  H01L29/78 ,  H01L25/065 ,  H01L23/488 ,  H01L25/04 ,  H01L23/31 ,  H01L23/00 ,  H01L23/498

CPC分类号： H01L23/481 ,  H01L23/3157 ,  H01L23/48 ,  H01L23/488 ,  H01L23/49838 ,  H01L24/13 ,  H01L25/04 ,  H01L25/0652 ,  H01L25/0657 ,  H01L29/78 ,  H01L2224/0554 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05684 ,  H01L2224/13025 ,  H01L2224/1403 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/17181 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/01327 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/013 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A thin stacked semiconductor device has a plurality of circuits that are laminated and formed sequentially in a specified pattern to form a multilayer wiring part. At the stage for forming the multilayer wiring part, a filling electrode is formed on the semiconductor substrate such that the surface is covered with an insulating film, a post electrode is formed on specified wiring at the multilayer wiring part, a first insulating layer is formed on one surface of the semiconductor substrate, the surface of the first insulating layer is removed by a specified thickness to expose the post electrode, and the other surface of the semiconductor substrate is ground to expose the filling electrode and to form a through-type electrode. A second insulating layer is formed on one surface of the semiconductor substrate while exposing the forward end of the through-type electrode, and bump electrodes are formed on both electrodes.

公开(公告)号：US20170103938A1

公开(公告)日：2017-04-13

申请号：US15384658

申请日：2016-12-20

申请人： Lapis Semiconductor Co., Ltd.

发明人： Masamichi Ishihara

IPC分类号： H01L23/48 ,  H01L29/78 ,  H01L25/065 ,  H01L23/498 ,  H01L23/31 ,  H01L23/00

CPC分类号： H01L23/481 ,  H01L23/3157 ,  H01L23/48 ,  H01L23/488 ,  H01L23/49838 ,  H01L24/13 ,  H01L25/04 ,  H01L25/0652 ,  H01L25/0657 ,  H01L29/78 ,  H01L2224/0554 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05684 ,  H01L2224/13025 ,  H01L2224/1403 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/17181 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/01327 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/013 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A thin stacked semiconductor device has a plurality of circuits that are laminated and formed sequentially in a specified pattern to form a multilayer wiring part. At the stage for forming the multilayer wiring part, a filling electrode is formed on the semiconductor substrate such that the surface is covered with an insulating film, a post electrode is formed on specified wiring at the multilayer wiring part, a first insulating layer is formed on one surface of the semiconductor substrate, the surface of the first insulating layer is removed by a specified thickness to expose the post electrode, and the other surface of the semiconductor substrate is ground to expose the filling electrode and to form a through-type electrode. A second insulating layer is formed on one surface of the semiconductor substrate while exposing the forward end of the through-type electrode, and bump electrodes are formed on both electrodes.

公开(公告)号：US20150287663A1

公开(公告)日：2015-10-08

申请号：US14743103

申请日：2015-06-18

申请人： Lapis Semiconductor Co., Ltd.

发明人： Masamichi Ishihara

IPC分类号： H01L23/48 ,  H01L23/00 ,  H01L23/31

CPC分类号： H01L23/481 ,  H01L23/3157 ,  H01L23/48 ,  H01L23/488 ,  H01L23/49838 ,  H01L24/13 ,  H01L25/04 ,  H01L25/0652 ,  H01L25/0657 ,  H01L29/78 ,  H01L2224/0554 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05684 ,  H01L2224/13025 ,  H01L2224/1403 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/17181 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/01327 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/013 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A thin stacked semiconductor device has a plurality of circuits that are laminated and formed sequentially in a specified pattern to form a multilayer wiring part. At the stage for forming the multilayer wiring part, a filling electrode is formed on the semiconductor substrate such that the surface is covered with an insulating film, a post electrode is formed on specified wiring at the multilayer wiring part, a first insulating layer is formed on one surface of the semiconductor substrate, the surface of the first insulating layer is removed by a specified thickness to expose the post electrode, and the other surface of the semiconductor substrate is ground to expose the filling electrode and to form a through-type electrode. A second insulating layer if formed on one surface of the semiconductor substrate while exposing the forward end of the through-type electrode, and bump electrodes are formed on both electrodes.

摘要翻译： 薄堆叠半导体器件具有多个电路，其以指定图案依次层叠并形成以形成多层布线部。 在形成多层布线部的阶段，在半导体基板上形成填充电极，使得表面被绝缘膜覆盖，在多层布线部的特定布线上形成柱状电极，形成第一绝缘层 在半导体衬底的一个表面上，将第一绝缘层的表面去除特定厚度以暴露后电极，并且研磨半导体衬底的另一个表面以露出填充电极并形成通孔型电极 。 如果形成在半导体衬底的一个表面上同时暴露通孔型电极的前端的第二绝缘层，并且在两个电极上形成凸块电极。

公开(公告)号：US09093431B2

公开(公告)日：2015-07-28

申请号：US14157093

申请日：2014-01-16

申请人： Lapis Semiconductor Co., Ltd.

发明人： Masamichi Ishihara

IPC分类号： H01L23/02 ,  H01L23/48 ,  H01L23/488 ,  H01L25/065 ,  H01L25/04

CPC分类号： H01L23/481 ,  H01L23/3157 ,  H01L23/48 ,  H01L23/488 ,  H01L23/49838 ,  H01L24/13 ,  H01L25/04 ,  H01L25/0652 ,  H01L25/0657 ,  H01L29/78 ,  H01L2224/0554 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05684 ,  H01L2224/13025 ,  H01L2224/1403 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/17181 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/01327 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/013 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A thin stacked semiconductor device has a plurality of circuits that are laminated and formed sequentially in a specified pattern to form a multilayer wiring part. At the stage for forming the multilayer wiring part, a filling electrode is formed on the semiconductor substrate such that the surface is covered with an insulating film, a post electrode is formed on specified wiring at the multilayer wiring part, a first insulating layer is formed on one surface of the semiconductor substrate, the surface of the first insulating layer is removed by a specified thickness to expose the post electrode, and the other surface of the semiconductor substrate is ground to expose the filling electrode and to form a through-type electrode. A second insulating layer if formed on one surface of the semiconductor substrate while exposing the forward end of the through-type electrode, and bump electrodes are formed on both electrodes.

摘要翻译： 薄堆叠半导体器件具有多个电路，其以指定图案依次层叠并形成以形成多层布线部。 在形成多层布线部的阶段，在半导体基板上形成填充电极，使得表面被绝缘膜覆盖，在多层布线部的特定布线上形成柱状电极，形成第一绝缘层 在半导体衬底的一个表面上，将第一绝缘层的表面去除特定厚度以暴露后电极，并且研磨半导体衬底的另一个表面以露出填充电极并形成通孔型电极 。 如果形成在半导体衬底的一个表面上同时暴露通孔型电极的前端的第二绝缘层，并且在两个电极上形成凸块电极。

公开(公告)号：US11127657B2

公开(公告)日：2021-09-21

申请号：US16748020

申请日：2020-01-21

申请人： Lapis Semiconductor Co., Ltd.

发明人： Masamichi Ishihara

IPC分类号： H01L23/48 ,  H01L23/488 ,  H01L25/065 ,  H01L25/04 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L29/78

摘要： A thin stacked semiconductor device has a plurality of circuits that are laminated and formed sequentially in a specified pattern to form a multilayer wiring part. At the stage for forming the multilayer wiring part, a filling electrode is formed on the semiconductor substrate such that the surface is covered with an insulating film, a post electrode is formed on specified wiring at the multilayer wiring part, a first insulating layer is formed on one surface of the semiconductor substrate, the surface of the first insulating layer is removed by a specified thickness to expose the post electrode, and the other surface of the semiconductor substrate is ground to expose the filling electrode and to form a through-type electrode. A second insulating layer is formed on one surface of the semiconductor substrate while exposing the forward end of the through-type electrode, and bump electrodes are formed on both electrodes.

公开(公告)号：US20140131891A1

公开(公告)日：2014-05-15

申请号：US14157093

申请日：2014-01-16

申请人： Lapis Semiconductor Co., Ltd.

发明人： Masamichi Ishihara

IPC分类号： H01L23/48 ,  H01L25/04

CPC分类号： H01L23/481 ,  H01L23/3157 ,  H01L23/48 ,  H01L23/488 ,  H01L23/49838 ,  H01L24/13 ,  H01L25/04 ,  H01L25/0652 ,  H01L25/0657 ,  H01L29/78 ,  H01L2224/0554 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05684 ,  H01L2224/13025 ,  H01L2224/1403 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/17181 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/01327 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/013 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A thin stacked semiconductor device has a plurality of circuits that are laminated and formed sequentially in a specified pattern to form a multilayer wiring part. At the stage for forming the multilayer wiring part, a filling electrode is formed on the semiconductor substrate such that the surface is covered with an insulating film, a post electrode is formed on specified wiring at the multilayer wiring part, a first insulating layer is formed on one surface of the semiconductor substrate, the surface of the first insulating layer is removed by a specified thickness to expose the post electrode, and the other surface of the semiconductor substrate is ground to expose the filling electrode and to form a through-type electrode. A second insulating layer if formed on one surface of the semiconductor substrate while exposing the forward end of the through-type electrode, and bump electrodes are formed on both electrodes.

摘要翻译： 薄堆叠半导体器件具有多个电路，其以指定图案依次层叠并形成以形成多层布线部。 在形成多层布线部的阶段，在半导体基板上形成填充电极，使得表面被绝缘膜覆盖，在多层布线部的特定布线上形成柱状电极，形成第一绝缘层 在半导体衬底的一个表面上，将第一绝缘层的表面去除特定厚度以暴露后电极，并且研磨半导体衬底的另一个表面以露出填充电极并形成通孔型电极 。 如果形成在半导体衬底的一个表面上同时暴露通孔型电极的前端的第二绝缘层，并且在两个电极上形成凸块电极。