公开(公告)号：US20050156777A1

公开(公告)日：2005-07-21

申请号：US10761931

申请日：2004-01-15

申请人： Larry King ,  James Jones

发明人： Larry King ,  James Jones

IPC分类号： G01S3/02 ,  G01S13/78 ,  G01S13/93 ,  G08G5/04

CPC分类号： G08G5/0008 ,  G01S3/023 ,  G01S13/9303 ,  G08G5/0021 ,  G08G5/0052 ,  G08G5/0078

摘要： An apparatus and method for combining the functionality of multiple airborne traffic surveillance systems that operate in the L-band frequency range. The apparatus and method combine the functionality of both a Traffic Alert Collision Avoidance System (TCAS) and a Mode-Select (Mode-S) transponder in an integrated L-band traffic surveillance apparatus having a single processor that is embodied in a single Line Replaceable Unit.

摘要翻译： 一种用于组合在L波段频率范围内工作的多个机载交通监视系统的功能的装置和方法。 该装置和方法将具有单个处理器的集成的L波段交通监视装置中的交通警报冲突避免系统（TCAS）和模式选择（Mode-S）应答器的功能结合在一体的单个可替换线路 单元。

公开(公告)号：US5812334A

公开(公告)日：1998-09-22

申请号：US210302

申请日：1994-03-16

申请人： Richard T. Behrens ,  Kent D. Anderson ,  Alan Armstrong ,  Trent Dudley ,  Bill Foland ,  Neal Glover ,  Larry King

发明人： Richard T. Behrens ,  Kent D. Anderson ,  Alan Armstrong ,  Trent Dudley ,  Bill Foland ,  Neal Glover ,  Larry King

IPC分类号： G11B5/012 ,  G11B5/09 ,  G11B20/10 ,  G11B20/12 ,  G11B20/14 ,  G11B20/18 ,  G11B27/30 ,  H03M13/31

CPC分类号： G11B20/10055 ,  G11B20/10 ,  G11B20/10009 ,  G11B20/1403 ,  G11B20/1426 ,  G11B20/18 ,  G11B27/3027 ,  G11B5/012 ,  G11B5/09 ,  H03M13/31 ,  G11B20/1258 ,  G11B2020/1476

摘要： A synchronous read channel having a single chip integrated circuit digital portion which provides digital gain control, timing recovery, equalization, digital peak detection, sequence detection, RLL(1,7) encoding and decoding, error-tolerant synchronization and channel quality measurement is disclosed. The integrated circuit accommodates both center sampling and side sampling, and has a high degree of programmability of various pulse shaping and recovery parameters and the ability to provide decoded data using sequence detection or digital peak detection. These characteristics, together with the error-tolerant sync mark detection and the ability to recover data when the sync mark is obliterated, allow a wide variety of retry and recovery strategies to maximize the possibility of data recovery. Various embodiments, including an embodiment incorporating the analog functions as well as the primary digital functions of the read channel in a single integrated circuit, and preferred embodiments utilizing a reduced complexity, programmable modified Viterbi detector supporting a broad class of partial response channels are disclosed.

摘要翻译： 公开了具有提供数字增益控制，定时恢复，均衡，数字峰值检测，序列检测，RLL（1,7）编码和解码，容错同步和信道质量测量的单芯片集成电路数字部分的同步读通道 。 集成电路既适用于中心采样和侧采样，又具有各种脉冲整形和恢复参数的高度可编程性，以及使用序列检测或数字峰值检测提供解码数据的能力。 这些特征以及容错同步标记检测以及当同步标记被消除时恢复数据的能力允许各种各样的重试和恢复策略以最大化数据恢复的可能性。 公开了包括在单个集成电路中并入模拟功能以及读取通道的主要数字功能的实施例的各种实施例，以及利用支持大类部分响应通道的降低复杂度的可编程修改维特比检测器的优选实施例。

公开(公告)号：US20110225588A1

公开(公告)日：2011-09-15

申请号：US12975823

申请日：2010-12-22

申请人： Steven Pollock ,  William Burroughs ,  Deepak Mital ,  Te Khac Ma ,  Narender Vangati ,  Larry King

发明人： Steven Pollock ,  William Burroughs ,  Deepak Mital ,  Te Khac Ma ,  Narender Vangati ,  Larry King

IPC分类号： G06F9/46

CPC分类号： G06F15/167 ,  G06F9/32 ,  G06F9/3851 ,  G06F9/3885 ,  G06F9/46 ,  G06F12/10 ,  H04L12/56 ,  H04L47/2441

摘要： Described embodiments provide address translation for data stored in at least one shared memory of a network processor. A processing module of the network processor generates tasks corresponding to each of a plurality of received packets. A packet classifier generates contexts for each task, each context associated with a thread of instructions to apply to the corresponding packet. A first subset of instructions is stored in a tree memory within the at least one shared memory. A second subset of instructions is stored in a cache within a multi-thread engine of the packet classifier. The multi-thread engine maintains status indicators corresponding to the first and second subsets of instructions within the cache and the tree memory and, based on the status indicators, accesses a lookup table while processing a thread to translate between an instruction number and a physical address of the instruction in the first and second subset of instructions.

摘要翻译： 描述的实施例为存储在网络处理器的至少一个共享存储器中的数据提供地址转换。 网络处理器的处理模块生成与多个接收到的分组中的每一个对应的任务。 分组分类器为每个任务生成上下文，每个上下文与指令线程相关联以应用于相应的分组。 指令的第一子集被存储在所述至少一个共享存储器内的树存储器中。 指令的第二子集存储在分组分类器的多线程引擎内的高速缓存中。 多线程引擎保持与高速缓存和树存储器中的第一和第二指令子集相对应的状态指示符，并且基于状态指示符，在处理线程以在指令数和物理地址之间转换时，访问查找表 在指令的第一和第二子集中的指令。

公开(公告)号：US5415284A

公开(公告)日：1995-05-16

申请号：US135179

申请日：1993-10-12

申请人： Larry King

发明人： Larry King

IPC分类号： A63B55/00 ,  A63B55/04 ,  A63B55/08 ,  A63B55/06

CPC分类号： A63B55/00 ,  A63B2055/403 ,  A63B55/408 ,  A63B55/50 ,  A63B55/60 ,  Y10S280/06

摘要： A carrying case for golf clubs is described which includes two rigid housing sections hingedly connected along abutting edges. Each housing section can support several golf clubs in an upright, spaced-apart manner. The housing sections can pivot between open and closed positions. The case also includes a handle for carrying purposes. The golf clubs are prevented from contacting each other while being carried.

摘要翻译： 描述了一种用于高尔夫球杆的手提箱，其包括沿邻接边缘铰接连接的两个刚性壳体部分。 每个外壳部分可以直立，间隔开的方式支撑多个高尔夫球杆。 壳体部分可在打开位置和闭合位置之间枢转。 该情况还包括用于携带目的的手柄。 防止高尔夫球杆携带时彼此接触。

公开(公告)号：US06205253B1

公开(公告)日：2001-03-20

申请号：US08974417

申请日：1997-11-19

申请人： Larry King

发明人： Larry King

IPC分类号： G06K936

CPC分类号： G10L19/04 ,  G06T9/001 ,  H04N19/23 ,  H04N19/51 ,  H04N19/543 ,  H04N21/2368 ,  H04N21/4341

摘要： Methods and apparatus for reducing the bandwidth required to transmit analog information. The analog information is converted to digital data organized in time defined blocks of information called frames. The content of a frame may be modeled as a composite of superimposed objects, which are subsets of information in the frame, that are largely unchanged frame to frame. Each object in a present frame may be represented by an identification of the object and a description of the charges in object-to-frame relationship that occurred from a previous frame to the present frame. The objects in the present frame may then be reconstructed by adjusting the objects in the previous frame in accordance with the change in object-to-frame relationships.

摘要翻译： 减少传输模拟信息所需带宽的方法和装置。 模拟信息被转换为以时间定义的称为帧的信息块组织的数字数据。 帧的内容可以被建模为叠加对象的组合，叠加对象是帧中的信息子集，其基本上是帧到帧不变的。 当前帧中的每个对象可以由对象的标识和从先前帧到当前帧发生的以对象到帧的关系的费用的描述来表示。 然后可以根据对象到帧之间关系的改变，通过调整前一帧中的对象来重建当前帧中的对象。

公开(公告)号：US5424881A

公开(公告)日：1995-06-13

申请号：US12266

申请日：1993-02-01

申请人： Richard T. Behrens ,  Kent D. Anderson ,  Alan Armstrong ,  Trent Dudley ,  Bill Foland ,  Neal Glover ,  Larry King

发明人： Richard T. Behrens ,  Kent D. Anderson ,  Alan Armstrong ,  Trent Dudley ,  Bill Foland ,  Neal Glover ,  Larry King

IPC分类号： G11B5/012 ,  G11B5/09 ,  G11B20/10 ,  G11B20/12 ,  G11B20/14 ,  G11B20/18 ,  G11B27/30 ,  H03M13/31 ,  G06F11/10 ,  G11B20/16

CPC分类号： G11B20/10055 ,  G11B20/10 ,  G11B20/10009 ,  G11B20/1403 ,  G11B20/1426 ,  G11B20/18 ,  G11B27/3027 ,  G11B5/012 ,  G11B5/09 ,  H03M13/31 ,  G11B20/1258 ,  G11B2020/1476

摘要： A synchronous read channel having a single chip integrated circuit digital portion which provides digital gain control, timing recovery, equalization, digital peak detection, sequence detection, RLL(1,7) encoding and decoding, error-tolerant synchronization and channel quality measurement is disclosed. The integrated circuit accommodates both center sampling and side sampling, and has a high degree of programmability of various pulse shaping and recovery parameters and the ability to provide decoded data using sequence detection or digital peak detection. These characteristics, together with the error-tolerant sync mark detection and the ability to recover data when the sync mark is obliterated, allow a wide variety of retry and recovery strategies to maximize the possibility of data recovery. Various embodiments, including an embodiment incorporating the analog functions as well as the primary digital functions of the read channel in a single integrated circuit, and preferred embodiments utilizing a reduced complexity, programmable modified Viterbi detector supporting a broad class of partial response channels are disclosed.

公开(公告)号：US06343151B1

公开(公告)日：2002-01-29

申请号：US09669687

申请日：2000-09-26

申请人： Larry King

发明人： Larry King

IPC分类号： G06K936

CPC分类号： G10L19/04 ,  G06T9/001 ,  H04N19/23 ,  H04N19/51 ,  H04N19/543 ,  H04N21/2368 ,  H04N21/4341

摘要： Methods and apparatus for reducing the bandwidth required to transmit analog information. The analog information is converted to digital data organized in time defined blocks of information called frames. The content of a frame may be modeled as a composite of superimposed objects, which are subsets of information in the frame, that are largely unchanged frame to frame. Each object in a present frame may be represented by an identification of the object and a description of the changes in object-to-frame relationship that occurred from a previous frame to the present frame. The objects in the present frame may then be reconscructed by adjusting the objects in the previous frame in accordance with the change in object-to-frame relationships.

摘要翻译： 减少传输模拟信息所需带宽的方法和装置。 模拟信息被转换为以时间定义的称为帧的信息块组织的数字数据。 帧的内容可以被建模为叠加对象的组合，叠加对象是帧中的信息子集，其基本上是帧到帧不变的。 当前帧中的每个对象可以由对象的标识和从先前帧到当前帧发生的对象到帧之间关系的改变的描述来表示。 然后，可以根据对象到帧之间的关系的变化来调整当前帧中的对象，以通过调整前一帧中的对象来重新生成。

公开(公告)号：US5351231A

公开(公告)日：1994-09-27

申请号：US868011

申请日：1992-04-13

申请人： Larry King ,  Trent Dudley ,  Roger McPherson

发明人： Larry King ,  Trent Dudley ,  Roger McPherson

IPC分类号： G11B7/005 ,  G11B20/12 ,  G11B20/14 ,  G11B20/18 ,  G11B27/30 ,  H03M13/00 ,  H03M13/09 ,  G11B7/00

CPC分类号： G11B27/3027 ,  G11B20/12 ,  G11B20/1403 ,  G11B20/1809 ,  G11B20/1816 ,  G11B20/1833 ,  G11B7/005 ,  G11B2220/20

摘要： Described in detail herein are the detection and windowing capabilities of the present invention which are critical for reading correct data in normal operations and recovering data during error conditions. Also described herein are the various programmable features of the detection windows of the invention. The flexibility of these features allows the designer to optimize the optical controller for the unique requirements of the particular optical drive and medium in use.

摘要翻译： 这里详细描述的是本发明的检测和加窗能力，其在正常操作中读取正确的数据以及在错误状态期间恢复数据至关重要。 本文还描述了本发明的检测窗口的各种可编程特征。 这些功能的灵活性允许设计人员针对特定光驱和使用介质的独特要求优化光学控制器。

公开(公告)号：US20210213817A1

公开(公告)日：2021-07-15

申请号：US16742713

申请日：2020-01-14

申请人： Larry King

发明人： Larry King

IPC分类号： B60J11/02 ,  B60J11/04

摘要： An illustrated side view of an exemplary automated car cover device is presented. The automated car cover device is useful for providing a safe and efficient method for covering a car to prevent an exterior of the car from being damaged by the elements, debris, scratches, animals, etc. The automated car cover device further is useful for providing a covering of the car which can be completed by a solo person without being overwhelmed by the size, weight and bulk of the covering. The automated car cover device also provides an easy storage for the covering which can be attached to a hitch of the car or placed on the ground. The device is a canister that houses a reel and a cover. A motor of the device provides the power to extend or retract that cover by rotation of the reel.

公开(公告)号：US08505013B2

公开(公告)日：2013-08-06

申请号：US12975823

申请日：2010-12-22

申请人： Steven Pollock ,  William Burroughs ,  Deepak Mital ,  Te Khac Ma ,  Narender Vangati ,  Larry King

发明人： Steven Pollock ,  William Burroughs ,  Deepak Mital ,  Te Khac Ma ,  Narender Vangati ,  Larry King

IPC分类号： G06F9/46 ,  G06F12/06

CPC分类号： G06F15/167 ,  G06F9/32 ,  G06F9/3851 ,  G06F9/3885 ,  G06F9/46 ,  G06F12/10 ,  H04L12/56 ,  H04L47/2441

摘要： Described embodiments provide address translation for data stored in at least one shared memory of a network processor. A processing module of the network processor generates tasks corresponding to each of a plurality of received packets. A packet classifier generates contexts for each task, each context associated with a thread of instructions to apply to the corresponding packet. A first subset of instructions is stored in a tree memory within the at least one shared memory. A second subset of instructions is stored in a cache within a multi-thread engine of the packet classifier. The multi-thread engine maintains status indicators corresponding to the first and second subsets of instructions within the cache and the tree memory and, based on the status indicators, accesses a lookup table while processing a thread to translate between an instruction number and a physical address of the instruction in the first and second subset of instructions.

摘要翻译： 描述的实施例为存储在网络处理器的至少一个共享存储器中的数据提供地址转换。 网络处理器的处理模块生成与多个接收到的分组中的每一个对应的任务。 分组分类器为每个任务生成上下文，每个上下文与指令线程相关联以应用于相应的分组。 指令的第一子集被存储在所述至少一个共享存储器内的树存储器中。 指令的第二子集存储在分组分类器的多线程引擎内的高速缓存中。 多线程引擎保持与高速缓存和树存储器中的第一和第二指令子集相对应的状态指示符，并且基于状态指示符，在处理线程以在指令数和物理地址之间转换时，访问查找表 在指令的第一和第二子集中的指令。