摘要:
A synchronous read channel having a single chip integrated circuit digital portion which provides digital gain control, timing recovery, equalization, digital peak detection, sequence detection, RLL(1,7) encoding and decoding, error-tolerant synchronization and channel quality measurement is disclosed. The integrated circuit accommodates both center sampling and side sampling, and has a high degree of programmability of various pulse shaping and recovery parameters and the ability to provide decoded data using sequence detection or digital peak detection. These characteristics, together with the error-tolerant sync mark detection and the ability to recover data when the sync mark is obliterated, allow a wide variety of retry and recovery strategies to maximize the possibility of data recovery. Various embodiments, including an embodiment incorporating the analog functions as well as the primary digital functions of the read channel in a single integrated circuit, and preferred embodiments utilizing a reduced complexity, programmable modified Viterbi detector supporting a broad class of partial response channels are disclosed.
摘要:
A synchronous read channel having a single chip integrated circuit digital portion which provides digital gain control, timing recovery, equalization, digital peak detection, sequence detection, RLL(1,7) encoding and decoding, error-tolerant synchronization and channel quality measurement is disclosed. The integrated circuit accommodates both center sampling and side sampling, and has a high degree of programmability of various pulse shaping and recovery parameters and the ability to provide decoded data using sequence detection or digital peak detection. These characteristics, together with the error-tolerant sync mark detection and the ability to recover data when the sync mark is obliterated, allow a wide variety of retry and recovery strategies to maximize the possibility of data recovery. Various embodiments, including an embodiment incorporating the analog functions as well as the primary digital functions of the read channel in a single integrated circuit, and preferred embodiments utilizing a reduced complexity, programmable modified Viterbi detector supporting a broad class of partial response channels are disclosed.
摘要:
Apparatus and methods are disclosed for providing an improved system for identifying the location and value of errors introduced in binary data encoded using Reed-Solomon and related codes and to detect miscorrections of such codes with an auxiliary code. The invention employs an architecture based on a microcode engine that is specialized for error identification and that supports interleaved codewords. This architecture can be efficiently fabricated as an integrated circuit, yet is capable of identifying multiple introduced errors "on the fly" i.e. with performance sufficient to not significantly slow the process of reading from data storage or transmission subsystems such as, but not limited to, optical disks. In the preferred embodiment, a new two-step method of error syndrome computation is employed to reduce circuit cost and complexity. An improved iterative algorithm is provided which reduces circuit cost and complexity and decreases the time required to generate the error locator polynomial. Cyclic redundancy check (CRC) information is adjusted as introduced errors are identified during the Chien search, thus reducing the time required to protect against ECC miscorrection. Externally-specified error thresholds allow detection of excessive numbers of errors.
摘要:
Described in detail herein are the detection and windowing capabilities of the present invention which are critical for reading correct data in normal operations and recovering data during error conditions. Also described herein are the various programmable features of the detection windows of the invention. The flexibility of these features allows the designer to optimize the optical controller for the unique requirements of the particular optical drive and medium in use.
摘要:
Described embodiments provide address translation for data stored in at least one shared memory of a network processor. A processing module of the network processor generates tasks corresponding to each of a plurality of received packets. A packet classifier generates contexts for each task, each context associated with a thread of instructions to apply to the corresponding packet. A first subset of instructions is stored in a tree memory within the at least one shared memory. A second subset of instructions is stored in a cache within a multi-thread engine of the packet classifier. The multi-thread engine maintains status indicators corresponding to the first and second subsets of instructions within the cache and the tree memory and, based on the status indicators, accesses a lookup table while processing a thread to translate between an instruction number and a physical address of the instruction in the first and second subset of instructions.
摘要:
A carrying case for golf clubs is described which includes two rigid housing sections hingedly connected along abutting edges. Each housing section can support several golf clubs in an upright, spaced-apart manner. The housing sections can pivot between open and closed positions. The case also includes a handle for carrying purposes. The golf clubs are prevented from contacting each other while being carried.
摘要:
Methods and apparatus for reducing the bandwidth required to transmit analog information. The analog information is converted to digital data organized in time defined blocks of information called frames. The content of a frame may be modeled as a composite of superimposed objects, which are subsets of information in the frame, that are largely unchanged frame to frame. Each object in a present frame may be represented by an identification of the object and a description of the charges in object-to-frame relationship that occurred from a previous frame to the present frame. The objects in the present frame may then be reconstructed by adjusting the objects in the previous frame in accordance with the change in object-to-frame relationships.
摘要:
An apparatus and method for combining the functionality of multiple airborne traffic surveillance systems that operate in the L-band frequency range. The apparatus and method combine the functionality of both a Traffic Alert Collision Avoidance System (TCAS) and a Mode-Select (Mode-S) transponder in an integrated L-band traffic surveillance apparatus having a single processor that is embodied in a single Line Replaceable Unit.
摘要:
Methods and apparatus for reducing the bandwidth required to transmit analog information. The analog information is converted to digital data organized in time defined blocks of information called frames. The content of a frame may be modeled as a composite of superimposed objects, which are subsets of information in the frame, that are largely unchanged frame to frame. Each object in a present frame may be represented by an identification of the object and a description of the changes in object-to-frame relationship that occurred from a previous frame to the present frame. The objects in the present frame may then be reconscructed by adjusting the objects in the previous frame in accordance with the change in object-to-frame relationships.
摘要:
An illustrated side view of an exemplary automated car cover device is presented. The automated car cover device is useful for providing a safe and efficient method for covering a car to prevent an exterior of the car from being damaged by the elements, debris, scratches, animals, etc. The automated car cover device further is useful for providing a covering of the car which can be completed by a solo person without being overwhelmed by the size, weight and bulk of the covering. The automated car cover device also provides an easy storage for the covering which can be attached to a hitch of the car or placed on the ground. The device is a canister that houses a reel and a cover. A motor of the device provides the power to extend or retract that cover by rotation of the reel.