公开(公告)号：US5773132A

公开(公告)日：1998-06-30

申请号：US808141

申请日：1997-02-28

申请人： Lawrence Robert Blumberg ,  William T. Chen ,  Mark David Poliks

发明人： Lawrence Robert Blumberg ,  William T. Chen ,  Mark David Poliks

IPC分类号： H05K3/18 ,  H05K3/38 ,  H05K3/42 ,  H05K3/46 ,  B32B3/00

CPC分类号： H05K3/385 ,  H05K2203/0315 ,  H05K3/184 ,  H05K3/429 ,  H05K3/4644 ,  Y10S428/901 ,  Y10T428/24917 ,  Y10T428/31511

摘要： A method of minimizing forming of white spots and delamination of a copper plane bonded to one surface of a dielectric material following additive pattern plating of copper onto the other surface of the material and in vias contacting the copper plane utilizing a plating solution containing a reducing agent and the resulting product is provided. The surface of the copper which has been bonded to the one surface of the dielectric has been treated, preferably by a sodium chlorite treatment to form a chemical roughened surface of copper oxide (CuO and CuO(II)) on the copper. Prior to the bonding, the roughened surface of the copper oxide is treated with a solution such as benzotriazole, which complexes with the copper oxide to prevent formation of white spots and delamination as a result of such plating.

摘要翻译： 一种最小化形成白点的方法和在介电材料的一个表面上结合的铜平面的分层的方法，其特征在于，在所述材料的另一表面上的铜添加图案电镀之后，以及使用含有还原剂的镀液 并提供所得产品。 已经结合到电介质的一个表面的铜的表面已经被处理过，优选通过亚氯酸钠处理以在铜上形成氧化铜（CuO和CuO（II））的化学粗糙化表面。 在接合之前，氧化铜的粗糙化表面用诸如苯并三唑的溶液处理，苯并三唑与铜氧化物复合以防止由于这种电镀而形成白点和分层。

公开(公告)号：US06841026B2

公开(公告)日：2005-01-11

申请号：US10107112

申请日：2002-03-26

申请人： Lawrence Robert Blumberg ,  Robert Maynard Japp ,  William John Rudik ,  John Frank Surowka

发明人： Lawrence Robert Blumberg ,  Robert Maynard Japp ,  William John Rudik ,  John Frank Surowka

IPC分类号： B32B5/28 ,  H05K1/03 ,  B32B31/04

CPC分类号： B32B5/26 ,  B32B5/02 ,  B32B5/28 ,  B32B2260/023 ,  B32B2260/046 ,  B32B2262/101 ,  B32B2305/20 ,  B32B2553/00 ,  H05K1/036 ,  H05K1/0366 ,  H05K2201/029 ,  H05K2201/0293 ,  H05K2201/068 ,  Y10T29/4913 ,  Y10T442/2361 ,  Y10T442/2992 ,  Y10T442/3537 ,  Y10T442/3569 ,  Y10T442/3577 ,  Y10T442/3585 ,  Y10T442/3602 ,  Y10T442/3659

摘要： A simple, inexpensive, drillable, reduced CTE laminate and circuitized structures comprising the reduced CTE laminate, is provided. One embodiment of the reduced CTE laminate comprises: from about 40% to 75%, preferably from about 55% to 65%, by weight resin; from about 0.05% to 0.3%, preferably from about 0.08% to 0.10%, by weight curing agent; from about 25% to 60%, preferably from about 30% to 40%, by weight, woven cloth; from about 1% to 15%, preferably from about 5% to 10%, by volume, non-woven quartz mat. The method for making reduced CTE laminate and laminate structures comprises the following steps: providing non-woven quartz mat; providing a prepreg, preferably B-stage cured to not more than about 40%, preferably not more than 30% of full cure; sandwiching the non-woven quartz mat between two layers of prepreg, and reflowing the resin of the prepreg into the quartz mat.

摘要翻译： 提供了一种简单，便宜，可钻，减少的CTE层压板和包括减小的CTE层压板的电路结构。 还原的CTE层压体的一个实施方案包括：约40％至75％，优选约55％至65％的树脂; 约0.05％至0.3％，优选约0.08％至0.10％的固化剂; 约25％至60％，优选约30％至40％的织布; 约1％至15％，优选约5％至10％体积的无纺石英垫。 制造减薄的CTE层压板和层压结构的方法包括以下步骤：提供无纺石英垫; 提供预浸料，优选B阶固化至不超过完全固化的约40％，优选不超过30％; 将无纺石英垫夹在两层预浸料之间，并将预浸料坯的树脂回流到石英垫中。

公开(公告)号：US06586352B1

公开(公告)日：2003-07-01

申请号：US09693766

申请日：2000-10-20

申请人： Lawrence Robert Blumberg ,  Robert Maynard Japp ,  William John Rudik ,  John Frank Surowka

发明人： Lawrence Robert Blumberg ,  Robert Maynard Japp ,  William John Rudik ,  John Frank Surowka

IPC分类号： B32B2709

CPC分类号： B32B5/28 ,  H05K1/036 ,  H05K1/0366 ,  H05K2201/029 ,  H05K2201/0293 ,  H05K2201/068 ,  Y10T29/4913 ,  Y10T442/2361 ,  Y10T442/30 ,  Y10T442/3537 ,  Y10T442/3602

摘要： A simple, inexpensive, drillable, reduced CTE laminate and circuitized structure comprising the reduced CTE laminate, is provided. The reduced CTE laminate comprises: from about 40% to 75%, preferably from about 55% to 65%, by weight resin; from about 0.05% to 0.3%, preferably from about 0.08% to 0.10%, by weight curing agent; from about 25% to 60%, preferably from about 30% to 40%, by weight, woven cloth; from about 1% to 15%, preferably from about 5% to 10%, by volume, non-woven quartz mat. The present invention also generally relates to a method for reducing the CTE of circuitized structures, and to methods for making reduced CTE laminate and circuitized structures comprising reduced CTE laminate. The method for making reduced CTE laminate and laminate structures comprises the following steps: providing non-woven quartz mat; providing a prepreg, preferably B-stage cured to not more than about 40%, preferably not more than 30% of full cure; sandwiching the non-woven quartz mat between two layers of prepreg, and reflowing the resin of the prepreg into the quartz mat. The method further comprises providing a resin volume percent, woven glass cloth volume percent and metal volume percent of the circuitized structure to be fabricated; selecting a desired CTE for the circuitized structure to be fabricated; and determining the amount of non-woven quartz or non-woven glass mat to be incorporated according to a formula. Optionally, the reduced CTE laminate is sandwiched between two layers of metal, preferably copper.

摘要翻译： 提供了一种简单，便宜，可钻，减少的CTE层压板和包括减小的CTE层压板的电路结构。 减少的CTE层压材料包括：约40％至75％，优选约55％至65％的树脂; 约0.05％至0.3％，优选约0.08％至0.10％的固化剂; 约25％至60％，优选约30％至40％的织布; 约1％至15％，优选约5％至10％体积的无纺石英垫。 本发明还通常涉及一种用于减小电路化结构的CTE的方法，以及用于制造减少的CTE层压体和包括减少的CTE层压体的电路化结构的方法。 制造减薄的CTE层压板和层压结构的方法包括以下步骤：提供无纺石英垫; 提供预浸料，优选B阶固化至不超过完全固化的约40％，优选不超过30％; 将无纺石英垫夹在两层预浸料之间，并将预浸料坯的树脂回流到石英垫中。 该方法还包括提供待制造的电路化结构的树脂体积百分比，玻璃布体积百分比和金属体积百分比; 为要制造的电路化结构选择所需的CTE; 以及根据公式确定待掺入的无纺布石英或非织造玻璃垫的量。 任选地，还原的CTE层压体夹在两层金属之间，优选为铜。

公开(公告)号：US06485892B1

公开(公告)日：2002-11-26

申请号：US09465593

申请日：1999-12-17

申请人： Lawrence Robert Blumberg ,  Norman A. Card, Jr. ,  Richard Allen Day ,  Stephen J. Fuerniss ,  John Joseph Konrad ,  Jeffrey McKeveny ,  Timothy L. Wells

发明人： Lawrence Robert Blumberg ,  Norman A. Card, Jr. ,  Richard Allen Day ,  Stephen J. Fuerniss ,  John Joseph Konrad ,  Jeffrey McKeveny ,  Timothy L. Wells

IPC分类号： G03C556

CPC分类号： H05K3/0094 ,  H05K3/243 ,  H05K2201/0959 ,  H05K2203/0156 ,  H05K2203/066 ,  H05K2203/082 ,  H05K2203/1394

摘要： Through-holes in a substrate are masked during plating of the substrate by substantially filling the through-holes with a liquid material, followed by applying a photoimageable material to an external surface of the substrate, forming a predetermined pattern in the photoimageable material, circuitizing the predetermined pattern and then removing both the photoimageable material and the liquid material from the through-holes.

摘要翻译： 在基板的电镀期间，通过用液体材料基本上填充通孔来掩蔽衬底中的通孔，然后将光可成像材料施加到衬底的外表面，在可光成象的材料中形成预定的图案， 然后从通孔中除去可光成像材料和液体材料。

公开(公告)号：US6136733A

公开(公告)日：2000-10-24

申请号：US874902

申请日：1997-06-13

申请人： Lawrence Robert Blumberg ,  Robert Maynard Japp ,  William John Rudik ,  John Frank Surowka

发明人： Lawrence Robert Blumberg ,  Robert Maynard Japp ,  William John Rudik ,  John Frank Surowka

IPC分类号： B32B5/28 ,  H05K1/03 ,  B32B5/26 ,  C09J5/02

CPC分类号： B32B5/28 ,  H05K1/036 ,  H05K1/0366 ,  H05K2201/029 ,  H05K2201/0293 ,  H05K2201/068 ,  Y10T29/4913

摘要： A simple, inexpensive, drillable, reduced CTE laminate and circuitized structures comprising the reduced CTE laminate, is provided. The reduced CTE laminate comprises: from about 40% to 75%, preferably from about 55% to 65%, by weight resin; from about 0.05% to 0.3%, preferably from about 0.08% to 0.10%, by weight curing agent; from about 25% to 60%, preferably from about 30% to 40%, by weight, woven cloth; from about 1% to 15%, preferably from about 5% to 10%, by volume, non-woven quartz mat. The present invention also generally relates to a method for reducing the CTE of circuitized structures, and to methods for making reduced CTE laminate and circuitized structures comprising reduced CTE laminate. The method for making reduced CTE laminate and laminate structures comprises the following steps: providing non-woven quartz mat; providing a prepreg, preferably B-stage cured to not more than about 40%, preferably not more than 30% of full cure; sandwiching the non-woven quartz mat between two layers of prepreg, and reflowing the resin of the prepreg into the quartz mat. Optionally, the reduced CTE laminate is sandwiched between two layers of metal, preferably copper.

摘要翻译： 提供了一种简单，便宜，可钻，减少的CTE层压板和包括减小的CTE层压板的电路结构。 减少的CTE层压材料包括：约40％至75％，优选约55％至65％的树脂; 约0.05％至0.3％，优选约0.08％至0.10％的固化剂; 约25％至60％，优选约30％至40％的织布; 约1％至15％，优选约5％至10％体积的无纺石英垫。 本发明还通常涉及一种用于减小电路化结构的CTE的方法，以及用于制造减少的CTE层压体和包括减少的CTE层压体的电路化结构的方法。 制造减薄的CTE层压板和层压结构的方法包括以下步骤：提供无纺石英垫; 提供预浸料，优选B阶固化至不超过完全固化的约40％，优选不超过30％; 将无纺石英垫夹在两层预浸料之间，并将预浸料坯的树脂回流到石英垫中。 任选地，还原的CTE层压体夹在两层金属之间，优选为铜。

公开(公告)号：US06387830B1

公开(公告)日：2002-05-14

申请号：US09265210

申请日：1999-03-10

申请人： Lawrence Robert Blumberg ,  Robert Maynard Japp ,  William John Rudik ,  John Frank Surowka

发明人： Lawrence Robert Blumberg ,  Robert Maynard Japp ,  William John Rudik ,  John Frank Surowka

IPC分类号： B32B526

CPC分类号： B32B5/26 ,  B32B5/02 ,  B32B5/28 ,  B32B2260/023 ,  B32B2260/046 ,  B32B2262/101 ,  B32B2305/20 ,  B32B2553/00 ,  H05K1/036 ,  H05K1/0366 ,  H05K2201/029 ,  H05K2201/0293 ,  H05K2201/068 ,  Y10T29/4913 ,  Y10T442/2361 ,  Y10T442/2992 ,  Y10T442/3537 ,  Y10T442/3569 ,  Y10T442/3577 ,  Y10T442/3585 ,  Y10T442/3602 ,  Y10T442/3659

摘要： A simple, inexpensive, drillable, reduced CTE laminate and circuitized structures comprising the reduced CTE laminate, is provided. The reduced CTE laminate comprises: from about 40% to 75%, preferably from about 55% to 65%, by weight resin; from about 0.05% to 0.3%, preferably from about 0.08% to 0.10%, by weight curing agent; from about 25% to 60%, preferably from about 30% to 40%, by weight, woven cloth; from about 1% to 15%, preferably from about 5% to 10%, by volume, non-woven quartz mat. The present invention also generally relates to a method for reducing the CTE of circuitized structures, and to methods for making reduced CTE laminate and circuitized structures comprising reduced CTE laminate. The method for making reduced CTE laminate and laminate structures comprises the following steps: providing non-woven quartz mat; providing a prepreg, preferably not B-stage cured to not more than about 40%, preferably not more than 30% of full cure; sandwiching the non-woven quartz mat between two layers of prepreg, and reflowing the resin of the prepreg into the quartz mat. Optionally, the reduced CTE laminate is sandwiched between two layers of metal, preferably copper.

摘要翻译： 提供了一种简单，便宜，可钻，减少的CTE层压板和包括减小的CTE层压板的电路结构。 减少的CTE层压材料包括：约40％至75％，优选约55％至65％的树脂; 约0.05％至0.3％，优选约0.08％至0.10％的固化剂; 约25％至60％，优选约30％至40％的织布; 约1％至15％，优选约5％至10％体积的无纺石英垫。 本发明还通常涉及一种用于减小电路化结构的CTE的方法，以及用于制造减少的CTE层压体和包括减少的CTE层压体的电路化结构的方法。 制造减薄的CTE层压板和层压结构的方法包括以下步骤：提供无纺石英垫; 提供预浸料，优选不B阶固化至不超过完全固化的约40％，优选不超过30％; 将无纺石英垫夹在两层预浸料之间，并将预浸料坯的树脂回流到石英垫中。 任选地，还原的CTE层压体夹在两层金属之间，优选为铜。