Non-integer interpolation using cascaded integrator-comb filter
    1.
    发明授权
    Non-integer interpolation using cascaded integrator-comb filter 有权
    使用级联积分梳梳滤波器的非整数插值

    公开(公告)号:US07324025B1

    公开(公告)日:2008-01-29

    申请号:US11528805

    申请日:2006-09-28

    IPC分类号: H03M7/00

    摘要: A non-integer CIC interpolation filter is provided for use in sigma-delta digital-to-analog systems, which realizes non-integer interpolation but eliminates the need for coupling of the integrators in the output domain. The present non-integer interpolation filter provides for more attenuation to all of the aliases of the input signal and has eliminated the need of complex computations.

    摘要翻译: 提供了一种用于Σ-Δ数模转换系统的非整数CIC内插滤波器,实现非整数插值,但不需要输出域中的积分器耦合。 目前的非整数插值滤波器为输入信号的所有别名提供了更多的衰减,并且消除了复杂计算的需要。

    Signal processing system having an ADC delta-sigma modulator with single-ended input and feedback signal inputs
    6.
    发明授权
    Signal processing system having an ADC delta-sigma modulator with single-ended input and feedback signal inputs 有权
    信号处理系统具有具有单端输入和反馈信号输入的ADCΔ-Σ调制器

    公开(公告)号:US06972705B1

    公开(公告)日:2005-12-06

    申请号:US11011732

    申请日:2004-12-14

    IPC分类号: H03M3/00 H03M3/04

    CPC分类号: H03M3/39 H03M3/424 H03M3/452

    摘要: Signal processing systems described herein include an analog-to-digital delta sigma modulator to process a single-ended input signal using a single-ended analog feedback reference signal. The delta sigma modulator includes a switched capacitor circuit that integrates a difference between the single-ended input signal and the single-ended analog feedback signal derived from a quantization output of the delta sigma modulator. Embodiments of the switched capacitor circuit allow the delta sigma modulator to be implemented with fewer switches, less complicated reference signal generators, and smaller capacitors relative to conventional counterparts. Thus, embodiments of the delta sigma modulator described herein can cost less to build and use less power. Embodiments of the signal processing systems can be implemented in single and multi-bit delta sigma modulators and various sampling topologies, including single and double sampling topologies.

    摘要翻译: 本文描述的信号处理系统包括使用单端模拟反馈参考信号来处理单端输入信号的模数转换ΔΣ调制器。 ΔΣ调制器包括开关电容器电路,其对单端输入信号和从Δ-Σ调制器的量化输出得到的单端模拟反馈信号之间的差进行积分。 开关电容器电路的实施例允许使用更少的开关,较不复杂的参考信号发生器和相对于常规对应物的较小电容器来实现Δ-Σ调制器。 因此,本文描述的Δ-Σ调制器的实施例可以降低构建和使用较少功率的成本。 信号处理系统的实施例可以在单位和多位ΔΣ调制器和各种采样拓扑中实现,包括单采样和双采样拓扑。

    Circuit systems and methods for multirate digital-to-analog amplifier systems
    10.
    发明授权
    Circuit systems and methods for multirate digital-to-analog amplifier systems 有权
    多速率数模转换放大器系统的电路系统和方法

    公开(公告)号:US06462690B1

    公开(公告)日:2002-10-08

    申请号:US09825445

    申请日:2001-04-02

    IPC分类号: H03M166

    CPC分类号: H03M3/502

    摘要: A multirate digital-to-analog amplifier system is disclosed. An interpolator is configured to interpolate digital values between samples of a digital signal from a digital signal source, in which the digital signal has a first sample rate. An output signal from the interpolator has a second, predetermined sample rate, which is independent of the first sample rate, of the digital signal. An amplifier is configured to amplify a digital signal having the second sample rate in response to the output signal of the interpolator.

    摘要翻译: 公开了一种多速率数模转换放大器系统。 内插器被配置为在来自数字信号源的数字信号的采样之间内插数字值,其中数字信号具有第一采样率。 来自内插器的输出信号具有与数字信号的第一采样速率无关的第二预定采样速率。 放大器被配置为响应于内插器的输出信号放大具有第二采样率的数字信号。