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公开(公告)号:US20140191379A1
公开(公告)日:2014-07-10
申请号:US14233596
申请日:2011-10-21
申请人: Li Zhang , Zhiming Lai , Dong Chen , Jinhui Chen
发明人: Li Zhang , Zhiming Lai , Dong Chen , Jinhui Chen
IPC分类号: H01L23/495
CPC分类号: H01L23/49582 , H01L21/561 , H01L21/568 , H01L23/3107 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/95 , H01L24/96 , H01L2224/02379 , H01L2224/03334 , H01L2224/0382 , H01L2224/0391 , H01L2224/0401 , H01L2224/04105 , H01L2224/05005 , H01L2224/05541 , H01L2224/05558 , H01L2224/05569 , H01L2224/05572 , H01L2224/12105 , H01L2224/13006 , H01L2224/13023 , H01L2224/131 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/81191 , H01L2224/81815 , H01L2224/83192 , H01L2224/94 , H01L2924/00014 , H01L2924/0002 , H01L2924/12042 , H01L2924/15311 , H01L2924/15788 , H01L2924/00012 , H01L2924/014 , H01L2224/05552 , H01L2224/03 , H01L2224/11 , H01L2924/00
摘要: A low-k chip packaging structure comprising chip body I (2-1), a chip electrode (2-2), and a chip surface passivation layer (2-3). Chip body I (2-1) has coated thereon thin film layer I (2-3). Thin film layer I (2-3) has arranged on a rear face thereof a support wafer (2-5). A chip electrode (2-2) is transferred to thin film layer I (2-4) around the exterior of the chip via a rewired metal wiring (2-6). The rewired metal wiring (2-6) has arranged at an end thereof a metal column (2-7). The metal column (2-7) has coated thereon thin film layer II (2-8). The top of the metal column protrudes thin film layer II (2-8). The protruding top of the metal column (2-7) has arranged thereon a metal layer (2-9). The metal layer (2-9) has arranged thereon soldering balls (2-10). The low-k chip packaging structure solves the problem of invalid low-k chip due to concentration of stress during chip packaging process and allows for reduced packaging costs and great product reliability.
摘要翻译: 包括芯体I(2-1),芯片电极(2-2)和芯片表面钝化层(2-3)的低k芯片封装结构。 芯体I(2-1)上涂上薄膜层I(2-3)。 薄膜层I(2-3)在其背面设置有支撑晶片(2-5)。 芯片电极(2-2)通过重新布线的金属布线(2-6)转移到芯片外部的薄膜层I(2-4)上。 重新布线的金属布线(2-6)的一端设有金属柱(2-7)。 金属柱(2-7)上涂有薄膜层II(2-8)。 金属柱的顶部突出薄膜层II(2-8)。 金属柱(2-7)的突出顶部上布置有金属层(2-9)。 金属层(2-9)上布置有焊球(2-10)。 低k芯片封装结构解决了芯片封装过程中由于应力集中引起的无效低k芯片的问题,可以降低封装成本,提高产品可靠性。
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公开(公告)号:US08987055B2
公开(公告)日:2015-03-24
申请号:US14233461
申请日:2011-10-21
申请人: Li Zhang , Zhiming Lai , Dong Chen , Jinhui Chen
发明人: Li Zhang , Zhiming Lai , Dong Chen , Jinhui Chen
IPC分类号: H01L21/00 , H01L23/495 , H01L23/31 , H01L23/00
CPC分类号: H01L23/49582 , H01L21/561 , H01L21/568 , H01L23/3107 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/95 , H01L24/96 , H01L2224/02379 , H01L2224/03334 , H01L2224/0382 , H01L2224/0391 , H01L2224/0401 , H01L2224/04105 , H01L2224/05005 , H01L2224/05541 , H01L2224/05558 , H01L2224/05569 , H01L2224/05572 , H01L2224/12105 , H01L2224/13006 , H01L2224/13023 , H01L2224/131 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/81191 , H01L2224/81815 , H01L2224/83192 , H01L2224/94 , H01L2924/00014 , H01L2924/0002 , H01L2924/12042 , H01L2924/15311 , H01L2924/15788 , H01L2924/00012 , H01L2924/014 , H01L2224/05552 , H01L2224/03 , H01L2224/11 , H01L2924/00
摘要: Provided is a method for packaging a low-k chip, comprising: attaching onto a carrier wafer a layer of temporary strippable film; arranging inversely a chip (2-1) onto the carrier wafer via the temporary strippable film; attaching thin film layer I (2-4) onto the carrier wafer for packaging; bonding a support wafer (2-5) onto the thin film layer I (2-4) and solidifying; forming a reconstructed wafer consisting of the chip (2-1), thin film layer I (2-4), and the support wafer; detaching the reconstructed wafer from the carrier wafer; completing a rewired metal wiring (2-6) on thin film layer I (2-4); forming a metal column (2-7) at an end of the rewired metal wiring (2-6); attaching thin film layer II (2-8) onto a surface of the metal column (2-7), packaging, and solidifying; coating a metal layer (2-9) on the top of the metal column (2-7), forming BGA solder balls (2-10) on the metal layer (2-9) by means of printing or ball planting; and finally slicing into individual BGA packages the reconstructed wafer having formed the BGA solder balls (2-10).
摘要翻译: 提供了一种用于封装低k芯片的方法,包括:将一层临时剥离膜附着在载体晶片上; 通过临时可剥离膜将芯片(2-1)反向布置在载体晶片上; 将薄膜层I(2-4)附着在载体晶片上进行包装; 将支撑晶片(2-5)接合到薄膜层I(2-4)上并固化; 形成由芯片(2-1),薄膜层I(2-4)和支撑晶片组成的重构晶片; 将重建的晶片从载体晶片分离; 在薄膜层I(2-4)上完成重新布线的金属布线(2-6); 在重新布线的金属布线(2-6)的一端形成金属柱(2-7); 将薄膜层II(2-8)附着到金属柱(2-7)的表面上,包装和固化; 在金属柱(2-7)的顶部涂覆金属层(2-9),通过印刷或球面种植在金属层(2-9)上形成BGA焊球(2-10); 最后将形成BGA焊球(2-10)的重构晶片切割成单独的BGA封装。
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公开(公告)号:US20140162404A1
公开(公告)日:2014-06-12
申请号:US14233461
申请日:2011-10-21
申请人: Li Zhang , Zhiming Lai , Dong Chen , Jinhui Chen
发明人: Li Zhang , Zhiming Lai , Dong Chen , Jinhui Chen
IPC分类号: H01L23/00
CPC分类号: H01L23/49582 , H01L21/561 , H01L21/568 , H01L23/3107 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/95 , H01L24/96 , H01L2224/02379 , H01L2224/03334 , H01L2224/0382 , H01L2224/0391 , H01L2224/0401 , H01L2224/04105 , H01L2224/05005 , H01L2224/05541 , H01L2224/05558 , H01L2224/05569 , H01L2224/05572 , H01L2224/12105 , H01L2224/13006 , H01L2224/13023 , H01L2224/131 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/81191 , H01L2224/81815 , H01L2224/83192 , H01L2224/94 , H01L2924/00014 , H01L2924/0002 , H01L2924/12042 , H01L2924/15311 , H01L2924/15788 , H01L2924/00012 , H01L2924/014 , H01L2224/05552 , H01L2224/03 , H01L2224/11 , H01L2924/00
摘要: Provided is a method for packaging a low-k chip, comprising: attaching onto a carrier wafer a layer of temporary strippable film; arranging inversely a chip (2-1) onto the carrier wafer via the temporary strippable film; attaching thin film layer I (2-4) onto the carrier wafer for packaging; bonding a support wafer (2-5) onto the thin film layer I (2-4) and solidifying; forming a reconstructed wafer consisting of the chip (2-1), thin film layer I (2-4), and the support wafer; detaching the reconstructed wafer from the carrier wafer; completing a rewired metal wiring (2-6) on thin film layer I (2-4); forming a metal column (2-7) at an end of the rewired metal wiring (2-6); attaching thin film layer II (2-8) onto a surface of the metal column (2-7), packaging, and solidifying; coating a metal layer (2-9) on the top of the metal column (2-7), forming BGA solder balls (2-10) on the metal layer (2-9) by means of printing or ball planting; and finally slicing into individual BGA packages the reconstructed wafer having formed the BGA solder balls (2-10).
摘要翻译: 提供了一种用于封装低k芯片的方法,包括:将一层临时剥离膜附着在载体晶片上; 通过临时可剥离膜将芯片(2-1)反向布置在载体晶片上; 将薄膜层I(2-4)附着在载体晶片上进行包装; 将支撑晶片(2-5)接合到薄膜层I(2-4)上并固化; 形成由芯片(2-1),薄膜层I(2-4)和支撑晶片组成的重构晶片; 将重建的晶片从载体晶片分离; 在薄膜层I(2-4)上完成重新布线的金属布线(2-6); 在重新布线的金属布线(2-6)的一端形成金属柱(2-7); 将薄膜层II(2-8)附着到金属柱(2-7)的表面上,包装和固化; 在金属柱(2-7)的顶部涂覆金属层(2-9),通过印刷或球面种植在金属层(2-9)上形成BGA焊球(2-10); 最后将形成BGA焊球(2-10)的重构晶片切割成单独的BGA封装。
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公开(公告)号:US12043952B2
公开(公告)日:2024-07-23
申请号:US18102894
申请日:2023-01-30
申请人: Li Zhang
发明人: Li Zhang
CPC分类号: D06F75/16 , D06F75/20 , D06F75/24 , D06F75/265
摘要: The present disclosure provides an electric steam iron, comprising: a housing provided with a water injection unit, the water injection unit being configured to injecting water; a heating unit comprising a heating shell and a heating element, a first chamber and a second chamber being set in the heating shell, the first chamber is configured for receiving water from the water injection unit; the heating shell is in the first chamber and heats the water in the first chamber to generate steam; the second chamber is connected with the first chamber to receive steam in the first chamber; a first lead-out hole is defined in a bottom of the first chamber; a cover is provided to cover a bottom of the heating shell a steam ironing plate, a steam channel is on the steam ironing plate, the steam channel being distributed on the steam ironing plate in a roundabout manner.
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公开(公告)号:USD1011451S1
公开(公告)日:2024-01-16
申请号:US29897344
申请日:2023-07-13
申请人: Li Zhang
设计人: Li Zhang
摘要: FIG. 1 is a front, right and top perspective view of a balance beam, showing my design.
FIG. 2 is a rear, left and bottom perspective view thereof.
FIG. 3 is a front elevation view thereof.
FIG. 4 is a rear elevation view thereof.
FIG. 5 is an enlarged left side elevation view thereof.
FIG. 6 is an enlarged right side elevation view thereof.
FIG. 7 is a top plan view thereof.
FIG. 8 is a bottom plan view thereof.
FIG. 9 is an enlarged view of detail 9 in FIG. 1; and,
FIG. 10 is an enlarged view of detail 10 in FIG. 2.
The broken lines depict portions of the balance beam that form no part of the claimed design. The dot-dash broken lines in FIGS. 1, 2, 9, and 10 depict the boundaries of the enlargements that form no part of the claimed design.-
公开(公告)号:USD1007331S1
公开(公告)日:2023-12-12
申请号:US29881142
申请日:2022-12-28
申请人: Li Zhang
设计人: Li Zhang
摘要: FIG. 1 is a bottom perspective view of stackable storage unit, showing my new design;
FIG. 2 is a front view thereof;
FIG. 3 is a rear view thereof;
FIG. 4 is a left side view thereof;
FIG. 5 is a right side view thereof;
FIG. 6 is a top view thereof; and,
FIG. 7 is a bottom view thereof.
The broken lines in the drawings illustrate the portions of the stackable storage unit, which form no part of the claimed design.-
公开(公告)号:US20200228269A1
公开(公告)日:2020-07-16
申请号:US16650577
申请日:2018-05-10
摘要: Embodiments of the present disclosure provide methods, devices and a computer readable medium for a restriction on a measurement for a neighbor cell. According to a method implemented by a network device in a communication system, the network device determines a neighbor cell on a frequency layer capable of cell reference signal (CRS) muting. A cell reference signal in the neighbor cell is transmitted on a predetermined physical resource if the neighbor cell enables CRS muting. In response to the determination, the network device transmits measurement restriction information to a terminal device in a cell of the network device. The measurement restriction information indicates that a radio resource management (RRM) measurement for any neighbor cell on the frequency layer is restricted to be performed on the predetermined physical resource. The embodiments of the present disclosure improve a measurement for a neighbor cell.
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公开(公告)号:US10577506B2
公开(公告)日:2020-03-03
申请号:US16019549
申请日:2018-06-27
申请人: Li Zhang
发明人: Li Zhang
摘要: Provided are a BZ glaze enamel painting material composition and a painting method. The composition is a painting material composition composed of natural mineral pigment powder, synthetic resin, and vinyl acetate-acrylate added with a color glaze, a white toning glaze, and a colorless toning glaze at different percentages. The painting method that uses the composition includes the steps of preparing painting canvas, forming bottom, and making picture. In the step of making picture, a suitable amount of BZ glaze enamel painting material composition is prepared according to the size of the painting canvas and, and after being sufficiently stirred, added with temperature-resistant minerals and water according to predetermined weight ratios to respectively form red glaze, yellow glaze, blue glaze, green glaze, purple glaze, orange glaze, and cyan glaze, followed by mixing to product a BZ painting artwork exhibiting, in the entirety thereof, an irregular pattern.
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公开(公告)号:US10051633B2
公开(公告)日:2018-08-14
申请号:US14419301
申请日:2012-08-03
申请人: Li Zhang , Hai Peng Lei , Chun Hai Yao
发明人: Li Zhang , Hai Peng Lei , Chun Hai Yao
摘要: A method including: using first information and second information to determine a code book size, said first information including information for at least one first subframe of at least one cell for which feedback information is to be provided, said at least one first subframe is prior to subframe n and second information for at least one second subframe of at least one cell for which feedback information is to be provided, said at least one second subframe being after said subframe n; and using said code book size for providing feedback information.
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公开(公告)号:US20180141873A1
公开(公告)日:2018-05-24
申请号:US15559056
申请日:2015-10-28
申请人: Li Zhang
发明人: Li Zhang
CPC分类号: C04B41/86 , B44C1/005 , C04B33/24 , C04B33/34 , C04B41/0072 , C04B41/009 , C04B41/5022 , C04B41/526 , C04B41/89 , C04B2111/82 , C09C1/0009 , C04B41/4539 , C04B2103/54
摘要: A high-temperature color glaze painting pigment includes a color glaze, white toning glaze and colorless toning glaze, wherein the color glaze consists of 50 wt % to 66 wt % high temperature resistant white glaze mineral and 50 wt % to 34 wt % water, the white toning glaze consists of 70 wt % high temperature resistant white glaze mineral and 30 wt % water, and the colorless toning glaze consists of 30 wt % high temperature resistant colorless glaze mineral and 70 wt % water, wherein the weight ratio of the color glaze to the white toning glaze is 12.5:1 to 50:1, the weight ratio of the color glaze to the colorless toning glaze is 20:1 to 100:1. The high temperature colored glaze painting pigment and a method for making a porcelain plate painting thereof can be not only manually completed by artists with their experiences, but completed by an industrial production way.
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