公开(公告)号：US20070127219A1

公开(公告)日：2007-06-07

申请号：US11438429

申请日：2006-05-23

Applicant: Lin-Ray Ho ,  Yu-Chang Lin

Inventor： Lin-Ray Ho ,  Yu-Chang Lin

IPC: H05K1/14

CPC classification number: H01R13/4538 ,  H05K5/0278

Abstract: The frame of a flash memory disk has an opening, a resilient support and a pair of switches. The pair of switches is extended from the frame and is constricted at their connection portions. Two recesses are formed at inner surfaces of the pair of switches. A PCB includes a flash memory and a USB connector thereon. A carrier has a pair of resilient wing latches and a resilient end latch. The carrier accommodates the PCB and exposes the USB connector. The carrier slides within the frame to extend or to retract the USB connector through the opening. A spring is secured between the carrier and the frame. An upper housing is assembled upon the frame, wherein the upper housing includes a button contacting the resilient support. A lower housing is assembled to the frame.

公开(公告)号：US07307849B2

公开(公告)日：2007-12-11

申请号：US11438429

申请日：2006-05-23

Applicant: Lin-Ray Ho ,  Yu-Chang Lin

Inventor： Lin-Ray Ho ,  Yu-Chang Lin

IPC: H05K7/12

CPC classification number: H01R13/4538 ,  H05K5/0278

Abstract: The frame of a flash memory disk has an opening, a resilient support and a pair of switches. The pair of switches is extended from the frame and is constricted at their connection portions. Two recesses are formed at inner surfaces of the pair of switches. A PCB includes a flash memory and a USB connector thereon. A carrier has a pair of resilient wing latches and a resilient end latch. The carrier accommodates the PCB and exposes the USB connector. The carrier slides within the frame to extend or to retract the USB connector through the opening. A spring is secured between the carrier and the frame. An upper housing is assembled upon the frame, wherein the upper housing includes a button contacting the resilient support. A lower housing is assembled to the frame.

Abstract translation: 闪存盘的框架具有开口，弹性支撑件和一对开关。 该对开关从框架延伸并在其连接部分处收缩。 在一对开关的内表面形成两个凹槽。 PCB上包括闪存和USB连接器。 载体具有一对弹性翼闩和弹性端闩。 载体容纳PCB并暴露USB连接器。 载体在框架内滑动以延伸或缩回USB连接器通过开口。 弹簧固定在载体和框架之间。 上壳体组装在框架上，其中上壳体包括接触弹性支撑件的按钮。 下壳体组装到框架上。

公开(公告)号：USD547758S1

公开(公告)日：2007-07-31

申请号：US29262657

申请日：2006-07-10

Applicant: Lin-Ray Ho ,  Yu-Chang Lin

Designer： Lin-Ray Ho ,  Yu-Chang Lin

公开(公告)号：US20180051451A1

公开(公告)日：2018-02-22

申请号：US15239910

申请日：2016-08-18

Applicant: Hsiang-Hung Wang ,  Yu-Chang Lin

Inventor： Hsiang-Hung Wang ,  Yu-Chang Lin

IPC: E03D5/10 ,  E03D13/00

CPC classification number: E03D5/105 ,  E03D13/00

Abstract: An activation system for electronic urinal comprises a urinal fluidly communicated with an inlet pipe and a control unit arranged between the urinal and the inlet pipe. The control unit includes a solenoid valve, a sensor, and a power supply. The solenoid valve is used for controlling to water or seal. The sensor is electrically connected to the solenoid valve. The power supply provides power to the solenoid valve and the sensor. The control unit has an activation switch which is electrically connected to the solenoid valve. The activation switch has a wireless transmission module and a timing controller for turning off the wireless transmission module. The activation switch is pressed so that the wireless transmission module is activated to set water discharge and a turn-off time of the solenoid valve and is turned off after a preset time counted by the time controller to save power.

公开(公告)号：US20100105185A1

公开(公告)日：2010-04-29

申请号：US12259028

申请日：2008-10-27

Applicant: Keh-Chiang Ku ,  Cheng-Lung Hung ,  Li-Ting Wang ,  Chien-Hao Chen ,  Chien-Hao Huang ,  Wenli Lin ,  Yu-Chang Lin

Inventor： Keh-Chiang Ku ,  Cheng-Lung Hung ,  Li-Ting Wang ,  Chien-Hao Chen ,  Chien-Hao Huang ,  Wenli Lin ,  Yu-Chang Lin

IPC: H01L21/336 ,  H01L21/4763

CPC classification number: H01L21/28052 ,  H01L21/26506 ,  H01L21/26586 ,  H01L21/28506 ,  H01L29/1083 ,  H01L29/665 ,  H01L29/6659 ,  H01L29/7833

Abstract: A method for forming a semiconductor structure includes providing a semiconductor substrate; forming a gate dielectric layer over the semiconductor substrate; forming a gate electrode layer over the gate dielectric layer; doping carbon and nitrogen into the gate electrode layer; and, after the step of doping carbon and nitrogen, patterning the gate dielectric layer and the gate electrode layer to form a gate dielectric and a gate electrode, respectively.

Abstract translation: 一种形成半导体结构的方法包括提供半导体衬底; 在所述半导体衬底上形成栅介电层; 在所述栅极电介质层上形成栅电极层; 将碳和氮掺杂到栅电极层中; 并且在掺杂碳和氮的步骤之后，分别构图栅极电介质层和栅极电极层以形成栅极电介质和栅电极。

公开(公告)号：US07652290B2

公开(公告)日：2010-01-26

申请号：US10232460

申请日：2002-08-30

Applicant: Yu-Chang Lin

Inventor： Yu-Chang Lin

IPC: H01L27/108 ,  G11C29/04 ,  G11C29/12 ,  G11C29/50 ,  G11C8/08 ,  G11C8/10 ,  G11C8/14 ,  G11C7/12 ,  G11C7/18

CPC classification number: G11C11/4085 ,  G11C2207/2227

Abstract: The present invention discloses a standby current erasion circuit applied in DRAM, which improves prior art word line driving circuit to have the word line voltage outputted in standby mode be equal to the bit line voltage, thereby the short DC standby current between the word line and bit line can be erased.

Abstract translation: 本发明公开了一种应用在DRAM中的待机电流擦除电路，其改进了现有技术的字线驱动电路，使待机模式下输出的字线电压等于位线电压，从而在字线和 位线可以被擦除。

公开(公告)号：US20080174923A1

公开(公告)日：2008-07-24

申请号：US11812221

申请日：2007-06-15

Applicant: Yi-Hsun Wu ,  Yan-Chih Jiang ,  Yu-Chang Lin ,  Jian-Hsing Lee

Inventor： Yi-Hsun Wu ,  Yan-Chih Jiang ,  Yu-Chang Lin ,  Jian-Hsing Lee

IPC: H02H9/00 ,  H01L21/336

CPC classification number: H01L27/0255

Abstract: A semiconductor device formed in a semiconductor substrate for dissipating electrostatic discharge and/or accumulated charge in an integrated circuit is provided. In one embodiment, the device comprises a semiconductor substrate; a plurality of layers of metal lines formed overlying the substrate; a plurality of via plugs through intermetal dielectric layers between the layers of metal lines and wherein the via plugs interconnect the metal lines; and a dummy pad formed over the plurality of layers of metal lines, the dummy pad having a diode connected thereto and to ground for providing a discharge path for the electrostatic discharge and/or accumulated charge.

公开(公告)号：US07189586B2

公开(公告)日：2007-03-13

申请号：US10904652

申请日：2004-11-21

Applicant: Yu-Chang Lin

Inventor： Yu-Chang Lin

IPC: H01L21/66 ,  H01L23/58

CPC classification number: H01L22/34 ,  Y10S257/905 ,  Y10S257/908

Abstract: A test key for monitoring GC-DT misalignment is provided. Deep trench capacitors are embedded in an interlacing matrix manner. GC lines are defined on a substrate and passing over the deep trench capacitors. A first bit line contact pattern surrounded by first assistant bit line contact patterns is disposed on the right side of a first deep trench capacitor. A second bit line contact pattern surrounded by second assistant bit line contact patterns is disposed on the left side of a second deep trench capacitor. The test key has a mirror symmetric line. The first assistant bit line contact patterns and second assistant bit line contact patterns are symmetric with respect to the mirror symmetric line. An active area connects the first bit line contact pattern and the second bit line contact pattern. A signal-in bit line is connected to the first bit line contact and a signal-out bit line is connected to the second bit line contact. The rest rows of the bit lines are dummy bit lines and floating.

Abstract translation: 提供了一个用于监测GC-DT不对准的测试键。 深沟槽电容器以隔行矩阵的方式嵌入。 GC线定义在衬底上并穿过深沟槽电容器。 由第一辅助位线接触图案包围的第一位线接触图案设置在第一深沟槽电容器的右侧。 由第二辅助位线接触图案包围的第二位线接触图案设置在第二深沟槽电容器的左侧。 测试键具有镜像对称线。 第一辅助位线接触图案和第二辅助位线接触图案相对于镜像对称线对称。 有源区域连接第一位线接触图案和第二位线接触图案。 信号输入位线连接到第一位线触点，并且信号输出位线连接到第二位线触点。 位线的其余行是虚拟位线和浮动。

公开(公告)号：US20050073058A1

公开(公告)日：2005-04-07

申请号：US10680664

申请日：2003-10-07

Applicant: Yian-Liang Kuo ,  Yu-Chang Lin

Inventor： Yian-Liang Kuo ,  Yu-Chang Lin

IPC: H01L23/485 ,  H01L23/48 ,  H01L29/40

CPC classification number: H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/04042 ,  H01L2224/05093 ,  H01L2224/05095 ,  H01L2224/05556 ,  H01L2224/05557 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05669 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/48624 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48669 ,  H01L2224/73257 ,  H01L2924/00014 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2224/05599

Abstract: An integrated circuit package bond pad includes an insulating layer and an electrode located over the insulating layer. The electrode has a first surface configured to be bonded to external circuitry and a second surface opposite the first surface. A plurality of conductive members is located in the insulating layer, wherein ones of the plurality of conductive members contact the second surface of the electrode.

Abstract translation: 集成电路封装接合焊盘包括绝缘层和位于绝缘层上方的电极。 电极具有被配置为接合到外部电路的第一表面和与第一表面相对的第二表面。 多个导电构件位于绝缘层中，其中多个导电构件中的一个导电构件接触电极的第二表面。

公开(公告)号：US20050035959A1

公开(公告)日：2005-02-17

申请号：US10707652

申请日：2003-12-30

Applicant: Yu-Chang Lin ,  Ying-Te Tu

Inventor： Yu-Chang Lin ,  Ying-Te Tu

IPC: G09G5/00 ,  G11C11/403 ,  G11C11/406

CPC classification number: G11C11/406 ,  G11C2211/4065

Abstract: A method for refreshing a memory capacitor is provided. First, the refresh controller provides a refresh control signal. The pre-decoded row address counter counts and outputs a regular pre-decoded row address in response to the refresh control signal. The regular pre-decoded row address is inputted to the pre-decoded row address re-driver to obtain a row address. The memory capacitor in response to the row address is refreshed.

Abstract translation: 提供一种刷新存储电容器的方法。 首先，刷新控制器提供刷新控制信号。 预编码行地址计数器响应于刷新控制信号计数并输出常规预解码行地址。 常规预解码行地址被输入到预解码行地址重新驱动器以获得行地址。 响应于行地址的存储电容被刷新。