公开(公告)号：US20060044650A1

公开(公告)日：2006-03-02

申请号：US11196572

申请日：2005-08-02

申请人： Liren Du ,  Qi Deng ,  Kevin Zhang ,  Tengda Du

发明人： Liren Du ,  Qi Deng ,  Kevin Zhang ,  Tengda Du

IPC分类号： G02B27/28

CPC分类号： G02F1/093 ,  G02B27/283

摘要： This disclosure concerns low insertion loss optical circulators. In one example, the optical circulator has four ports and includes a polarization dividing and combining element that is positioned adjacent the first and fourth ports and is adapted to divide a beam of light into two beams of light of orthogonal polarizations. The polarization dividing and combining element is also adapted to combine two beams of light of orthogonal polarizations into one beam of light. The optical circulator also includes a Faraday rotator positioned near the second port, and a Faraday rotator positioned near the third port. The Faraday rotator rotates beams of light before or after the pass through the polarization dividing and combining elements.

摘要翻译： 本公开涉及低插入损耗光学循环器。 在一个示例中，光循环器具有四个端口，并且包括位于第一和第四端口附近的偏振分割和组合元件，并且适于将光束分成两个正交偏振光束。 偏振分割和组合元件还适于将两个正交偏振光束组合成一个光束。 光循环器还包括位于第二端口附近的法拉第旋转器和位于第三端口附近的法拉第旋转器。 法拉第旋转器在通过偏振分割和组合元件之前或之后旋转光束。

公开(公告)号：US20050041290A1

公开(公告)日：2005-02-24

申请号：US10866418

申请日：2004-06-11

申请人： Tengda Du ,  Kevin Zhang

发明人： Tengda Du ,  Kevin Zhang

IPC分类号： G02B6/34 ,  H04J14/02 ,  H04Q11/00 ,  G02B6/00 ,  G02B5/30 ,  G02B27/28

CPC分类号： H04J14/02 ,  G02B6/272 ,  G02B6/29302 ,  G02B6/29386 ,  H04Q11/0005 ,  H04Q2011/0009 ,  H04Q2011/0015 ,  H04Q2011/0016 ,  H04Q2011/0026 ,  H04Q2011/0075

摘要： An optical interleaver for use in a range of telecommunications applications including optical multiplexers/demultiplexers and optical routers. The optical device includes an optical processing loop which allows multi-stage performance characteristics to be achieved with a single physical filtration stage. Optical processing on the first leg and second legs of the loop is asymmetrical thereby improving the integrity of the optical signals by effecting complementary chromatic dispersion on the first and second legs. A fundamental filter cell within the interleaver filters optical signals propagating on each of the two legs of the optical loop which intersects the fundamental filter cell.

摘要翻译： 一种用于包括光复用器/解复用器和光路由器的电信应用范围内的光交织器。 光学装置包括光学处理回路，其允许通过单个物理过滤级来实现多级性能特性。 在环路的第一腿部和第二腿部上的光学处理是不对称的，从而通过在第一和第二腿部上实现互补色散而提高光学信号的完整性。 交织器内的基本滤波器单元滤波在与基波滤波器单元相交的光环路的两个支路上传播的光信号。

公开(公告)号：US07354203B2

公开(公告)日：2008-04-08

申请号：US11178624

申请日：2005-07-11

申请人： Stefan Pfnuer ,  Tengda Du ,  Kevin Zhang ,  Julie S. Eng ,  Axel Mehnert

发明人： Stefan Pfnuer ,  Tengda Du ,  Kevin Zhang ,  Julie S. Eng ,  Axel Mehnert

IPC分类号： G02B6/36

CPC分类号： G02B6/4201 ,  G02B6/36 ,  G02B6/4251

摘要： A package for maintaining alignment of components includes a frame and a beam with the beam attached to the frame and one end of the beam. One or more components are mounted to the beam. The frame and a portion of the beam are separated from each other by a channel which allows portions of the beam to flex substantially independently of the frame when a force is applied to the frame. Thus, the effects resulting from forces applied to the frame are not experienced by the beam, or are at least attenuated, so that the alignment of the components mounted on the beam is substantially preserved.

摘要翻译： 用于维持部件对准的包装件包括框架和梁，其中梁连接到框架和梁的一端。 一个或多个部件安装到梁上。 框架和梁的一部分通过通道分开，该通道允许当力施加到框架时梁的一部分基本上独立于框架弯曲。 因此，由施加到框架的力产生的影响不受梁的影响，或者至少被衰减，使得安装在梁上的部件的对准被基本保持。

公开(公告)号：US20060024004A1

公开(公告)日：2006-02-02

申请号：US11178624

申请日：2005-07-11

申请人： Stefan Pfnuer ,  Tengda Du ,  Kevin Zhang ,  Julie Eng ,  Axel Mehnert

发明人： Stefan Pfnuer ,  Tengda Du ,  Kevin Zhang ,  Julie Eng ,  Axel Mehnert

IPC分类号： G02B6/36

CPC分类号： G02B6/4201 ,  G02B6/36 ,  G02B6/4251

摘要： A package for maintaining alignment of components includes a frame and a beam with the beam attached to the frame and one end of the beam. One or more components are mounted to the beam. The frame and a portion of the beam are separated from each other by a channel which allows portions of the beam to flex substantially independently of the frame when a force is applied to the frame. Thus, the effects resulting from forces applied to the frame are not experienced by the beam, or are at least attenuated, so that the alignment of the components mounted on the beam is substantially preserved.

摘要翻译： 用于维持部件对准的包装件包括框架和梁，其中梁连接到框架和梁的一端。 一个或多个部件安装到梁上。 框架和梁的一部分通过通道分开，该通道允许当力施加到框架时梁的一部分基本上独立于框架弯曲。 因此，由施加到框架的力产生的影响不受梁的影响，或者至少被衰减，使得安装在梁上的部件的对准被基本保持。

公开(公告)号：US20160162421A1

公开(公告)日：2016-06-09

申请号：US14907649

申请日：2013-08-07

申请人： Xuhong XIONG ,  Kevin ZHANG ,  Xiaofeng YAN ,  Jack DU ,  QUALCOMM INCORPORATED

发明人： Xuhong Xiong ,  Kevin Zhang ,  Xiaofeng Yan ,  Jack Du

IPC分类号： G06F13/20 ,  G06F13/40 ,  G06F13/42

CPC分类号： G06F13/20 ,  G06F13/385 ,  G06F13/4068 ,  G06F13/4282 ,  G06F2213/3808 ,  Y02D10/14 ,  Y02D10/151

摘要： A method of reducing power consumption in a computing platform is disclosed. An endpoint-device that is coupled to the computing platform includes a first data buffer and a second data buffer. The first data buffer buffers outgoing data to be transmitted to an external device via a first communications medium. The second data buffer buffers incoming data received from the external device via the first communications medium. At least one of the first or second data buffers may selectively communicate with the computing platform, via a second communications medium, during an active window of the other data buffer. The active window may be requested by the first and/or second data buffers based, at least in part, on a system idle signal. For some embodiments, the first communications medium is an Ethernet link. Further, for some embodiments, the second communications medium is a Peripheral Component Interconnect Express (PCIe) link.

摘要翻译： 公开了一种降低计算平台功耗的方法。 耦合到计算平台的端点设备包括第一数据缓冲器和第二数据缓冲器。 第一数据缓冲器缓冲经由第一通信介质发送到外部设备的输出数据。 第二数据缓冲器缓冲经由第一通信介质从外部设备接收的输入数据。 第一或第二数据缓冲器中的至少一个可以在另一数据缓冲器的活动窗口期间经由第二通信介质选择性地与计算平台通信。 至少部分地基于系统空闲信号，可以由第一和/或第二数据缓冲器请求活动窗口。 对于一些实施例，第一通信介质是以太网链路。 此外，对于一些实施例，第二通信介质是外围组件互连Express（PCIe）链路。

公开(公告)号：US08982659B2

公开(公告)日：2015-03-17

申请号：US12645623

申请日：2009-12-23

申请人： Tsung-Yung Chang ,  Fatih Hamzaoglu ,  Gunjan H. Pandya ,  Siufu Chiu ,  Kevin Zhang ,  Wei Chen

发明人： Tsung-Yung Chang ,  Fatih Hamzaoglu ,  Gunjan H. Pandya ,  Siufu Chiu ,  Kevin Zhang ,  Wei Chen

IPC分类号： G11C5/14 ,  G11C7/12 ,  G11C11/413

CPC分类号： G11C7/12 ,  G11C5/141 ,  G11C11/413

摘要： Techniques are disclosed that allow for power conservation in integrated circuit memories, such as SRAM. The techniques can be embodied in circuitry that allows for floating of bitlines to eliminate or otherwise reduce power leakage associated with precharging bitlines. For instance, the techniques can be embodied in a bitline floating circuit having a single logic gate for qualifying the precharge control signal with a wake signal, so that precharging of the bitline does not occur if the wake signal is not in an active state. The techniques further allow for the elimination or reduction of unnecessary power consumption by the I/O circuitry or the memory array, such as when the memory array is not being accessed or when the array or a portion thereof is permanently disabled for yield recovery.

摘要翻译： 公开了允许诸如SRAM的集成电路存储器中的功率节省的技术。 这些技术可以体现在允许位线漂移以消除或以其他方式减少与预充电位线相关联的功率泄漏的电路中。 例如，这些技术可以体现在具有用于通过唤醒信号对预充电控制信号进行限定的单个逻辑门的位线浮动电路中，从而如果唤醒信号不处于活动状态，则不会发生预充电位线。 这些技术还允许消除或减少I / O电路或存储器阵列的不必要的功率消耗，例如当存储器阵列未被访问时或者当阵列或其一部分被永久禁用以用于产量恢复时。

公开(公告)号：US20120220981A1

公开(公告)日：2012-08-30

申请号：US13358391

申请日：2012-01-25

申请人： B. Chia Soo ,  Kang Ting ,  Ben Wu ,  Kevin Zhang

发明人： B. Chia Soo ,  Kang Ting ,  Ben Wu ,  Kevin Zhang

IPC分类号： A61M5/00 ,  B23P11/00

CPC分类号： A61M37/0015 ,  A61K9/0021 ,  A61M2037/0023 ,  A61M2037/0046 ,  A61M2037/0053 ,  A61M2037/0061 ,  Y10T29/49826

摘要： A transcutaneous multimodal delivery device for drug delivery and the methods of making and using the same are provided.

摘要翻译： 提供了用于药物递送的经皮多模式递送装置及其制造和使用方法。

公开(公告)号：US07981756B2

公开(公告)日：2011-07-19

申请号：US12317656

申请日：2008-12-22

申请人： Nick Lindert ,  Brian Doyle ,  Dinesh Somasekhar ,  Christopher J. Jezewski ,  Swaminathan Sivakumar ,  Kevin Zhang ,  Stephen Wu

发明人： Nick Lindert ,  Brian Doyle ,  Dinesh Somasekhar ,  Christopher J. Jezewski ,  Swaminathan Sivakumar ,  Kevin Zhang ,  Stephen Wu

IPC分类号： H01L21/20

CPC分类号： H01L27/101 ,  H01L28/90

摘要： A process of forming a semiconductive capacitor device for a memory circuit includes forming a first capacitor cell recess and a second capacitor cell recess that are spaced apart by a capacitor cell boundary of a first height. The process includes lowering the first height of the capacitor cell boundary to a second height. A common plate capacitor bridges between the first recess and the second recess over the boundary above the second height and below the first height.

摘要翻译： 形成用于存储电路的半导体电容器器件的工艺包括形成由第一高度的电容器单元边界隔开的第一电容器单元凹槽和第二电容器单元凹槽。 该过程包括将电容器单元边界的第一高度降低到第二高度。 普通的平板电容器在第一凹槽和第二凹槽之间跨过第二高度并低于第一高度的边界。

公开(公告)号：US20100046269A1

公开(公告)日：2010-02-25

申请号：US12229117

申请日：2008-08-20

申请人： Zhanping Chen ,  Sarvesh Kulkarni ,  Kevin Zhang

发明人： Zhanping Chen ,  Sarvesh Kulkarni ,  Kevin Zhang

IPC分类号： G11C17/00 ,  H01L21/82 ,  G11C11/34

CPC分类号： G11C17/16 ,  G11C17/18

摘要： An array of memory cells is disclosed. The memory cell includes a fuse and at least one transistor. The transistor is used to control the programming or sensing of the fuse. A program voltage is applied to a stack of first and second conductive layers. A first portion of the stack couples the program voltage to a terminal of the transistor in a cell. A second portion of the stack couples the program voltage to a terminal of the transistor in another cell.

摘要翻译： 公开了一组存储器单元。 存储单元包括熔丝和至少一个晶体管。 晶体管用于控制保险丝的编程或感测。 将编程电压施加到第一和第二导电层的堆叠。 堆叠的第一部分将编程电压耦合到单元中的晶体管的端子。 堆叠的第二部分将编程电压耦合到另一个单元中的晶体管的端子。

公开(公告)号：US07417913B2

公开(公告)日：2008-08-26

申请号：US11377135

申请日：2006-03-15

申请人： Zhanping Chen ,  Kevin Zhang

发明人： Zhanping Chen ,  Kevin Zhang

IPC分类号： G11C17/18

CPC分类号： G11C17/18 ,  G11C17/16

摘要： An apparatus, a method, and a system for fuse cells are disclosed herein. In various embodiments, a fuse cell may include circuitry to adjust a sensing margin. A fuse cell may include first and second fuse cells, and first and second resistance devices. The first resistance device may be configured to adjust a first voltage output from the first fuse cell, and the second resistance device may be configured to adjust a second voltage output from the second fuse cell. The first and second resistance devices may be configured adjust the first and second voltages asymmetrically.

摘要翻译： 本文公开了一种用于熔丝电池的装置，方法和系统。 在各种实施例中，熔丝单元可以包括用于调整感测余量的电路。 熔丝单元可以包括第一和第二熔丝单元，以及第一和第二电阻装置。 第一电阻装置可以被配置为调整从第一熔丝单元输出的第一电压，并且第二电阻装置可以被配置为调整从第二熔丝单元输出的第二电压。 第一和第二电阻装置可以被配置为不对称地调节第一和第二电压。