公开(公告)号：US07456459B2

公开(公告)日：2008-11-25

申请号：US11516377

申请日：2006-09-06

Applicant: Lixi Wan

Inventor： Lixi Wan

IPC: H01L27/108 ,  H01L29/76 ,  H01L29/94 ,  H01L31/119 ,  H01L29/04 ,  H01L29/12 ,  H01L31/036 ,  H01L31/112 ,  H01L29/786 ,  H01L29/80 ,  H01L29/00

CPC classification number: H05K1/162 ,  H05K3/4644 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09618 ,  H05K2201/09763 ,  Y10S257/908

Abstract: The present invention discloses capacitors having via connections and electrodes designed such that they provide a low inductance path, thus reducing needed capacitance, while enabling the use of embedded capacitors for power delivery and other uses. One embodiment of the present invention discloses a capacitor comprising the following: a top capacitor electrode and a bottom capacitor electrode, wherein the top electrode is smaller than the bottom electrode, comprising, on all sides of the capacitor; in an array, a multiplicity of vias located on all sides of the top and bottom capacitor electrodes, wherein the top electrode and the vias connecting to the top electrode act as an inner conductor, and the bottom electrode and the vias connecting to the bottom electrode act as an outer conductor.

Abstract translation: 本发明公开了具有通孔连接和电极的电容器，其设计成使得它们提供低电感路径，从而减少所需的电容，同时能够使用嵌入式电容器进行功率输送和其它用途。 本发明的一个实施例公开了一种电容器，包括：顶部电容器电极和底部电容器电极，其中顶部电极小于底部电极，包括在电容器的所有侧面上; 在阵列中，位于顶部和底部电容器电极的所有侧面上的多个通孔，其中顶部电极和连接到顶部电极的通孔用作内部导体，并且底部电极和连接到底部电极的通孔 作为外部导体。

公开(公告)号：US20070120225A1

公开(公告)日：2007-05-31

申请号：US11514097

申请日：2006-08-31

Applicant: Madhavan Swaminathan ,  Ege Engin ,  Lixi Wan ,  Prathap Muthana

Inventor： Madhavan Swaminathan ,  Ege Engin ,  Lixi Wan ,  Prathap Muthana

IPC: H01L29/93

CPC classification number: H05K1/162 ,  H01L23/49822 ,  H01L23/50 ,  H01L23/66 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K3/429 ,  H05K3/4602 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/09618 ,  H05K2201/09763 ,  Y10S257/904 ,  Y10S257/924 ,  H01L2924/00

Abstract: One embodiment of the present invention provides a device for providing a low noise power supply package to an IC in the mid-frequency range of 1 MHz to 3 GHz comprising installing in said package an array of embedded discrete ceramic capacitors, and optionally planar capacitor layers. A further embodiment provides a device for providing a low noise power supply package to an IC in the mid-frequency range of 1 MHz to 3 GHz comprising using an array of embedded discrete ceramic capacitors with different resonance frequencies, arranged in such a way that the capacitor array's impedance vs frequency curve in the critical mid-frequency range yields impedance values at or below a targeted impedance value.

Abstract translation: 本发明的一个实施例提供了一种用于在1MHz至3GHz的中频范围内向IC提供低噪声电源封装的装置，包括在所述封装中安装嵌入式分立陶瓷电容器阵列，以及可选的平面电容层 。 另一实施例提供了一种用于在1MHz至3GHz的中频范围内为IC提供低噪声电源封装的装置，其包括使用具有不同谐振频率的嵌入式分立陶瓷电容器阵列，其布置成使得 电容阵列的阻抗与临界中频范围内的频率曲线产生等于或低于目标阻抗值的阻抗值。

公开(公告)号：US20070108552A1

公开(公告)日：2007-05-17

申请号：US11516377

申请日：2006-09-06

Applicant: Lixi Wan

Inventor： Lixi Wan

IPC: H01L29/00

CPC classification number: H05K1/162 ,  H05K3/4644 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09618 ,  H05K2201/09763 ,  Y10S257/908

Abstract: The present invention discloses capacitors having via connections and electrodes designed such that they provide a low inductance path, thus reducing needed capacitance, while enabling the use of embedded capacitors for power delivery and other uses. One embodiment of the present invention discloses a capacitor comprising the following: a top capacitor electrode and a bottom capacitor electrode, wherein the top electrode is smaller than the bottom electrode, comprising, on all sides of the capacitor; in an array, a multiplicity of vias located on all sides of the top and bottom capacitor electrodes, wherein the top electrode and the vias connecting to the top electrode act as an inner conductor, and the bottom electrode and the vias connecting to the bottom electrode act as an outer conductor.

Abstract translation: 本发明公开了具有通孔连接和电极的电容器，其设计成使得它们提供低电感路径，从而减少所需的电容，同时能够使用嵌入式电容器进行功率输送和其它用途。 本发明的一个实施例公开了一种电容器，包括：顶部电容器电极和底部电容器电极，其中顶部电极小于底部电极，包括在电容器的所有侧面上; 在阵列中，位于顶部和底部电容器电极的所有侧面上的多个通孔，其中顶部电极和连接到顶部电极的通孔用作内部导体，并且底部电极和连接到底部电极的通孔 作为外部导体。

公开(公告)号：US07504706B2

公开(公告)日：2009-03-17

申请号：US11514097

申请日：2006-08-31

Applicant: Madhavan Swaminathan ,  Ege Engin ,  Lixi Wan ,  Prathap Muthana

Inventor： Madhavan Swaminathan ,  Ege Engin ,  Lixi Wan ,  Prathap Muthana

IPC: H01L29/00

CPC classification number: H05K1/162 ,  H01L23/49822 ,  H01L23/50 ,  H01L23/66 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K3/429 ,  H05K3/4602 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/09618 ,  H05K2201/09763 ,  Y10S257/904 ,  Y10S257/924 ,  H01L2924/00

Abstract: One embodiment of the present invention provides a device for providing a low noise power supply package to an IC in the mid-frequency range of 1 MHz to 3 GHz including installing in said package an array of embedded discrete ceramic capacitors, and optionally planar capacitor layers. A further embodiment provides a device for providing a low noise power supply package to an IC in the mid-frequency range of 1 MHz to 3 GHz including an array of embedded discrete ceramic capacitors with different resonance frequencies, arranged in such a way that the capacitor array's impedance vs frequency curve in the critical mid-frequency range yields impedance values at or below a targeted impedance value.

Abstract translation: 本发明的一个实施例提供了一种用于在1MHz至3GHz的中频范围内向IC提供低噪声电源封装的装置，包括在所述封装中安装嵌入式分立陶瓷电容器阵列，以及可选的平面电容层 。 另一实施例提供了一种用于在1MHz至3GHz的中频范围内向IC提供低噪声电源封装的装置，包括具有不同谐振频率的嵌入式分立陶瓷电容器阵列，其布置成使得电容器 阵列在关键中频范围内的阻抗与频率曲线产生等于或低于目标阻抗值的阻抗值。