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1.发明申请公开(公告)号：US20090094446A1
公开(公告)日：2009-04-09
申请号：US12277365
申请日：2008-11-25
IPC分类号： G06F15/177
CPC分类号： G06F1/206
摘要： A method for automatically initializing the operational settings of a system from information stored within a non-volatile storage of an integrated circuit so that the operational requirements of the integrated circuit, which may be a microprocessor, are met by the system when the system is operating. During manufacturing test environmental requirements of the integrated circuit are determined and stored within the non-volatile storage of the integrated circuit. During system initialization, environmental control values such as required operating voltage and frequency and cooling requirements are determined from the test values, which are read from the integrated circuit. The values are read by an interface of the system from an interface of the integrated circuit. System settings are controlled by the values to provide the required operating environment and the values may be captured within the system for subsequent operations and initialization sequences.
摘要翻译： 一种用于根据存储在集成电路的非易失性存储器中的信息自动初始化系统的操作设置的方法，使得当系统运行时系统满足可能是微处理器的集成电路的操作要求 。 在制造测试期间，集成电路的环境要求被确定并存储在集成电路的非易失性存储器内。 在系统初始化期间，从集成电路读取的测试值确定所需的工作电压，频率和冷却要求等环境控制值。 这些值由系统的接口从集成电路的接口读取。 系统设置由值控制以提供所需的操作环境，并且可以在系统内捕获值以用于后续操作和初始化序列。
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2.发明授权Integrated circuit environment initialization according to information stored within the integrated circuit 失效根据存储在集成电路内的信息，集成电路环境初始化公开(公告)号：US07996693B2
公开(公告)日：2011-08-09
申请号：US12277365
申请日：2008-11-25
IPC分类号： G06F1/26
CPC分类号： G06F1/206
摘要： A method for automatically initializing the operational settings of a system from information stored within a non-volatile storage of an integrated circuit so that the operational requirements of the integrated circuit, which may be a microprocessor, are met by the system when the system is operating. During manufacturing test, environmental requirements of the integrated circuit are determined and stored within the non-volatile storage of the integrated circuit. During system initialization, environmental control values such as required operating voltage and frequency and cooling requirements are determined from the test values, which are read from the integrated circuit. The values are read by an interface of the system from an interface of the integrated circuit. System settings are controlled by the values to provide the required operating environment and the values may be captured within the system for subsequent operations and initialization sequences.
摘要翻译： 一种用于根据存储在集成电路的非易失性存储器中的信息自动初始化系统的操作设置的方法，使得当系统运行时系统满足可能是微处理器的集成电路的操作要求 。 在制造测试期间，集成电路的环境要求被确定并存储在集成电路的非易失性存储器中。 在系统初始化期间，从集成电路读取的测试值确定所需的工作电压，频率和冷却要求等环境控制值。 这些值由系统的接口从集成电路的接口读取。 系统设置由值控制以提供所需的操作环境，并且可以在系统内捕获值以用于后续操作和初始化序列。
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3.发明授权公开(公告)号：US07472297B2
公开(公告)日：2008-12-30
申请号：US11304956
申请日：2005-12-15
IPC分类号： G06F1/26
CPC分类号： G06F1/206
摘要： A method for automatically initializing the operational settings of a system from information stored within a non-volatile storage of an integrated circuit so that the operational requirements of the integrated circuit, which may be a microprocessor, are met by the system when the system is operating. During manufacturing test, environmental requirements of the integrated circuit are determined and stored within the non-volatile storage of the integrated circuit. During system initialization, environmental control values such as required operating voltage and frequency and cooling requirements are determined from the test values, which are read from the integrated circuit. The values are read by an interface of the system from an interface of the integrated circuit. System settings are controlled by the values to provide the required operating environment and the values may be captured within the system for subsequent operations and initialization sequences.
摘要翻译： 一种用于根据存储在集成电路的非易失性存储器中的信息自动初始化系统的操作设置的方法，使得当系统运行时系统满足可能是微处理器的集成电路的操作要求 。 在制造测试期间，集成电路的环境要求被确定并存储在集成电路的非易失性存储器中。 在系统初始化期间，从集成电路读取的测试值确定所需的工作电压，频率和冷却要求等环境控制值。 这些值由系统的接口从集成电路的接口读取。 系统设置由值控制以提供所需的操作环境，并且可以在系统内捕获值以用于后续操作和初始化序列。
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公开(公告)号：US5761078A
公开(公告)日：1998-06-02
申请号：US618060
申请日：1996-03-21
申请人： Christine Marie Fuller , Scott Whitney Gould , Steven Paul Hartman , Eric Ernest Millham , Gulsun Yasar
发明人： Christine Marie Fuller , Scott Whitney Gould , Steven Paul Hartman , Eric Ernest Millham , Gulsun Yasar
IPC分类号： G06F17/50
CPC分类号： G06F17/5068
摘要： A computer implemented method for the automated placement and routing in the design of field programmable gate arrays achieves optimal timing. In a library of primitives and macros from which a designer may choose to implement a given circuit design, at least some of said macros are "semi-hard" macros where direct connections and relative placements are specified while local bus routing is requested in a manner that does not restrict macro placement. A logical netlist containing references to macros and how to connect them together to perform a logical function is first created. The logical netlist is then translated to a physical netlist using a mapper function. This physical netlist for the semi-hard macros specifies what is to be connected but not how. The best place to put each macro on the field programmable gate array is found using a placer function. The placer function thus determines an absolute position of the macros. Pre-defined macro direct connections are routed using a router function. The router function determines an optimal path to connect the semi-hard macros. Finally, a bitstream is generated from placement and routing information developed by the placer and router functions to program the field programmable gate array to perform the netlist logical function.
摘要翻译： 用于现场可编程门阵列设计中的自动放置和布线的计算机实现方法实现了最佳的定时。 在设计者可以选择实现给定电路设计的原语和宏的库中，至少一些所述宏是“半硬”宏，其中指定了直接连接和相对放置，同时以某种方式请求本地总线路由 这不会限制宏放置。 首先创建包含对宏的引用以及如何将它们连接在一起以执行逻辑功能的逻辑网表。 然后使用映射器函数将逻辑网表转换为物理网表。 这个半硬宏的物理网表指定了要连接的内容，但不是如何。 使用放置功能可以找到将每个宏放在现场可编程门阵列上的最佳位置。 因此，放置函数决定宏的绝对位置。 使用路由器功能路由预定义的宏直连。 路由器功能确定连接半硬宏的最佳路径。 最后，由放置器和路由器开发的放置和路由信息生成比特流，以对现场可编程门阵列进行编程以执行网表逻辑功能。
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5.发明授权System and method to maintain data processing system operation in degraded system cooling condition 有权系统和方法保持数据处理系统在系统冷却状态下的运行公开(公告)号：US07353409B2
公开(公告)日：2008-04-01
申请号：US10880265
申请日：2004-06-29
申请人： Steven Paul Hartman , Van Hoa Lee
发明人： Steven Paul Hartman , Van Hoa Lee
CPC分类号： G06F1/206
摘要： A method, computer program product, and a data processing system for maintaining operation of the data processing system in the event of a degraded system cooling condition is provided. A first temperature of a processor is identified as equaling or exceeding a processor throttling threshold. The operational frequency of the processor is reduced by a first frequency increment. The operational voltage of the processor is then reduced by a first voltage increment. Updated values of the processor temperature are periodically obtained and continued reductions in the frequency and operational voltage are made until the temperature indicates that the processor is operating in a stable throttle range. The frequency and operational voltage of the processor may be returned to normal levels when an updated temperature of the processor is less or equal to a throttle off threshold.
摘要翻译： 提供了一种在系统冷却条件恶化的情况下维持数据处理系统的操作的方法，计算机程序产品和数据处理系统。 处理器的第一温度被识别为等于或超过处理器限流阈值。 处理器的工作频率减小了第一个频率增量。 然后，处理器的工作电压减小第一电压增量。 定期获得处理器温度的更新值，并持续降低频率和工作电压，直到温度指示处理器在稳定的节流范围内运行。 当处理器的更新温度小于或等于节流阀关闭阈值时，处理器的频率和操作电压可以恢复到正常水平。
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6.发明授权Method and system for optimizing a critical path in a field programmable gate array configuration 失效用于优化现场可编程门阵列配置中的关键路径的方法和系统
公开(公告)号：US5764954A
公开(公告)日：1998-06-09
申请号：US518515
申请日：1995-08-23
CPC分类号： G06F17/5054 , G06F17/5068
摘要： In a Field Programmable Gate Array ("FPGA") design system, a configuration is generated. A path of the configuration is selected as a critical path for optimization. The critical path is optimized by rerouting connections between the logical primitives of the critical path. Prior to the rerouting, the logical primitives of the critical path may be optimally placed within the FPGA configuration. Optimal performance of the critical path is thus achieved.
摘要翻译： 在现场可编程门阵列（“FPGA”）设计系统中，生成一个配置。 选择配置的路径作为优化的关键路径。 关键路径通过重新路由关键路径的逻辑基元之间的连接来优化。 在重新路由之前，关键路径的逻辑原语可能被最佳地置于FPGA配置中。 因此实现了关键路径的最佳性能。
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7.发明授权公开(公告)号：US08055477B2
公开(公告)日：2011-11-08
申请号：US12274534
申请日：2008-11-20
申请人： Harold W. Chase , Soraya Ghiasi , Michael Stephen Floyd , Joshua David Friedrich , Steven Paul Hartman , Norman Karl James , Malcolm Scott Ware , Richard L. Willaman
发明人： Harold W. Chase , Soraya Ghiasi , Michael Stephen Floyd , Joshua David Friedrich , Steven Paul Hartman , Norman Karl James , Malcolm Scott Ware , Richard L. Willaman
IPC分类号： G06F15/00
CPC分类号： G06F11/24
摘要： A benchmark tester retrieves a voltage margin that corresponds to a device that a system includes. The voltage margin indicates an additional amount of voltage to apply to a nominal voltage that, when added, results in the device operating at a power limit while executing a worst-case power workload. Next, the benchmark tester (or thermal power management device) sets an input voltage for the device to a value equal to the sum of the voltage margin and the nominal voltage. The benchmark tester then dynamically benchmark tests the system, which includes adjusting the device's frequency and input voltage while ensuring that the device does not exceed the device's power limit. In turn, the benchmark tester records a guaranteed minimum performance boost for the system based upon a result of the benchmark testing.
摘要翻译： 基准测试仪检索与系统包括的设备相对应的电压裕度。 电压裕度表示额外的电压值，以适用于额定电压，当加入时，会导致器件在执行最坏情况下的工作负载时工作在功率极限。 接下来，基准测试器（或热功率管理器件）将器件的输入电压设置为等于电压裕度和额定电压之和的值。 基准测试仪然后动态基准测试系统，包括调整设备的频率和输入电压，同时确保设备不超过设备的功率限制。 反过来，基准测试人员会根据基准测试的结果记录系统的最低性能保证。
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公开(公告)号：US5748009A
公开(公告)日：1998-05-05
申请号：US707840
申请日：1996-09-09
申请人： Allan Robert Bertolet , Kim P. N. Clinton , Christine Marie Fuller , Scott Whitney Gould , Steven Paul Hartman , Joseph Andrew Iadanza , Frank Ray Keyser , Eric Ernest Millham , Timothy Shawn Reny , Brian A. Worth , Gulson Yasar , Terrance John Zittritsch
发明人： Allan Robert Bertolet , Kim P. N. Clinton , Christine Marie Fuller , Scott Whitney Gould , Steven Paul Hartman , Joseph Andrew Iadanza , Frank Ray Keyser , Eric Ernest Millham , Timothy Shawn Reny , Brian A. Worth , Gulson Yasar , Terrance John Zittritsch
IPC分类号： H03K19/177 , H03K19/173
CPC分类号： H03K19/1737
摘要： A programmable logic cell has four logic gates, two of which are configurable. The two configurable logic gates are positioned near the logic cell inputs. Each configurable logic gate has two inputs, each input being connected to one of the four logic cell inputs. The remaining two logic gates receive the outputs of the configurable logic gates. Four independent logic cell input nodes are provided, each having associated therewith a programmable input multiplexer. Each input multiplexer can have inputs connected to at least two types of interconnect conductors. The cell also has two output paths, each having associated therewith an independently-controlled output multiplexer. The output of each output multiplexer is connected to an input of the other output multiplexer. Additional features include a multiplexer having inputs connected to two cell input nodes, a select input connected to a third logic cell input node, and an output connected to a cell output node; a system low-skew data (e.g., clock) input available to at least one of the input multiplexers; a flip-flop connected within the logic cell; and internal cell feedback. The preferred method of programming utilizes user-programmed SRAM memory cells.
摘要翻译： 可编程逻辑单元具有四个逻辑门，其中两个可配置。 两个可配置逻辑门位于逻辑单元输入附近。 每个可配置逻辑门具有两个输入，每个输入连接到四个逻辑单元输入之一。 剩余的两个逻辑门接收可配置逻辑门的输出。 提供四个独立的逻辑单元输入节点，每个具有与可编程输入多路复用器相关联的逻辑单元输入节点。 每个输入多路复用器可以具有连接到至少两种类型的互连导体的输入。 该单元还具有两个输出路径，每个输出路径与其相关联，具有独立控制的输出多路复用器。 每个输出多路复用器的输出连接到另一个输出多路复用器的输入端。 附加特征包括具有连接到两个单元输入节点的输入的多路复用器，连接到第三逻辑单元输入节点的选择输入和连接到单元输出节点的输出; 用于至少一个输入多路复用器的系统低偏移数据（例如，时钟）输入; 连接在逻辑单元内的触发器; 和内部单元反馈。 优选的编程方法利用用户编程的SRAM存储单元。
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9.发明申请公开(公告)号：US20100125436A1
公开(公告)日：2010-05-20
申请号：US12274534
申请日：2008-11-20
申请人： Harold W. Chase , Soraya Ghiasi , Michael Stephen Floyd , Joshua David Friedrich , Steven Paul Hartman , Norman Karl James , Malcolm Scott Ware , Richard L. Willaman
发明人： Harold W. Chase , Soraya Ghiasi , Michael Stephen Floyd , Joshua David Friedrich , Steven Paul Hartman , Norman Karl James , Malcolm Scott Ware , Richard L. Willaman
IPC分类号： G06F15/00
CPC分类号： G06F11/24
摘要： A benchmark tester retrieves a voltage margin that corresponds to a device that a system includes. The voltage margin indicates an additional amount of voltage to apply to a nominal voltage that, when added, results in the device operating at a power limit while executing a worst-case power workload. Next, the benchmark tester (or thermal power management device) sets an input voltage for the device to a value equal to the sum of the voltage margin and the nominal voltage. The benchmark tester then dynamically benchmark tests the system, which includes adjusting the device's frequency and input voltage while ensuring that the device does not exceed the device's power limit. In turn, the benchmark tester records a guaranteed minimum performance boost for the system based upon a result of the benchmark testing.
摘要翻译： 基准测试仪检索与系统包括的设备相对应的电压裕度。 电压裕度表示额外的电压值，以适用于额定电压，当加入时，会导致器件在执行最坏情况下的工作负载时工作在功率极限。 接下来，基准测试器（或热功率管理器件）将器件的输入电压设置为等于电压裕度和额定电压之和的值。 基准测试仪然后动态基准测试系统，包括调整设备的频率和输入电压，同时确保设备不超过设备的功率限制。 反过来，基准测试人员会根据基准测试的结果记录系统的最低性能保证。
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公开(公告)号：US5878377A
公开(公告)日：1999-03-02
申请号：US826852
申请日：1997-04-10
CPC分类号： G06F11/3058 , G06F11/3051 , G06F11/3093 , G06F11/00 , G06F11/004 , G06F11/006
摘要： One aspect of the invention relates to an apparatus for detecting environmental faults in a computer system. In one version of the invention, the apparatus includes a means for measuring a physical parameter with a sensor coupled to the computer system, the sensor being associated with a sensor type and identification code; a means for transmitting a signal from the sensor to the computer system, the signal being responsive to the measurement; a means for determining whether an environmental fault condition exists by comparing the signal to a pre-determined threshold; means for determining an error type, identification code and sensor type; and a means for writing fault data to an environmental warning register, the fault data comprising the sensor type, identification code and error type.
摘要翻译： 本发明的一个方面涉及一种用于检测计算机系统中的环境故障的装置。 在本发明的一个版本中，该装置包括用于利用耦合到计算机系统的传感器来测量物理参数的装置，该传感器与传感器类型和识别码相关联; 用于将信号从所述传感器发送到所述计算机系统的装置，所述信号响应于所述测量; 用于通过将所述信号与预定阈值进行比较来确定是否存在环境故障条件的装置; 用于确定错误类型，识别码和传感器类型的装置; 以及用于将故障数据写入环境警告寄存器的装置，所述故障数据包括传感器类型，识别码和错误类型。
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