公开(公告)号：US20140065797A1

公开(公告)日：2014-03-06

申请号：US14072653

申请日：2013-11-05

申请人： Madhava Rao Yalamanchili ,  Wei-Sheng Lei ,  Brad Eaton ,  Saravjeet Singh ,  Ajay Kumar ,  Banqiu Wu

发明人： Madhava Rao Yalamanchili ,  Wei-Sheng Lei ,  Brad Eaton ,  Saravjeet Singh ,  Ajay Kumar ,  Banqiu Wu

IPC分类号： H01L21/78

CPC分类号： H01L21/78 ,  B23K26/0624 ,  B23K26/364 ,  B23K26/40 ,  B23K2101/40 ,  B23K2103/172 ,  B23K2103/50 ,  H01L21/30655 ,  H01L21/3086 ,  H01L21/67207

摘要： Methods of dicing substrates by both laser scribing and plasma etching. A method includes forming an in-situ mask with a plasma etch chamber by accumulating a thickness of plasma deposited polymer to protect IC bump surfaces from a subsequent plasma etch. Second mask materials, such as a water soluble mask material may be utilized along with the plasma deposited polymer. At least some portion of the mask is patterned with a femtosecond laser scribing process to provide a patterned mask with trenches. The patterning exposing regions of the substrate between the ICs in which the substrate is plasma etched to singulate the IC and the water soluble material layer washed off.

摘要翻译： 通过激光划线和等离子体蚀刻来切割基板的方法。 一种方法包括通过累积等离子体沉积聚合物的厚度来形成具有等离子体蚀刻室的原位掩模，以保护IC凸起表面免于随后的等离子体蚀刻。 可以与等离子体沉积的聚合物一起使用第二掩模材料，例如水溶性掩模材料。 用飞秒激光划线工艺对掩模的至少一部分进行图案化以提供具有沟槽的图案化掩模。 在IC之间的衬底的图案化曝光区域中，其中衬底被等离子体蚀刻以分离IC和水溶性材料层被洗掉。

公开(公告)号：US08598016B2

公开(公告)日：2013-12-03

申请号：US13160973

申请日：2011-06-15

申请人： Madhava Rao Yalamanchili ,  Wei-Sheng Lei ,  Brad Eaton ,  Saravjeet Singh ,  Ajay Kumar ,  Banqiu Wu

发明人： Madhava Rao Yalamanchili ,  Wei-Sheng Lei ,  Brad Eaton ,  Saravjeet Singh ,  Ajay Kumar ,  Banqiu Wu

IPC分类号： H01L21/00

CPC分类号： H01L21/78 ,  B23K26/0624 ,  B23K26/364 ,  B23K26/40 ,  B23K2101/40 ,  B23K2103/172 ,  B23K2103/50 ,  H01L21/30655 ,  H01L21/3086 ,  H01L21/67207

摘要： Methods of dicing substrates by both laser scribing and plasma etching. A method includes forming an in-situ mask with a plasma etch chamber by accumulating a thickness of plasma deposited polymer to protect IC bump surfaces from a subsequent plasma etch. Second mask materials, such as a water soluble mask material may be utilized along with the plasma deposited polymer. At least some portion of the mask is patterned with a femtosecond laser scribing process to provide a patterned mask with trenches. The patterning exposing regions of the substrate between the ICs in which the substrate is plasma etched to singulate the IC and the water soluble material layer washed off.

摘要翻译： 通过激光划线和等离子体蚀刻来切割基板的方法。 一种方法包括通过累积等离子体沉积聚合物的厚度来形成具有等离子体蚀刻室的原位掩模，以保护IC凸起表面免于随后的等离子体蚀刻。 可以与等离子体沉积的聚合物一起使用第二掩模材料，例如水溶性掩模材料。 用飞秒激光划线工艺对掩模的至少一部分进行图案化以提供具有沟槽的图案化掩模。 在IC之间的衬底的图案化曝光区域中，其中衬底被等离子体蚀刻以分离IC和水溶性材料层被洗掉。

公开(公告)号：US08703581B2

公开(公告)日：2014-04-22

申请号：US13160891

申请日：2011-06-15

申请人： Wei-Sheng Lei ,  Saravjeet Singh ,  Madhava Rao Yalamanchili ,  Brad Eaton ,  Ajay Kumar

发明人： Wei-Sheng Lei ,  Saravjeet Singh ,  Madhava Rao Yalamanchili ,  Brad Eaton ,  Ajay Kumar

IPC分类号： H01L21/00

CPC分类号： H01L21/67207 ,  B23K26/0624 ,  B23K26/064 ,  B23K26/364 ,  B23K26/40 ,  B23K2101/40 ,  B23K2103/172 ,  B23K2103/50 ,  H01L21/30655 ,  H01L21/3081 ,  H01L21/67069 ,  H01L21/6836 ,  H01L21/78 ,  H01L2221/68327

摘要： Methods of dicing substrates having a plurality of ICs. A method includes forming a mask comprising a water soluble material layer over the semiconductor substrate. The mask is patterned with a femtosecond laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the substrate between the ICs. The substrate is then etched through the gaps in the patterned mask to singulate the IC and the water soluble material layer washed off.

摘要翻译： 公开了具有多个IC的切割衬底的方法。 一种方法包括在半导体衬底上形成包含水溶性材料层的掩模。 用飞秒激光划线工艺对掩模进行图案化以提供具有间隙的图案化掩模。 图案化使IC之间的衬底的区域暴露。 然后将衬底通过图案化掩模中的间隙进行蚀刻，以对IC进行分离，并将水溶性材料层冲洗掉。

公开(公告)号：US08642448B2

公开(公告)日：2014-02-04

申请号：US13160713

申请日：2011-06-15

申请人： Wei-Sheng Lei ,  Brad Eaton ,  Madhava Rao Yalamanchili ,  Saravjeet Singh ,  Ajay Kumar ,  James M. Holden

发明人： Wei-Sheng Lei ,  Brad Eaton ,  Madhava Rao Yalamanchili ,  Saravjeet Singh ,  Ajay Kumar ,  James M. Holden

IPC分类号： H01L21/00

CPC分类号： H01L21/822 ,  B23K26/36 ,  H01J37/32889 ,  H01J37/32899 ,  H01L21/3065 ,  H01L21/3083 ,  H01L21/67069 ,  H01L21/67092 ,  H01L21/67207 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/544 ,  H01L2221/68327 ,  H01L2924/0002 ,  H01L2924/00

摘要： Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask is composed of a layer covering and protecting the integrated circuits. The mask is patterned with a femtosecond-based laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits.

摘要翻译： 对具有多个集成电路的每个晶片进行切割的半导体晶片的方法进行了说明。 一种方法包括在半导体晶片上形成掩模。 掩模由覆盖和保护集成电路的层组成。 使用基于飞秒的激光划线工艺对掩模进行图案化以提供具有间隙的图案化掩模。 图案化使得集成电路之间的半导体晶片的区域露出。 然后通过图案化掩模中的间隙蚀刻半导体晶片，以对集成电路进行分离。

公开(公告)号：US20120322239A1

公开(公告)日：2012-12-20

申请号：US13161052

申请日：2011-06-15

申请人： Saravjeet Singh ,  Brad Eaton ,  Ajay Kumar ,  Wei-Sheng Lei ,  James M. Holden ,  Madhava Rao Yalamanchili ,  Todd J. Egan

发明人： Saravjeet Singh ,  Brad Eaton ,  Ajay Kumar ,  Wei-Sheng Lei ,  James M. Holden ,  Madhava Rao Yalamanchili ,  Todd J. Egan

IPC分类号： H01L21/82 ,  C23F1/08 ,  H01L21/3065

CPC分类号： H01L21/67069 ,  B23K26/0624 ,  B23K26/064 ,  B23K26/36 ,  B23K26/364 ,  B23K26/40 ,  B23K26/402 ,  B23K2103/172 ,  B23K2103/50 ,  H01L21/3065 ,  H01L21/3081 ,  H01L21/67092 ,  H01L21/67207 ,  H01L21/6836 ,  H01L21/68707 ,  H01L21/78 ,  H01L2221/68327 ,  H01L2221/68377

摘要： Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the integrated circuits. The semiconductor wafer is supported by a substrate carrier. The mask is then patterned with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits while supported by the substrate carrier.

摘要翻译： 对具有多个集成电路的每个晶片进行切割的半导体晶片的方法进行了说明。 一种方法包括在半导体晶片上形成掩模，掩模由覆盖并保护集成电路的层组成。 半导体晶片由衬底载体支撑。 然后用激光划线工艺对掩模进行构图，以提供具有间隙的图案化掩模，暴露集成电路之间的半导体晶片的区域。 然后通过图案化掩模中的间隙蚀刻半导体晶片，以在由衬底载体支撑的同时对集成电路进行分离。

公开(公告)号：US20140017880A1

公开(公告)日：2014-01-16

申请号：US13938537

申请日：2013-07-10

申请人： Wei-Sheng LEI ,  Brad Eaton ,  Madhava Rao Yalamanchili ,  Saravjeet Singh ,  Ajay Kumar

发明人： Wei-Sheng LEI ,  Brad Eaton ,  Madhava Rao Yalamanchili ,  Saravjeet Singh ,  Ajay Kumar

IPC分类号： H01L21/78

CPC分类号： H01L21/78 ,  H01L21/02013 ,  H01L21/02016 ,  H01L21/02019 ,  H01L21/027 ,  Y10T29/5124

摘要： Front side laser scribing and plasma etch are performed followed by back side grind to singulate integrated circuit chips (ICs). A mask is formed covering ICs formed on the wafer, as well as any bumps providing an interface to the ICs. The mask is patterned by laser scribing to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer, below thin film layers from which the ICs are formed. The semiconductor wafer is then etched through the gaps in the patterned mask to advance a front of an etched trench partially through the semiconductor wafer thickness. The front side mask is removed, a backside grind tape applied to the front side, and a back side grind performed to reach the etched trench, thereby singulating the ICs.

公开(公告)号：US20120322237A1

公开(公告)日：2012-12-20

申请号：US13161036

申请日：2011-06-15

申请人： Wei-Sheng Lei ,  Saravjeet Singh ,  Madhava Rao Yalamanchili ,  Brad Eaton ,  Ajay Kumar

发明人： Wei-Sheng Lei ,  Saravjeet Singh ,  Madhava Rao Yalamanchili ,  Brad Eaton ,  Ajay Kumar

IPC分类号： H01L21/78 ,  C23F1/08

CPC分类号： B23K26/40 ,  B23K26/0624 ,  B23K26/364 ,  B23K2103/172 ,  B23K2103/50 ,  H01L21/3081 ,  H01L21/31127 ,  H01L21/78

摘要： Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask covers and protects the integrated circuits. The mask is patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to form singulated integrated circuits. The patterned mask is then separated from the singulated integrated circuits.

摘要翻译： 对具有多个集成电路的每个晶片进行切割的半导体晶片的方法进行了说明。 一种方法包括在半导体晶片上形成掩模。 面罩覆盖并保护集成电路。 用激光划线工艺对掩模进行图案化以提供具有间隙的图案化掩模。 图案化使得集成电路之间的半导体晶片的区域露出。 然后通过图案化掩模中的间隙蚀刻半导体晶片，以形成单独的集成电路。 然后将图案化掩模与单个集成电路分离。

公开(公告)号：US20120322236A1

公开(公告)日：2012-12-20

申请号：US13161026

申请日：2011-06-15

申请人： Wei-Sheng Lei ,  Saravjeet Singh ,  Madhava Rao Yalamanchili ,  Brad Eaton ,  Ajay Kumar

发明人： Wei-Sheng Lei ,  Saravjeet Singh ,  Madhava Rao Yalamanchili ,  Brad Eaton ,  Ajay Kumar

IPC分类号： H01L21/82 ,  C23F1/08

CPC分类号： H01L21/3086 ,  B23K26/06 ,  B23K26/0622 ,  B23K26/0624 ,  B23K26/0626 ,  B23K26/364 ,  B23K26/40 ,  B23K2103/172 ,  B23K2103/50 ,  H01L21/67207 ,  H01L21/78

摘要： Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask is composed of a layer covering and protecting the integrated circuits. The mask is patterned with a pulse train laser scribing process using multiple-pulse bursts to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits.

摘要翻译： 对具有多个集成电路的每个晶片进行切割的半导体晶片的方法进行了说明。 一种方法包括在半导体晶片上形成掩模。 掩模由覆盖和保护集成电路的层组成。 使用多脉冲脉冲串的脉冲串激光划线方法对掩模进行构图，以提供具有间隙的图案化掩模。 图案化使得集成电路之间的半导体晶片的区域露出。 然后通过图案化掩模中的间隙蚀刻半导体晶片，以对集成电路进行分离。

公开(公告)号：US20110312157A1

公开(公告)日：2011-12-22

申请号：US13160713

申请日：2011-06-15

申请人： Wei-Sheng Lei ,  Brad Eaton ,  Madhava Rao Yalamanchili ,  Saravjeet Singh ,  Ajay Kumar ,  James M. Holden

发明人： Wei-Sheng Lei ,  Brad Eaton ,  Madhava Rao Yalamanchili ,  Saravjeet Singh ,  Ajay Kumar ,  James M. Holden

IPC分类号： H01L21/822 ,  H01L21/3065 ,  H01L21/82

CPC分类号： H01L21/822 ,  B23K26/36 ,  H01J37/32889 ,  H01J37/32899 ,  H01L21/3065 ,  H01L21/3083 ,  H01L21/67069 ,  H01L21/67092 ,  H01L21/67207 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/544 ,  H01L2221/68327 ,  H01L2924/0002 ,  H01L2924/00

摘要： Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask is composed of a layer covering and protecting the integrated circuits. The mask is patterned with a femtosecond-based laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits.

摘要翻译： 对具有多个集成电路的每个晶片进行切割的半导体晶片的方法进行了说明。 一种方法包括在半导体晶片上形成掩模。 掩模由覆盖和保护集成电路的层组成。 使用基于飞秒的激光划线工艺对掩模进行图案化以提供具有间隙的图案化掩模。 图案化使得集成电路之间的半导体晶片的区域露出。 然后通过图案化掩模中的间隙蚀刻半导体晶片，以对集成电路进行分离。

公开(公告)号：US08912077B2

公开(公告)日：2014-12-16

申请号：US13161052

申请日：2011-06-15

申请人： Saravjeet Singh ,  Brad Eaton ,  Ajay Kumar ,  Wei-Sheng Lei ,  James M. Holden ,  Madhava Rao Yalamanchili ,  Todd J. Egan

发明人： Saravjeet Singh ,  Brad Eaton ,  Ajay Kumar ,  Wei-Sheng Lei ,  James M. Holden ,  Madhava Rao Yalamanchili ,  Todd J. Egan

IPC分类号： H01L21/00

CPC分类号： H01L21/67069 ,  B23K26/0624 ,  B23K26/064 ,  B23K26/36 ,  B23K26/364 ,  B23K26/40 ,  B23K26/402 ,  B23K2103/172 ,  B23K2103/50 ,  H01L21/3065 ,  H01L21/3081 ,  H01L21/67092 ,  H01L21/67207 ,  H01L21/6836 ,  H01L21/68707 ,  H01L21/78 ,  H01L2221/68327 ,  H01L2221/68377

摘要： Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the integrated circuits. The semiconductor wafer is supported by a substrate carrier. The mask is then patterned with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits while supported by the substrate carrier.

摘要翻译： 对具有多个集成电路的每个晶片进行切割的半导体晶片的方法进行了说明。 一种方法包括在半导体晶片上形成掩模，掩模由覆盖并保护集成电路的层组成。 半导体晶片由衬底载体支撑。 然后用激光划线工艺对掩模进行构图，以提供具有间隙的图案化掩模，暴露集成电路之间的半导体晶片的区域。 然后通过图案化掩模中的间隙蚀刻半导体晶片，以在由衬底载体支撑的同时对集成电路进行分离。