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    LASER AND PLASMA ETCH WAFER DICING USING PHYSICALLY-REMOVABLE MASK
    6.
    发明申请
    LASER AND PLASMA ETCH WAFER DICING USING PHYSICALLY-REMOVABLE MASK 有权
    激光和等离子体刻蚀使用物理可拆卸的面膜

    公开(公告)号：US20120322237A1

    公开(公告)日：2012-12-20

    申请号：US13161036

    申请日：2011-06-15

    申请人： Wei-Sheng Lei ,  Saravjeet Singh ,  Madhava Rao Yalamanchili ,  Brad Eaton ,  Ajay Kumar

    发明人： Wei-Sheng Lei ,  Saravjeet Singh ,  Madhava Rao Yalamanchili ,  Brad Eaton ,  Ajay Kumar

    IPC分类号： H01L21/78 ,  C23F1/08

    CPC分类号： B23K26/40 ,  B23K26/0624 ,  B23K26/364 ,  B23K2103/172 ,  B23K2103/50 ,  H01L21/3081 ,  H01L21/31127 ,  H01L21/78

    摘要： Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask covers and protects the integrated circuits. The mask is patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to form singulated integrated circuits. The patterned mask is then separated from the singulated integrated circuits.

    摘要翻译： 对具有多个集成电路的每个晶片进行切割的半导体晶片的方法进行了说明。 一种方法包括在半导体晶片上形成掩模。 面罩覆盖并保护集成电路。 用激光划线工艺对掩模进行图案化以提供具有间隙的图案化掩模。 图案化使得集成电路之间的半导体晶片的区域露出。 然后通过图案化掩模中的间隙蚀刻半导体晶片，以形成单独的集成电路。 然后将图案化掩模与单个集成电路分离。

    LASER, PLASMA ETCH, AND BACKSIDE GRIND PROCESS FOR WAFER DICING
    10.
    发明申请
    LASER, PLASMA ETCH, AND BACKSIDE GRIND PROCESS FOR WAFER DICING 审中-公开
    激光，等离子体蚀刻和背面磨砂工艺

    公开(公告)号：US20140363952A1

    公开(公告)日：2014-12-11

    申请号：US14466671

    申请日：2014-08-22

    申请人： Wei-Sheng Lei ,  Brad Eaton ,  Madhava Rao Yalamanchili ,  Saravjeet Singh ,  Ajay Kumar

    发明人： Wei-Sheng Lei ,  Brad Eaton ,  Madhava Rao Yalamanchili ,  Saravjeet Singh ,  Ajay Kumar

    IPC分类号： H01L21/78 ,  H01L21/02 ,  H01L21/027

    CPC分类号： H01L21/78 ,  H01L21/02013 ,  H01L21/02016 ,  H01L21/02019 ,  H01L21/027 ,  Y10T29/5124

    摘要： Front side laser scribing and plasma etch are performed followed by back side grind to singulate integrated circuit chips (ICs). A mask is formed covering ICs formed on the wafer, as well as any bumps providing an interface to the ICs. The mask is patterned by laser scribing to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer, below thin film layers from which the ICs are formed. The semiconductor wafer is then etched through the gaps in the patterned mask to advance a front of an etched trench partially through the semiconductor wafer thickness. The front side mask is removed, a backside grind tape applied to the front side, and a back side grind performed to reach the etched trench, thereby singulating the ICs.

    摘要翻译： 执行前侧激光划线和等离子体蚀刻，然后进行背面研磨以分离集成电路芯片（IC）。 形成覆盖在晶片上形成的IC的掩模，以及提供与IC的接口的任何凸块。 通过激光划线将掩模图案化以提供具有间隙的图案化掩模。 图案化使得半导体晶片的区域在形成IC的薄膜层之下露出。 然后通过图案化掩模中的间隙蚀刻半导体晶片，以使蚀刻沟槽的前部部分地延伸穿过半导体晶片厚度。 去除前侧面罩，施加到前侧的背面研磨带，和进行到蚀刻沟槽的后侧研磨，由此分离IC。