Fluorescent lamp, method for manufacturing the same, and fluorescent lamp device
    2.
    发明授权
    Fluorescent lamp, method for manufacturing the same, and fluorescent lamp device 失效
    荧光灯,其制造方法以及荧光灯装置

    公开(公告)号:US06756723B2

    公开(公告)日:2004-06-29

    申请号:US10034322

    申请日:2002-01-03

    IPC分类号: H01J6100

    摘要: A fluorescent lamp having a stem provided with first and second lead wires for energization of an electrode and an electrically-insulating member provided therein with a first hole and a second hole larger in cross-sectional area than said second lead wire. The first and second lead wires are inserted in the first and second holes of the electrically-insulating member, respectively, and an outer diameter of a glass envelope of the fluorescent lamp is not smaller than 13 mm and not larger than 29 mm.

    摘要翻译: 一种荧光灯,具有设置有用于激励电极的第一和第二引线以及设置在其中的电绝缘部件的杆,所述第一和第二引线具有比所述第二引线更大的横截面积的第一孔和第二孔。 第一和第二引线分别插入电绝缘构件的第一和第二孔中,荧光灯的玻璃外壳的外径不小于13mm且不大于29mm。

    Tecoma plant named ‘Sunhortedai’

    公开(公告)号:USPP29169P2

    公开(公告)日:2018-04-03

    申请号:US15530290

    申请日:2016-12-19

    IPC分类号: A01H5/02

    CPC分类号: A01H5/02

    摘要: A new and distinct cultivar of Tecoma plant named ‘Sunhortedai’, characterized by its upright and relatively compact plant habit; vigorous growth habit; freely branching habit; early and freely flowering habit; flowering under high temperature conditions; greyed orange-colored flowers; and low temperature tolerant.

    Plasma processing method and plasma processing apparatus
    5.
    发明申请
    Plasma processing method and plasma processing apparatus 失效
    等离子体处理方法和等离子体处理装置

    公开(公告)号:US20070077737A1

    公开(公告)日:2007-04-05

    申请号:US10580036

    申请日:2004-11-19

    IPC分类号: H01L21/26 H01L21/42 H05H1/24

    摘要: A microwave is radiated into a processing chamber (1) from a planar antenna member of an antenna (7) through a dielectric plate (6). With this, a C5F8 gas supplied into the processing chamber (1) from a gas supply member (3) is changed (activated) into a plasma so as to form a fluorine-containing carbon film of a certain thickness on a semiconductor wafer (W). Each time a film forming process of forming a film on one wafer is carried out, a cleaning process and a pre-coating process are carried out. In the cleaning process, the inside of the processing chamber is cleaned with a plasma of an oxygen gas and a hydrogen gas. In the pre-coating process, the C5F8 gas is changed into a plasma, and a pre-coat film of fluorine-containing carbon thinner than the fluorine-containing carbon film formed in the film forming process is formed.

    摘要翻译: 通过电介质板(6)将微波从天线(7)的平面天线部件辐射到处理室(1)中。 由此,从气体供给构件(3)供给到处理室(1)中的C 5 C 8 C 8气体被变更(激活)为等离子体,从而 在半导体晶片(W)上形成一定厚度的含氟碳膜。 每次进行在一个晶片上形成膜的成膜工艺时,进行清洗处理和预涂工序。 在清洁过程中,用氧气和氢气的等离子体清洁处理室的内部。 在预涂布过程中,将C 5 F 8 N气体变成等离子体,并且含氟碳的预涂膜比含氟 形成在成膜工艺中形成的碳膜。

    Semiconductor memory device capable of securing large latch margin
    6.
    发明授权
    Semiconductor memory device capable of securing large latch margin 有权
    能够确保大的锁存余量的半导体存储器件

    公开(公告)号:US06229757B1

    公开(公告)日:2001-05-08

    申请号:US09315828

    申请日:1999-05-21

    IPC分类号: G11C800

    摘要: In a double data rate type synchronous dynamic random access memory (DDR-SDRAM) device, a large latch margin of input data is secured. The DDR-SDRAM device is arranged by a data strobe signal processing circuit for detecting at least one of a rise edge of a data strobe signal and a fall edge thereof to thereby produce at least a first one-shot pulse signal; a clock signal processing circuit for detecting a rise edge of a clock signal to thereby produce a second one-shot pulse signal; and a data-in processing circuit for latching input data by using the first one-shot pulse signal produced from the data strobe signal, and further for latching the latched input data by using the second one-shot pulse signal produced from the clock signal, and also for simultaneously writing both the latched data into a memory cell in a parallel manner. The data-in processing circuit controls a delay amount of the first one-shot pulse signal and another delay amount of the second one-shot pulse signal so as to secure a latch margin of the input data.

    摘要翻译: 在双倍数据速率类型的同步动态随机存取存储器(DDR-SDRAM)装置中,确保输入数据的大的锁存边沿。 DDR-SDRAM装置由数据选通信号处理电路配置,用于检测数据选通信号的上升沿及其下降沿中的至少一个,从而产生至少第一单触发脉冲信号; 时钟信号处理电路,用于检测时钟信号的上升沿,从而产生第二单触发脉冲信号; 以及数据输入处理电路,用于通过使用从数据选通信号产生的第一单触发脉冲信号来锁存输入数据,并且还用于通过使用从时钟信号产生的第二单触发脉冲信号来锁存锁存的输入数据, 并且还用于以并行方式同时将锁存的数据写入存储器单元。 数据输入处理电路控制第一单触发脉冲信号的延迟量和第二单触发脉冲信号的另一延迟量,以确保输入数据的锁存边沿。

    Plasma process method and apparatus
    7.
    发明授权
    Plasma process method and apparatus 失效
    等离子体处理方法和装置

    公开(公告)号:US5851600A

    公开(公告)日:1998-12-22

    申请号:US953624

    申请日:1997-10-17

    CPC分类号: C23C16/509 H01J37/32431

    摘要: Plasma processing gas is introduced into an upper portion of a processing vessel and a film-formation gas is simultaneously introduced into the vicinity of a substrate to be processed. The plasma processing gas is ionized to form a first plasma and any of the plasma processing gas that has temporarily recombined in locations close to the substrate to be processed is re-ionized as a second plasma. As a result, the density of etchant ions used for cutting away overhangs around the openings of grooves can be increased. In other words, the number of etchant ions can be increased. This makes it possible to reduce the bias voltage applied to the substrate to be processed, preventing damage thereto.

    摘要翻译: 将等离子体处理气体引入处理容器的上部,同时将成膜气体引入待处理的基板的附近。 等离子体处理气体被离子化以形成第一等离子体,并且在接近待处理衬底的位置中暂时重新组合的任何等离子体处理气体被再次离子化为第二等离子体。 结果,可以增加用于切除凹槽周围的突出部的蚀刻剂离子的密度。 换句话说,可以增加蚀刻剂离子的数量。 这使得可以减小施加到待处理基板的偏置电压,从而防止其损坏。

    Semiconductor memory device
    8.
    发明授权
    Semiconductor memory device 失效
    半导体存储器件

    公开(公告)号:US5327388A

    公开(公告)日:1994-07-05

    申请号:US952977

    申请日:1992-09-29

    申请人: Yasuo Kobayashi

    发明人: Yasuo Kobayashi

    CPC分类号: G11C5/147

    摘要: A semiconductor memory device with a power source voltage step-down circuit which generates a stepped-down voltage from electric power supplied from outside and supplies this stepped-down voltage to a memory cell array and peripheral circuits. Current switching device interposed in a circuit or circuits of the semiconductor memory device other than the memory cell array and a switch controlling signal generating means for generating a controlling signal in response to a signal from the outside are provided. The current switching device performs switching of current to flow through the circuit in response to a controlling signal.

    摘要翻译: 一种具有电源电压降压电路的半导体存储器件,其从外部提供的电力产生降压电压,并将该降压电压提供给存储单元阵列和外围电路。 提供了插入电路中的电流开关器件或除了存储单元阵列之外的半导体存储器件的电路和用于响应于来自外部信号产生控制信号的开关控制信号产生装置。 当前的开关装置响应于控制信号执行电流的切换以流过电路。

    Semiconductor memory having improved data readout scheme
    9.
    发明授权
    Semiconductor memory having improved data readout scheme 失效
    具有改进的数据读出方案

    公开(公告)号:US5051955A

    公开(公告)日:1991-09-24

    申请号:US543526

    申请日:1990-06-26

    申请人: Yasuo Kobayashi

    发明人: Yasuo Kobayashi

    CPC分类号: G11C7/106 G11C7/1051

    摘要: A semiconductor memory device capable of reading out stored data at high speed and with low power consumption includes a sense amplifier for amplifying a data signal stored in a selected memory cell, a data latch circuit for latching the output signal of the sense amplifier, a switching circuit for outputting the output signal of the data latch circuit, and an output circuit for receiving the output signal of the sense amplifier and the output signal of the switching circuit and generating a data output signal. It also includes at the power supply side, switching means for keeping the sense amplifier in an operative state as long as data signal is amplified in response to a sense enable signal.