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    Methods of compressing data in storage device
    1.
    发明授权
    Methods of compressing data in storage device 有权
    在存储设备中压缩数据的方法

    公开(公告)号：US08593307B2

    公开(公告)日：2013-11-26

    申请号：US13364787

    申请日：2012-02-02

    申请人： Man-keun Seo ,  Jun-jin Kong ,  Hong-rak Son ,  Kyoung-Lae Cho ,  Je-hyuck Song ,  Kwang-gu Lee

    发明人： Man-keun Seo ,  Jun-jin Kong ,  Hong-rak Son ,  Kyoung-Lae Cho ,  Je-hyuck Song ,  Kwang-gu Lee

    IPC分类号： H03M7/40

    CPC分类号： H03M7/40

    摘要： At least one example embodiment discloses a method of compressing data in a storage device. The method includes determining a codeword length of a symbol using a first table indicating a relationship between a number of occurrences of the symbol in received data and the codeword length, determining a codeword having the codeword length for the symbol, and generating compressed data of the received data, the generating including converting the symbol into the codeword.

    摘要翻译： 至少一个示例性实施例公开了一种在存储设备中压缩数据的方法。 该方法包括使用指示接收数据中的符号的出现次数与码字长度之间的关系的第一表来确定符号的码字长度，确定具有用于符号的码字长度的码字，以及生成 接收到的数据，生成包括将符号转换成码字。

    Memory device and memory system
    2.
    发明授权
    Memory device and memory system 有权
    内存设备和内存系统

    公开(公告)号：US08949687B2

    公开(公告)日：2015-02-03

    申请号：US13396791

    申请日：2012-02-15

    申请人： Man-keun Seo ,  Jun-jin Kong ,  Kyoung-Lae Cho

    发明人： Man-keun Seo ,  Jun-jin Kong ,  Kyoung-Lae Cho

    IPC分类号： G11C29/00 ,  H03M7/30 ,  H03M13/05 ,  G06F11/10

    CPC分类号： H03M13/2906 ,  G06F11/1012 ,  G06F11/1044 ,  H03M7/30 ,  H03M13/05 ,  H03M13/6312

    摘要： A memory device and a memory system, the memory system including a data compressor for generating compressed data by compressing program data in a first unit, and an error correction block generator for dividing the compressed data in a second unit to obtain a plurality of pieces of normal data, and generating error correction blocks for correcting errors of the plurality of pieces of normal data, wherein each of the error correction blocks comprises the normal data, invalid data having a size corresponding to the size of the normal data, and parities for the normal data and the invalid data.

    摘要翻译： 存储器装置和存储器系统，所述存储器系统包括用于通过压缩第一单元中的程序数据产生压缩数据的数据压缩器，以及用于在第二单元中分割压缩数据的纠错块发生器，以获得多个 正常数据和生成用于校正多条正常数据的错误的纠错块，其中每个纠错块包括正常数据，具有与正常数据的大小相对应的大小的无效数据，以及用于 正常数据和无效数据。

    Memory Device and Memory System
    3.
    发明申请
    Memory Device and Memory System 有权
    存储器和存储器系统

    公开(公告)号：US20120216096A1

    公开(公告)日：2012-08-23

    申请号：US13396791

    申请日：2012-02-15

    申请人： Man-keun Seo ,  Jun-jin Kong ,  Kyoung-Lae Cho

    发明人： Man-keun Seo ,  Jun-jin Kong ,  Kyoung-Lae Cho

    IPC分类号： H03M13/05 ,  G06F11/10

    CPC分类号： H03M13/2906 ,  G06F11/1012 ,  G06F11/1044 ,  H03M7/30 ,  H03M13/05 ,  H03M13/6312

    摘要： A memory device and a memory system, the memory system including a data compressor for generating compressed data by compressing program data in a first unit, and an error correction block generator for dividing the compressed data in a second unit to obtain a plurality of pieces of normal data, and generating error correction blocks for correcting errors of the plurality of pieces of normal data, wherein each of the error correction blocks comprises the normal data, invalid data having a size corresponding to the size of the normal data, and parities for the normal data and the invalid data.

    摘要翻译： 存储器装置和存储器系统，所述存储器系统包括用于通过压缩第一单元中的程序数据产生压缩数据的数据压缩器，以及用于在第二单元中分割压缩数据的纠错块发生器，以获得多个 正常数据和生成用于校正多条正常数据的错误的纠错块，其中每个纠错块包括正常数据，具有与正常数据的大小相对应的大小的无效数据，以及用于 正常数据和无效数据。

    Nonvolatile memory devices having built-in memory cell recovery during block erase and methods of operating same
    4.
    发明授权
    Nonvolatile memory devices having built-in memory cell recovery during block erase and methods of operating same 有权
    在块擦除期间具有内置存储器单元恢复的非易失性存储器件及其操作方法

    公开(公告)号：US08274840B2

    公开(公告)日：2012-09-25

    申请号：US12498508

    申请日：2009-07-07

    申请人： Yong-June Kim ,  Jae-Hong Kim ,  Kyoung-Lae Cho ,  Seung-Hwan Song ,  Jun-Jin Kong

    发明人： Yong-June Kim ,  Jae-Hong Kim ,  Kyoung-Lae Cho ,  Seung-Hwan Song ,  Jun-Jin Kong

    IPC分类号： G11C11/34

    CPC分类号： G11C16/16

    摘要： Nonvolatile memory devices include support memory cell recovery during operations to erase blocks of nonvolatile (e.g., flash) memory cells. A nonvolatile memory system includes a flash memory device and a memory controller electrically coupled to the flash memory device. The memory controller is configured to control memory cell recovery operations within the flash memory device by issuing a first instruction(s) to the flash memory device that causes erased memory cells in the block of memory to become at least partially programmed memory cells and then issuing a second instruction(s) to the flash memory device that causes the at least partially programmed memory cells become fully erased.

    摘要翻译： 非易失性存储器件包括在擦除非易失性（例如闪存）存储器单元块的操作期间的支持存储器单元恢复。 非易失性存储器系统包括闪存器件和电耦合到闪速存储器件的存储器控​​制器。 存储器控制器被配置为通过向闪存器件发出第一指令来控制闪存器件内的存储器单元恢复操作，该第一指令使存储器块中的擦除存储器单元变成至少部分被编程的存储器单元，然后发出 使闪存器件的至少部分编程的存储器单元完全被擦除的第二指令。

    Nonvolatile Memory Devices Having Built-in Memory Cell Recovery During Block Erase and Methods of Operating Same
    5.
    发明申请
    Nonvolatile Memory Devices Having Built-in Memory Cell Recovery During Block Erase and Methods of Operating Same 有权
    在块擦除期间具有内置存储器单元恢复的非易失性存储器件和操作方法相同

    公开(公告)号：US20100091578A1

    公开(公告)日：2010-04-15

    申请号：US12498508

    申请日：2009-07-07

    申请人： Yong-June Kim ,  Jae-Hong Kim ,  Kyoung-Lae Cho ,  Seung-Hwan Song ,  Jun-Jin Kong

    发明人： Yong-June Kim ,  Jae-Hong Kim ,  Kyoung-Lae Cho ,  Seung-Hwan Song ,  Jun-Jin Kong

    IPC分类号： G11C16/04 ,  G11C16/06

    CPC分类号： G11C16/16

    摘要： Nonvolatile memory devices include support memory cell recovery during operations to erase blocks of nonvolatile (e.g., flash) memory cells. A nonvolatile memory system includes a flash memory device and a memory controller electrically coupled to the flash memory device. The memory controller is configured to control memory cell recovery operations within the flash memory device by issuing a first instruction(s) to the flash memory device that causes erased memory cells in the block of memory to become at least partially programmed memory cells and then issuing a second instruction(s) to the flash memory device that causes the at least partially programmed memory cells become fully erased.

    摘要翻译： 非易失性存储器件包括在擦除非易失性（例如闪存）存储器单元块的操作期间的支持存储器单元恢复。 非易失性存储器系统包括闪存器件和电耦合到闪速存储器件的存储器控​​制器。 存储器控制器被配置为通过向闪存器件发出第一指令来控制闪存器件内的存储器单元恢复操作，该第一指令使存储器块中的擦除存储器单元变成至少部分被编程的存储器单元，然后发出 使闪存器件的至少部分编程的存储器单元完全被擦除的第二指令。

    METHOD OF OPERATING MEMORY CONTROLLER, MEMORY CONTROLLER, MEMORY DEVICE AND MEMORY SYSTEM
    6.
    发明申请
    METHOD OF OPERATING MEMORY CONTROLLER, MEMORY CONTROLLER, MEMORY DEVICE AND MEMORY SYSTEM 有权
    操作存储器控制器，存储器控制器，存储器件和存储器系统的方法

    公开(公告)号：US20120265927A1

    公开(公告)日：2012-10-18

    申请号：US13445048

    申请日：2012-04-12

    申请人： Kyoung-Lae Cho ,  Jun-Jin Kong ,  Jae-Hong Kim

    发明人： Kyoung-Lae Cho ,  Jun-Jin Kong ,  Jae-Hong Kim

    IPC分类号： G06F12/00

    CPC分类号： G11C11/5642 ,  G11C16/3418 ,  G11C29/44 ,  G11C29/56008 ,  G11C2029/1208 ,  G11C2029/4402

    摘要： A method of operating a memory controller, a memory controller, a memory device and a memory system are provided. The method includes reading first data from a nonvolatile memory device using a first read voltage, the first data includes a uncorrectable error bit, reading second data from a nonvolatile memory device using a second read voltage different from the first read voltage, the second data includes an correctable error bit, and reprogramming the nonvolatile memory device according to the comparison result of the first read voltage and the second read voltage.

    摘要翻译： 提供了一种操作存储器控制器，存储器控制器，存储器件和存储器系统的方法。 该方法包括使用第一读取电压从非易失性存储器件读取第一数据，第一数据包括不可校正的误差位，使用不同于第一读取电压的第二读取电压从非易失性存储器件读取第二数据，第二数据包括 可校正错误位，并根据第一读取电压和第二读取电压的比较结果重新编程非易失性存储器件。

    Method of operating memory controller, memory controller, memory device and memory system
    7.
    发明授权
    Method of operating memory controller, memory controller, memory device and memory system 有权
    操作内存控制器，内存控制器，内存设备和内存系统的方法

    公开(公告)号：US08830743B2

    公开(公告)日：2014-09-09

    申请号：US13445048

    申请日：2012-04-12

    申请人： Kyoung-Lae Cho ,  Jun-Jin Kong ,  Jae-Hong Kim

    发明人： Kyoung-Lae Cho ,  Jun-Jin Kong ,  Jae-Hong Kim

    IPC分类号： G11C16/04 ,  G11C29/56 ,  G11C11/56 ,  G11C16/34 ,  G11C29/12 ,  G11C29/44

    CPC分类号： G11C11/5642 ,  G11C16/3418 ,  G11C29/44 ,  G11C29/56008 ,  G11C2029/1208 ,  G11C2029/4402

    摘要： A method of operating a memory controller, a memory controller, a memory device and a memory system are provided. The method includes reading first data from a nonvolatile memory device using a first read voltage, the first data includes a uncorrectable error bit, reading second data from a nonvolatile memory device using a second read voltage different from the first read voltage, the second data includes an correctable error bit, and reprogramming the nonvolatile memory device according to the comparison result of the first read voltage and the second read voltage.

    摘要翻译： 提供了一种操作存储器控制器，存储器控制器，存储器件和存储器系统的方法。 该方法包括使用第一读取电压从非易失性存储器件读取第一数据，第一数据包括不可校正的误差位，使用不同于第一读取电压的第二读取电压从非易失性存储器件读取第二数据，第二数据包括 可校正错误位，并根据第一读取电压和第二读取电压的比较结果重新编程非易失性存储器件。