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公开(公告)号：US20180122737A1
公开(公告)日：2018-05-03
申请号：US15389581
申请日：2016-12-23
Applicant: MAPPER Lithography IP B.V.
IPC: H01L23/528 , G06F17/50 , G03F7/20
CPC classification number: H01L23/528 , G03F7/2059 , G06F17/5068 , G06F17/5077 , H01L21/263 , H01L21/768 , H01L25/0655 , H01L27/0207 , H01L27/0617 , H01L29/0684 , H01L29/0692
Abstract: Method of manufacturing electronic devices using a maskless lithographic exposure system using a maskless pattern writer, wherein beamlet control data is generated for controlling the maskless pattern writer to expose a wafer for creation of the electronic devices. The beamlet control data is generated based on design layout data defining a plurality of structures, such as vias, for the electronic devices to be manufactured from the wafer, and selection data defining which of the structures of the design layout data are applicable for each electronic device to be manufactured from the wafer, the selection data defining a different set of the structures for different subsets of the electronic devices. Exposure of the wafer according to the beamlet control data results in exposing a pattern having a different set of the structures for different subsets of the electronic devices.
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公开(公告)号：US10079206B2
公开(公告)日：2018-09-18
申请号：US15389581
申请日：2016-12-23
Applicant: MAPPER Lithography IP B.V.
IPC: H01L21/44 , H01L23/528 , G06F17/50 , G03F7/20
CPC classification number: H01L23/528 , G03F7/2059 , G03F7/2061 , G06F17/5068 , G06F17/5077 , H01L21/263 , H01L21/76816 , H01L25/0655 , H01L27/0207 , H01L27/0617 , H01L29/0684 , H01L29/0692
Abstract: Method of manufacturing electronic devices using a maskless lithographic exposure system using a maskless pattern writer, wherein beamlet control data is generated for controlling the maskless pattern writer to expose a wafer for creation of the electronic devices. The beamlet control data is generated based on design layout data defining a plurality of structures, such as vias, for the electronic devices to be manufactured from the wafer, and selection data defining which of the structures of the design layout data are applicable for each electronic device to be manufactured from the wafer, the selection data defining a different set of the structures for different subsets of the electronic devices. Exposure of the wafer according to the beamlet control data results in exposing a pattern having a different set of the structures for different subsets of the electronic devices.
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公开(公告)号：US09934943B2
公开(公告)日：2018-04-03
申请号：US14787775
申请日：2014-05-05
Applicant: MAPPER LITHOGRAPHY IP B.V.
Inventor： Vincent Sylvester Kuiper , Erwin Slot
IPC: H01J37/317 , H01J37/09 , H01J37/30
CPC classification number: H01J37/3177 , H01J37/09 , H01J37/3007 , H01J2237/0435 , H01J2237/0453 , H01J2237/3175 , H01J2237/31774
Abstract: A sub-beam aperture array for forming a plurality of sub-beams from one or more charged particle beams. The sub-beam aperture array comprises one or more beam areas, each beam area comprising a plurality of sub-beam apertures arranged in a non-regular hexagonal pattern, the sub-beam apertures arranged so that, when projected in a first direction onto a line parallel to a second direction, the sub-beam apertures are uniformly spaced along the line, and wherein the first direction is different from the second direction. The system further comprises a beamlet aperture array with a plurality of beamlet apertures arranged in one or more groups. The beamlet aperture array is arranged to receive the sub-beams and form a plurality of beamlets at the locations of the beamlet apertures of the beamlet array.
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4.发明申请公开(公告)号：US20190205495A1
公开(公告)日：2019-07-04
申请号：US16331538
申请日：2017-09-08
Applicant: MAPPER Lithography IP B.V.
IPC: G06F17/50 , H01L21/027
CPC classification number: G06F17/5072 , G06F17/5077 , G06F2217/12 , H01L21/027 , H01L21/0274 , H01L21/0277 , H01L21/76816 , H01L23/573
Abstract: A method of creating electronic devices such as semiconductor chips using a maskless lithographic exposure system such as a charged particle multi-beamlet lithography system (301A-301D). The maskless lithographic exposure system comprises a lithography subsystem (316) including a maskless pattern writer such as a charged particle multi-beamlet lithography machine (1) or ebeam machine. The method comprises introducing unique chip design data (430) or information related thereto into pattern data comprising common chip design data before streaming the pattern data to the maskless pattern writer.
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公开(公告)号：US20180069710A1
公开(公告)日：2018-03-08
申请号：US15444396
申请日：2017-02-28
Applicant: MAPPER Lithography IP B.V.
Inventor： Johannes Cornelis Jacobus De Langen , Marcel Nicolaas Jacobus van Kervinck , Vincent Sylvester Kuiper
IPC: H04L9/32 , H01L25/065 , H01L23/544 , H04L9/14 , G06K19/06 , G06K7/14
Abstract: An electronic device comprising a semiconductor chip which comprises a plurality of structures formed in the semiconductor chip, wherein the semiconductor chip is a member of a set of semiconductor chips, the set of semiconductor chips comprises a plurality of subsets of semiconductor chips, and the semiconductor chip is a member of only one of the subsets. The plurality of structures of the semiconductor chip includes a set of common structures which is the same for all of the semiconductor chips of the set, and a set of non-common structures, wherein the non-common structures of the semiconductor chip of the subset is different from a non-common circuit of the semiconductor chips in every other subset. At least a first portion of the non-common structures and a first portion of the common structures form a first non-common circuit, wherein the first non-common circuit of the semiconductor chips of each subset is different from a non-common circuit of the semiconductor chips in every other subset. At least a second portion of the non-common structures is adapted to store or generate a first predetermined value which uniquely identifies the first non-common circuit, wherein the first predetermined value is readable from outside the semiconductor chip by automated reading means.
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Patent Agency Ranking
公开(公告)号：US20180120704A1
公开(公告)日：2018-05-03
申请号：US15389593
申请日：2016-12-23
Applicant: MAPPER Lithography IP B.V.
IPC: G03F7/20 , H01L21/263 , H01L29/06 , H01L23/528 , H01L27/02 , H01L25/065
CPC classification number: H01L23/528 , G03F7/2059 , G03F7/2061 , G06F17/5068 , G06F17/5077 , H01L21/263 , H01L21/76816 , H01L25/0655 , H01L27/0207 , H01L27/0617 , H01L29/0684 , H01L29/0692
Abstract: Method of manufacturing electronic devices using a maskless lithographic exposure system using a maskless pattern writer. The method comprises generating beamlet control data for controlling the maskless pattern writer to expose a wafer for creation of the electronic devices, wherein the beamlet control data is generated based on a feature data set defining features selectable for individualizing the electronic devices, wherein exposure of the wafer according to the beamlet control data results in exposing a pattern having a different selection of the features from the feature data set for different subsets of the electronic devices.
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公开(公告)号：US20180068955A1
公开(公告)日：2018-03-08
申请号：US15444369
申请日：2017-02-28
Applicant: MAPPER Lithography IP B.V.
Inventor： Johannes Cornelis Jacobus De Langen , Marcel Nicolaas Jacobus van Kervinck , Vincent Sylvester Kuiper
IPC: H01L23/544 , H04L29/06
Abstract: An electronic device comprising a semiconductor chip which comprises a plurality of structures formed in the semiconductor chip, wherein the semiconductor chip is a member of a set of semiconductor chips, the set of semiconductor chips comprises a plurality of subsets of semiconductor chips, and the semiconductor chip is a member of only one of the subsets. The plurality of structures of the semiconductor chip includes a set of common structures which is the same for all of the semiconductor chips of the set, and a set of non-common structures, wherein the non-common structures of the semiconductor chip of the subset is different from a non-common circuit of the semiconductor chips in every other subset. At least a first portion of the non-common structures and a first portion of the common structures form a first non-common circuit, wherein the first non-common circuit of the semiconductor chips of each subset is different from a non-common circuit of the semiconductor chips in every other subset. At least a second portion of the non-common structures is adapted to store or generate a first predetermined value which uniquely identifies the first non-common circuit, wherein the first predetermined value is readable from outside the semiconductor chip by automated reading means.
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8.发明申请公开(公告)号：US20180068047A1
公开(公告)日：2018-03-08
申请号：US15389558
申请日：2016-12-23
Applicant: MAPPER Lithography IP B.V.
IPC: G06F17/50
CPC classification number: G06F17/5072 , G06F17/5077 , G06F2217/12 , H01L21/027 , H01L21/0274 , H01L21/0277 , H01L21/76816 , H01L23/573
Abstract: A method of creating electronic devices such as semiconductor chips using a maskless lithographic exposure system such as a charged particle multi-beamlet lithography system (301A-301D). The maskless lithographic exposure system comprises a lithography subsystem (316) including a maskless pattern writer such as a charged particle multi-beamlet lithography machine (1) or ebeam machine. The method comprises introducing unique chip design data (430) or information related thereto into pattern data comprising common chip design data before streaming the pattern data to the maskless pattern writer.
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公开(公告)号：US09665014B2
公开(公告)日：2017-05-30
申请号：US14383569
申请日：2013-03-08
Applicant: MAPPER LITHOGRAPHY IP B.V.
Inventor： Paul Ijmert Scheffers , Jan Andries Meijer , Erwin Slot , Vincent Sylvester Kuiper , Niels Vergeer
IPC: H01J37/09 , H01J37/16 , G03F7/20 , H01J37/304 , H01J37/317 , B82Y10/00 , B82Y40/00
CPC classification number: G03F7/707 , B82Y10/00 , B82Y40/00 , H01J37/3045 , H01J37/3177 , H01J2237/1501 , H01J2237/1502 , H01J2237/3045
Abstract: A multi-beamlet charged particle beamlet lithography system for transferring a pattern to a surface of a substrate. The system comprises a projection system (311) for projecting a plurality of charged particle beamlets (7) onto the surface of the substrate; a chuck (313) moveable with respect to the projection system; a beamlet measurement sensor (i.a. 505, 511) for determining one or more characteristics of one or more of the charged particle beamlets, the beamlet measurement sensor having a surface (501) for receiving one or more of the charged particle beamlets; and a position mark measurement system for measuring a position of a position mark (610, 620, 635), the position mark measurement system comprising an alignment sensor (361, 362). The chuck comprises a substrate support portion for supporting the substrate, a beamlet measurement sensor portion (460) for accommodating the surface of the beamlet measurement sensor, and a position mark portion (470) for accommodating the position mark.
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公开(公告)号：US09575418B2
公开(公告)日：2017-02-21
申请号：US14850997
申请日：2015-09-11
Applicant: Mapper Lithography IP B.V.
Inventor： Vincent Sylvester Kuiper , Erwin Slot , Marcel Nicolaas Jacobus Van Kervinck , Guido De Boer , Hendrik Jan De Jong
IPC: G03B27/60 , G03B27/58 , G03F7/20 , H01L21/67 , H01L21/677
CPC classification number: G03F7/70733 , G03F7/7075 , H01L21/67178 , H01L21/67225 , H01L21/67745
Abstract: An apparatus for transferring a target, such as a substrate or a substrate support structure onto which a substrate has been clamped, from a substrate transfer system to a vacuum chamber of a lithography system. The apparatus comprises a load lock chamber for transferring the target into and out of the vacuum chamber. The load lock chamber comprises a first wall with a first passage providing access between a robot space and the interior of the load lock chamber, a second wall with a second passage providing access between the interior of the load lock chamber and the vacuum chamber, and plurality of handling robots for transferring the targets comprising: a first handling robot movable within the robot space to access the substrate transfer system and the first passage; and a second handling robot movable within the load lock chamber to access the first passage and the second passage.
Abstract translation: 一种用于将基板或基板支撑结构的目标（例如基板被夹紧到其上的基板）从基板传送系统传送到光刻系统的真空室的装置。 该装置包括用于将目标物输入和离开真空室的装载锁定室。 所述装载锁定室包括具有第一通道的第一壁，所述第一通道提供机器人空间与所述装载锁定室的内部之间的通路;第二壁，其具有提供在所述负载锁定室的内部与所述真空室之间的通路的第二通道，以及 用于传送所述目标的多个处理机器人包括：可在所述机器人空间内移动的第一处理机器人，以接近所述基板传送系统和所述第一通道; 以及第二处理机器人，其能够在所述加载锁定室内移动以接近所述第一通道和所述第二通道。
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