公开(公告)号：US4315164A

公开(公告)日：1982-02-09

申请号：US139376

申请日：1980-04-08

申请人： Francis J. Kub ,  Marvin H. White ,  Ingham A. G. Mack ,  Donald R. Lampe

发明人： Francis J. Kub ,  Marvin H. White ,  Ingham A. G. Mack ,  Donald R. Lampe

IPC分类号： G11C19/28 ,  H01L29/768 ,  H01L29/78

CPC分类号： G11C19/285 ,  H01L29/76883

摘要： A charge control circuit for bidirectionally transferring metered amounts of charge, selectively, through a transfer channel of a four gate electrode charge coupled device (CCD) is disclosed. The bidirectional charge control circuit is used primarily to increment and decrement metered amounts of charge respectively to and from a charge storage medium. More specifically, five electrical signals are generated to have varying potentials in accordance with predetermined time sequences. These signals are applied to the four gate electrode CCD in a selected one of two states to either increment or decrement a metered amount of charge therethrough to or from the charge storage medium respectively, in a predetermined number of five segments. One of the generated signals governs the metering of charge for each increment or decrement operation.

摘要翻译： 公开了一种用于通过四栅极电荷耦合器件（CCD）的传输沟道选择性地双向传输计量的电荷的充电控制电路。 双向充电控制电路主要用于分别向和从电荷存储介质递增和减少计量的电荷量。 更具体地，根据预定时间序列，生成五个电信号以具有变化的电位。 这些信号以选定的两种状态中的一种被施加到四栅极电极CCD，以分别在预定数量的五个段中递增或递减到计量存储介质或从电荷存储介质流出的计量量的电荷。 所生成的信号中的一个控制每次递增或递减操作的计费计费。

公开(公告)号：USRE30087E

公开(公告)日：1979-08-28

申请号：US642032

申请日：1975-12-18

申请人： Marvin H. White ,  David H. McCann, Jr. ,  Ingham A. G. Mack ,  Franklyn C. Blaha

发明人： Marvin H. White ,  David H. McCann, Jr. ,  Ingham A. G. Mack ,  Franklyn C. Blaha

IPC分类号： G11C19/28 ,  G11C27/04 ,  H01L27/148 ,  H01L29/768

CPC分类号： G11C27/04 ,  G11C19/285 ,  H01L27/14831 ,  H01L29/76816

摘要： A coherent sampled CMOS readout circuit and signal processor coupled to a CCD shift register operated by a two-phase minority carrier transfer clock system. The invention comprises a multiplex MIS switch, a reverse biased collection diode, an N channel MOSFET reset switch, a P channel MOSFET electrometer amplifier, and a sample and hold circuit, the configuration having four distinct operational timing subintervals within a clock period wherein the charge is shifted from one shift register bit to another and finally to the output bit. This removes the Nyquist noise associated with the reset switch, suppresses switching transients and 1/f surface noise to thereby improve the signal to noise ratio, i.e., dynamic range, for a CCD array and readout system.

公开(公告)号：US4417317A

公开(公告)日：1983-11-22

申请号：US355075

申请日：1982-03-05

申请人： Marvin H. White ,  Ingham A. G. Mack

发明人： Marvin H. White ,  Ingham A. G. Mack

IPC分类号： H03H21/00 ,  H04B3/04 ,  G11C11/40

CPC分类号： H03H21/0001

摘要： An adaptive analog processor incorporating a analog shift register having a plurality of taps, multipliers at each tap for multiplying the tap value times a weight value, a first adder for summing the output of the multipliers, a second adder for subtracting the output of the adder from a second analog signal, means for incrementing the weights in response to the magnitude and polarity of the error signal and the polarity of the data signal. The invention overcomes the problem of building monolithic multitap adaptive filters utilizing the clipped-data least mean square error algorithm.

摘要翻译： 一种包括具有多个抽头的模拟移位寄存器的自适应模拟处理器，用于将抽头值乘以权重值的每个抽头的乘法器，用于对乘法器的输出求和的第一加法器，用于减去加法器的输出的第二加法器 根据第二模拟信号，用于响应于误差信号的大小和极性以及数据信号的极性来递增权重的装置。 本发明克服了利用限幅数据最小均方误差算法构建单片多点自适应滤波器的问题。

公开(公告)号：US4035629A

公开(公告)日：1977-07-12

申请号：US625694

申请日：1975-10-24

申请人： Donald R. Lampe ,  Marvin H. White ,  James H. Mims

发明人： Donald R. Lampe ,  Marvin H. White ,  James H. Mims

IPC分类号： G06G7/14 ,  G06G7/16 ,  G06G7/19 ,  G06J1/00 ,  G11C27/04 ,  H01L27/105 ,  H01L29/768 ,  H03H15/02 ,  H03K5/159 ,  G11C11/40

CPC分类号： H03H15/02 ,  G06G7/14 ,  G06G7/16 ,  G06G7/1907 ,  G06J1/00 ,  G11C27/04 ,  H01L27/1057 ,  H01L29/76808 ,  H01L29/76816 ,  H01L29/76891

摘要： Extended correlated double sampling (ECDS) for charge transfer devices (CTD) corrects for errors arising in components of the CTD system from the input to the output thereof. Sources of error include bias variations and non-uniformity of thresholds and leakage currents. While applicable to any type of CTD system, for a TDI (time delay integration) application, precise error correction is achieved. Alternate signal level samples and reference level samples, the latter preferably AC zero, are propagated down the CTD channel as a related pair. At the CTD output, the signal and reference level samples of each pair are differenced, thereby correcting the resultant output signal for the noted types of errors. ECDS is compatible with CDS as taught in U.S. Pat. No. 3,781,574 and the two may be used jointly. An application of ECDS in the TDI mode for enhancement of signal outputs from a sensor array is disclosed, along with special parallel signal injection structure and operation for the requisite parallel signal injection into the channel, and special techniques of stabilized charged injection (SCI).

摘要翻译： 用于电荷转移装置（CTD）的扩展相关双重采样（ECDS）校正从输入到其输出的CTD系统的组件中出现的错误。 误差源包括偏置偏差和阈值和漏电流的不均匀性。 适用于任何类型的CTD系统，对于TDI（时间延迟积分）应用，实现了精确的纠错。 交替的信号电平采样和参考电平采样（后者优选为AC 0）作为相关对沿CTD通道向下传播。 在CTD输出端，每一对的信号和参考电平采样是不同的，从而校正所输出的错误类型的输出信号。 ECDS与美国专利中所述的CDS兼容。 3,781,574号，可以共同使用。 公开了用于增强传感器阵列的信号输出的TDI模式中的ECDS的应用，以及用于必要的并行信号注入到通道中的特殊并行信号注入结构和操作，以及稳定电荷注入（SCI）的特殊技术。

公开(公告)号：US4041298A

公开(公告)日：1977-08-09

申请号：US625697

申请日：1975-10-24

申请人： Donald R. Lampe ,  Marvin H. White

发明人： Donald R. Lampe ,  Marvin H. White

IPC分类号： G06G7/14 ,  G06G7/16 ,  G06G7/19 ,  G06J1/00 ,  G11C27/04 ,  H01L27/105 ,  H01L29/768 ,  H03H15/02 ,  G06G7/12 ,  H03K5/159

CPC分类号： H03H15/02 ,  G06G7/14 ,  G06G7/16 ,  G06G7/1907 ,  G06J1/00 ,  G11C27/04 ,  H01L27/1057 ,  H01L29/76808 ,  H01L29/76816 ,  H01L29/76891

摘要： In a charge transfer device (CTD), such as a charge coupled device (CCD), a gate electrode employed for sensing of the charge packet being transferred, or coupled through the device is clocked during one phase of the four-phase clocking and is permitted to float, i.e., be isolated, during a sensing phase of the four-phase clocking. Since the sensor is a gate electrode rather than a diffusion, it presents no obstruction to the propagation of charge down the channel. Since sensing occurs while the electrode is floating, the sensing or readout function does not have any detrimental effect on the propagation of charge down the channel, i.e., it affords a truly non-destructive readout. During a clocking phase in which charge is isolated under a different gate electrode, an attractive voltage clock pulse is applied to the sensor electrode, rendering it attractive. The sensor electrode is then isolated from the clocking source and, in the appropriate succeeding clocking intervals, the charge advances to the well under the sensor electrode. Sensing of the charge then occurs while the electrode remains in its floating condition. Subsequently, a clock pulse is applied to the sensor electrode rendering it repulsive to advance the charge down the CCD channel. The floating clock sensor electrode of this invention is highly advantageous in any application requiring non-destructive readout; an illustrative configuration for non-destructive parallel output (PO) operation of a CCD shift register is disclosed.

摘要翻译： 在诸如电荷耦合器件（CCD）的电荷转移装置（CTD）中，用于感测正在传输或耦合到器件的电荷分组的栅电极在四相时钟的一个阶段被计时，并且是 允许在四相时钟的感测阶段浮动，即隔离。 由于传感器是栅电极而不是扩散，因此它不会阻碍通道下的电荷传播。 由于在电极浮动时发生感应，感测或读出功能对通道下方的电荷传播没有任何有害的影响，即它提供了真正的非破坏性读出。 在电荷在不同的栅电极下隔离的时钟阶段期间，有吸引力的电压时钟脉冲施加到传感器电极，使其具有吸引力。 然后将传感器电极与时钟源隔离，并且在适当的后续时钟间隔中，电荷前进到传感器电极下方的阱。 然后在电极保持在其浮动状态下发生电荷的感测。 随后，将时钟脉冲施加到传感器电极，使其排斥，以将电荷向下推进CCD通道。 本发明的浮动时钟传感器电极在需要非破坏性读出的任何应用中是非常有利的; 公开了用于CCD移位寄存器的非破坏性并行输出（PO）操作的说明性配置。

公开(公告)号：US4280141A

公开(公告)日：1981-07-21

申请号：US945043

申请日：1978-09-22

申请人： David H McCann ,  Marvin H. White ,  Alfred P. Turly ,  Robert A. Frosch

发明人： David H McCann ,  Marvin H. White ,  Alfred P. Turly ,  Robert A. Frosch

IPC分类号： H01L27/148 ,  H04N5/335 ,  H04N5/372 ,  H04N5/376 ,  H04N5/378 ,  H04N3/15 ,  H04N7/18

CPC分类号： H04N5/37206 ,  H04N3/1525 ,  H04N3/1556 ,  H04N5/335

摘要： An imaging system comprising a multi-channel matrix array of CCD devices wherein a plurality of sensor cells (pixels) in each channel are subdivided and operated in discrete intercoupled groups or subarrays with a readout CCD shift register terminating each end of the channels. Clock voltages are applied to the subarrays and are manipulated to selectively cause charge signal flow in each subarray in either direction independent of the other subarrays. More particularly, the array is divided into six independent subarrays, three on each side of the array, such that each channel common to three subarrays is divided into three sections of three sensor cells each. By selective application of four phase clock voltages, either one, two or all three of the sections cause charge signal flow in one direction, while the remainder cause charge signal flow in the opposite direction. This creates a form of selective electronic exposure control which provides an effective variable time delay and integration of three, six or nine sensor cells or integration stages. The device is constructed on a semiconductor sustrate with a buried channel and is adapted for front surface imaging through transparent doped tin oxide gates.

摘要翻译： 一种成像系统，包括CCD器件的多通道矩阵阵列，其中每个通道中的多个传感器单元（像素）被细分并在离散的互耦合组或子阵列中被操作，读出的CCD移位寄存器终止了通道的每一端。 时钟电压被施加到子阵列，并被操纵以选择性地使电荷信号在任一方向上在每个子阵列中流动，而与其它子阵列无关。 更具体地，阵列被分成六个独立的子阵列，阵列的每一侧三个，使得三个子阵列共同的每个通道被分成三个传感器单元的三个部分。 通过选择性地施加四个相位时钟电压，这些部分中的一个，两个或全部三个部分导致电荷信号在一个方向上流动，而其余部分使电荷信号沿相反方向流动。 这创建了一种选择性电子曝光控制的形式，其提供有效的可变时间延迟和三，六或九个传感器单元或集成级的集成。 该器件构造在具有掩埋沟道的半导体衬底上，并且适于通过透明掺杂的氧化锡栅极进行前表面成像。

公开(公告)号：US4156924A

公开(公告)日：1979-05-29

申请号：US842866

申请日：1977-10-17

申请人： Donald R. Lampe ,  Hung C. Lin ,  Marvin H. White

发明人： Donald R. Lampe ,  Hung C. Lin ,  Marvin H. White

IPC分类号： G06G7/163 ,  G06G7/16

CPC分类号： G06G7/163

摘要： An analog multiplier for multiplying the signals derived from a charge coupled device (CCD) tap includes a balanced multiplier of a first conductivity-type and a buffer of a second conductivity-type coupled between the CCD tap and the balanced multiplier. The multiplier includes first and second transistors, the drains of which are coupled together to form an input. The buffer includes a load transistor coupled to the output of an amplifying transistor. Means are included for coupling the output of the amplifier transistor and the multiplier input.

摘要翻译： 用于将从电荷耦合器件（CCD）抽头导出的信号相乘的模拟乘法器包括耦合在CCD抽头和平衡乘法器之间的第一导电类型和第二导电类型的缓冲器的平衡乘法器。 乘法器包括第一和第二晶体管，其漏极耦合在一起以形成输入。 缓冲器包括耦合到放大晶体管的输出的负载晶体管。 包括用于耦合放大器晶体管的输出和乘法器输入的装置。

公开(公告)号：US4654683A

公开(公告)日：1987-03-31

申请号：US768788

申请日：1985-08-23

申请人： Constantine Anagnostopoulos ,  Marvin H. White

发明人： Constantine Anagnostopoulos ,  Marvin H. White

IPC分类号： H01L27/148 ,  H01L29/78 ,  H01L27/14 ,  H01L49/02

CPC分类号： H01L27/14887

摘要： A CCD image sensor has a plurality of elements, each such sensing element includes a doped semiconductor substrate, an insulator layer over the semiconductor substrate, and an electrode on the insulator layer which when potential is applied to the electrode creates a well in the bulk of the substrate which collects charge as a result of a photoelectric process. The insulator layer has a thin portion selected so as to allow excess charge collected in the channel to tunnel through the thin region to the electrode and thereby prevent blooming.

摘要翻译： CCD图像传感器具有多个元件，每个这样的感测元件包括掺杂的半导体衬底，半导体衬底上的绝缘体层，以及绝缘体层上的电极，当电位施加到电极上时，产生一个阱 作为光电处理的结果收集电荷的基板。 绝缘体层具有选择的薄部分，以便允许在通道中收集的过量电荷穿过薄区域到达电极，从而防止起霜。

公开(公告)号：US4112456A

公开(公告)日：1978-09-05

申请号：US625701

申请日：1975-10-24

申请人： Donald R. Lampe ,  Marvin H. White ,  Arthur S. Jensen

发明人： Donald R. Lampe ,  Marvin H. White ,  Arthur S. Jensen

IPC分类号： G06G7/14 ,  G06G7/16 ,  G06G7/19 ,  G06J1/00 ,  G11C27/04 ,  H01L27/105 ,  H01L29/768 ,  H03H15/02 ,  H01L29/78

CPC分类号： H03H15/02 ,  G06G7/14 ,  G06G7/16 ,  G06G7/1907 ,  G06J1/00 ,  G11C27/04 ,  H01L27/1057 ,  H01L29/76808 ,  H01L29/76816 ,  H01L29/76891

摘要： A stabilized charge injector for charge coupled devices (CCD) includes a diffusion and two or more gate structures in a CCD channel wherein the diffusion alternately acts as a source and drain of the minority-type signal carriers. D.C. signals are applied to the gates immediately adjacent the diffusion and the next successive adjacent gate to provide a charge injection which is proportional to the difference between the signal voltage applied to the one of the two gates and a DC reference voltage applied to the other thereof. Low noise performance is achieved through utilization of a quasi-static operation in which neither of the aforementioned gates adjacent the diffusion is pulsed. Moreover, the use of a gate injector presents at the input, a true capacitance defined as a function of the gate oxide layer. Hence, the value of capacitance is constant and independent of the signal voltage applied. A stabilized charge injector structure is disclosed providing a large value of capacitance for minimizing noise in the injection operation, and wherein problems otherwise arising out of the large size of the capacitance as to adequate speed of propagation of charges from the capacitance to a CCD charge transfer structure are overcome by special gate electrode structures and pulsing techniques to provide successive pushes of the charge being injected from the gate capacitance into the receiving CCD transfer device. The stabilized charge injector may be used for either serial or parallel injection into a CCD channel and its advantages most fully being realized in the parallel input mode; operating waveforms for the charge injector to provide parallel injection into a CCD channel during each shift cycle thereof and, alternatively, to provide selectively timed parallel charge injection in successive intervals are disclosed.

摘要翻译： 用于电荷耦合器件（CCD）的稳定电荷注入器包括在CCD通道中的扩散和两个或更多个栅极结构，其中扩散交替地用作少数型信号载流子的源极和漏极。 DC信号被施加到紧邻扩散的栅极和下一个连续的相邻栅极，以提供与施加到两个栅极中的一个栅极的信号电压之间的差成比例的电荷注入和施加到另一个栅极的另一个的DC参考电压 。 通过利用其中邻近扩散的上述门都不脉冲的准静态操作来实现低噪声性能。 而且，栅极注入器的使用在输入端存在，定义为栅极氧化物层的函数的真实电容。 因此，电容值是恒定的，与施加的信号电压无关。 公开了一种稳定的电荷注入器结构，其提供了用于使注入操作中的噪声最小化的电容值，并且其中由电容大尺寸导致电容从电容到CCD电荷转移的足够速度引起的问题 通过特殊的栅极电极结构和脉冲技术来克服结构，以便将从栅极电容注入的电荷连续地推送到接收CCD传输装置中。 稳定的电荷注入器可以用于串行或并行注入到CCD通道中，其优点最完全在并行输入模式中实现; 电荷注入器的操作波形在其每个移位周期期间提供到CCD通道的平行注入，并且可选地，以连续的间隔提供选择性地定时的并联电荷注入。

公开(公告)号：US4034199A

公开(公告)日：1977-07-05

申请号：US638569

申请日：1975-12-08

申请人： Donald R. Lampe ,  Marvin H. White ,  James H. Mims

发明人： Donald R. Lampe ,  Marvin H. White ,  James H. Mims

IPC分类号： G06G7/14 ,  G06G7/16 ,  G06G7/19 ,  G06J1/00 ,  G11C27/04 ,  H01L27/105 ,  H01L29/768 ,  H03H15/02 ,  G11C11/40 ,  H03K5/159

CPC分类号： H03H15/02 ,  G06G7/14 ,  G06G7/16 ,  G06G7/1907 ,  G06J1/00 ,  G11C27/04 ,  H01L27/1057 ,  H01L29/76808 ,  H01L29/76816 ,  H01L29/76891

摘要： A programmable analog transversal filter is disclosed for processing analog signals and comprising a charge-coupled device (CCD) for receiving a series of discrete analog signals to be delayed by increasing periods and applied to the outputs of the CCD, and a plurality of MNOS memory devices coupled to the taps of the CCD and programmed so that the output of a CCD tap is multiplied by a particular factor. In turn, the outputs of the MNOS memory devices are summed to provide an output signal ##EQU1## where W.sub.k is the weighting factor associated the k.sup.th MNOS memory device. The weighting factors are set into the system by varying the threshold voltage of the corresponding MNOS device. Positive and negative weighting factors are implemented by using first and second MNOS memory elements for each tap of the CCD, whereby depending upon the program incorporated into the system, one of the first and second MNOS memory devices is programmed to give either a positive weighting factor and the other MNOS memory device a negative weighting factor. Further, a reiterative method of setting the weights into the MNOS memory device is used to compare the system output indicative of the weighting factor as set into the MNOS memory devices, with the desired weighting factor as stored in a suitable storage memory such as a ROM, whereby a correction signal is developed to adjust the threshold voltage V.sub.Th of the MNOS memory device in accordance with the stored weighting factor. In one illustrative embodiment, the weighting factors are set in accordance with sinusoidal signals, whereby the system performs a filtering function to provide an output upon receipt of an input signal of desired frequency. In addition, the MNOS devices are reprogrammable, thus permitting a single such system to be used in many different applications. In this regard, this system is particularly adapted for complex signal processing including filtering, generating desired functions, synthetic aperture radar signal processing and target identification processing.