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1.发明申请公开(公告)号：US20090122305A1
公开(公告)日：2009-05-14
申请号：US12266663
申请日：2008-11-07
IPC分类号： G01N21/88
CPC分类号： G01N21/9501 , G01N21/8851 , G01N21/94
摘要： In a foreign matter inspection apparatus for a semiconductor wafer, a PMT which detects reflection light, an amplifier which amplifies a signal detected by the PMT and in which response characteristics of amplification are controlled by a control signal, an A/D converter which converts the signal amplified by the amplifier into a predetermined code and outputs the code, a control circuit which generates a control signal based on information of the semiconductor wafer having a correlation with the reflection light, and a data processing circuit which detects a foreign matter on the semiconductor wafer based on the code output from the A/D converter are provided.
摘要翻译： 在半导体晶片的异物检查装置中，检测反射光的PMT，放大由PMT检测出的信号的放大器，其中由控制信号控制放大的响应特性的放大器，A / D转换器 信号由放大器放大成预定码并输出该代码;基于与反射光相关的半导体晶片的信息产生控制信号的控制电路;以及检测半导体上的异物的数据处理电路 提供了基于A / D转换器的代码输出的晶片。
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2.发明授权公开(公告)号：US07990529B2
公开(公告)日：2011-08-02
申请号：US12266663
申请日：2008-11-07
IPC分类号： G01N21/00
CPC分类号： G01N21/9501 , G01N21/8851 , G01N21/94
摘要： In a foreign matter inspection apparatus for a semiconductor wafer, a PMT which detects reflection light, an amplifier which amplifies a signal detected by the PMT and in which response characteristics of amplification are controlled by a control signal, an A/D converter which converts the signal amplified by the amplifier into a predetermined code and outputs the code, a control circuit which generates a control signal based on information of the semiconductor wafer having a correlation with the reflection light, and a data processing circuit which detects a foreign matter on the semiconductor wafer based on the code output from the A/D converter are provided.
摘要翻译： 在半导体晶片的异物检查装置中，检测反射光的PMT，放大由PMT检测出的信号的放大器，其中由控制信号控制放大的响应特性的放大器，A / D转换器 信号由放大器放大成预定码并输出该代码;基于与反射光相关的半导体晶片的信息产生控制信号的控制电路;以及检测半导体上的异物的数据处理电路 提供了基于A / D转换器的代码输出的晶片。
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3.发明授权公开(公告)号：US07276900B2
公开(公告)日：2007-10-02
申请号：US11272861
申请日：2005-11-15
IPC分类号： G01R33/12
CPC分类号： G11B5/455 , G11B5/4555 , G11B20/1816 , G11B27/36 , G11B2005/001 , G11B2005/0013
摘要： A magnetic characteristic inspecting apparatus including a plurality of disk rotating devices or a plurality of magnetic heads include a unit for switching output signals of write signal production units or allocating the output signals to the magnetic heads, a unit for switching signals read from the magnetic heads or allocating the read signals to measurement resources, and a unit for selecting any of the disk rotating devices synchronously with which the measurement resources will perform measurement. The write signal production units and measurement resources are shared among inspections of the plurality of disk rotating devices or the plurality of heads.
摘要翻译： 包括多个盘旋转装置或多个磁头的磁特性检查装置包括用于切换写入信号产生单元的输出信号或将输出信号分配给磁头的单元，用于切换从磁头读取的信号的单元 或将读取信号分配给测量资源，以及用于选择与测量资源将执行测量同步的任何盘旋转设备的单元。 写入信号生成单元和测量资源在多个盘旋转装置或多个头的检查之间共享。
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4.发明申请公开(公告)号：US20060132122A1
公开(公告)日：2006-06-22
申请号：US11272861
申请日：2005-11-15
IPC分类号： G01R33/12
CPC分类号： G11B5/455 , G11B5/4555 , G11B20/1816 , G11B27/36 , G11B2005/001 , G11B2005/0013
摘要： A magnetic characteristic inspecting apparatus including a plurality of disk rotating devices or a plurality of magnetic heads include a unit for switching output signals of write signal production units or allocating the output signals to the magnetic heads, a unit for switching signals read from the magnetic heads or allocating the read signals to measurement resources, and a unit for selecting any of the disk rotating devices synchronously with which the measurement resources will perform measurement. The write signal production units and measurement resources are shared among inspections of the plurality of disk rotating devices or the plurality of heads.
摘要翻译： 包括多个盘旋转装置或多个磁头的磁特性检查装置包括用于切换写入信号产生单元的输出信号或将输出信号分配给磁头的单元，用于切换从磁头读取的信号的单元 或将读取信号分配给测量资源，以及用于选择与测量资源将执行测量同步的任何盘旋转设备的单元。 写入信号生成单元和测量资源在多个盘旋转装置或多个头的检查之间共享。
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公开(公告)号：US07358953B2
公开(公告)日：2008-04-15
申请号：US10714943
申请日：2003-11-18
申请人： Masami Makuuchi , Kengo Imagawa , Norio Chujo , Ritsuro Orihashi , Yoshitomo Arai , Atsushi Obuchi
发明人： Masami Makuuchi , Kengo Imagawa , Norio Chujo , Ritsuro Orihashi , Yoshitomo Arai , Atsushi Obuchi
IPC分类号： G09G3/36
CPC分类号： G09G3/006 , G09G3/3648 , G09G5/006 , G09G5/39 , G09G2310/027 , Y10S345/904
摘要： A semiconductor device having a liquid crystal driving circuit is disclosed. The driving circuit includes a digital functional unit and an analog functional unit. The digital functional unit is comprised of a display controller and a display data storage RAM, while the analog functional unit is made up of a gradation voltage generating circuit and a gradation voltage selecting circuit. The digital and analog function units are functionally divided from each other and testing of the digital function and testing of the analog function unit are performed in an overlapping manner independently from each other.
摘要翻译： 公开了一种具有液晶驱动电路的半导体器件。 驱动电路包括数字功能单元和模拟功能单元。 数字功能单元包括显示控制器和显示数据存储RAM，而模拟功能单元由灰度电压产生电路和灰度电压选择电路组成。 数字和模拟功能单元在功能上彼此划分，并且以彼此独立的重叠方式执行数字功能的测试和模拟功能单元的测试。
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公开(公告)号：US20050122300A1
公开(公告)日：2005-06-09
申请号：US10981715
申请日：2004-11-05
IPC分类号： G01R31/316 , G01R31/28 , G02F1/133 , G09G3/00 , G09G3/20 , G09G3/36 , H01L21/822 , H01L27/04
CPC分类号： G09G3/006 , G09G3/3688
摘要： A semiconductor device according to the present invention has a liquid crystal driver circuit, and when gray-scale voltage thereof is tested, the gray-scale voltage (Vx) generated in a gray-scale voltage generator circuit provided therein is compared with reference voltage (e.g., Vx+ΔV) generated for testing the gray-scale voltage and the test result is output as binarized voltage from external terminals of the semiconductor device. This can speed up the gray-scale voltage test even in the case of higher gray scale in the liquid crystal driver circuit or increased number of output terminals of the semiconductor device. Therefore, it becomes possible to reduce the time and cost required for the test.
摘要翻译： 根据本发明的半导体器件具有液晶驱动电路，并且当其灰度电压被测试时，在其中提供的灰度级电压发生器电路中产生的灰度电压（Vx）与参考电压（ 例如，用于测试灰度电压而生成的Vx + DeltaV）和测试结果作为来自半导体器件的外部端子的二值化电压输出。 即使在液晶驱动电路中较高的灰度级或半导体器件的输出端数量增加的情况下，也可以加快灰度电压测试。 因此，可以减少测试所需的时间和成本。
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公开(公告)号：US07668027B2
公开(公告)日：2010-02-23
申请号：US11365492
申请日：2006-03-02
IPC分类号： G11C11/00
CPC分类号： G11C29/50 , G11C29/50012
摘要： In order to easily perform a timing test on a memory interface included in a semiconductor device so as to satisfy a restriction on latency, the present invention provides a semiconductor device with the memory interface including: a clock output terminal that outputs a clock signal associated with an operation of a memory connected to the memory interface; a command terminal that outputs a command signal associated with control of a state of the memory; a data terminal that exchanges a data signal with the memory; and a data strobe terminal that exchanges a data strobe signal for establishing the data signal. This semiconductor device includes a testing terminal that outputs in advance a signal for starting a test on the memory interface apart from the command signal.
摘要翻译： 为了容易地对包括在半导体器件中的存储器接口执行定时测试以满足对等待时间的限制，本发明提供一种具有存储器接口的半导体器件，包括：时钟输出端子，其输出与 连接到存储器接口的存储器的操作; 命令终端，其输出与所述存储器的状态的控制相关联的命令信号; 与存储器交换数据信号的数据终端; 以及数据选通端子，用于交换用于建立数据信号的数据选通信号。 该半导体器件包括测试端子，其预先输出用于在命令信号之外的存储器接口上开始测试的信号。
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公开(公告)号：US20070047345A1
公开(公告)日：2007-03-01
申请号：US11365492
申请日：2006-03-02
IPC分类号： G11C29/00
CPC分类号： G11C29/50 , G11C29/50012
摘要： In order to easily perform a timing test on a memory interface included in a semiconductor device so as to satisfy a restriction on latency, the present invention provides a semiconductor device with the memory interface including: a clock output terminal that outputs a clock signal associated with an operation of a memory connected to the memory interface; a command terminal that outputs a command signal associated with control of a state of the memory; a data terminal that exchanges a data signal with the memory; and a data strobe terminal that exchanges a data strobe signal for establishing the data signal. This semiconductor device includes a testing terminal that outputs in advance a signal for starting a test on the memory interface apart from the command signal.
摘要翻译： 为了容易地对包括在半导体器件中的存储器接口执行定时测试以满足对等待时间的限制，本发明提供一种具有存储器接口的半导体器件，包括：时钟输出端子，其输出与 连接到存储器接口的存储器的操作; 命令终端，其输出与所述存储器的状态的控制相关联的命令信号; 与存储器交换数据信号的数据终端; 以及数据选通端子，用于交换用于建立数据信号的数据选通信号。 该半导体器件包括测试端子，其预先输出用于在命令信号之外的存储器接口上开始测试的信号。
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公开(公告)号：US07474290B2
公开(公告)日：2009-01-06
申请号：US10981715
申请日：2004-11-05
IPC分类号： G09G3/36
CPC分类号： G09G3/006 , G09G3/3688
摘要： A semiconductor device according to the present invention has a liquid crystal driver circuit, and when gray-scale voltage thereof is tested, the gray-scale voltage (Vx) generated in a gray-scale voltage generator circuit provided therein is compared with reference voltage (e.g., Vx+ΔV) generated for testing the gray-scale voltage and the test result is output as binarized voltage from external terminals of the semiconductor device. This can speed up the gray-scale voltage test even in the case of higher gray scale in the liquid crystal driver circuit or increased number of output terminals of the semiconductor device. Therefore, it becomes possible to reduce the time and cost required for the test.
摘要翻译： 根据本发明的半导体器件具有液晶驱动电路，并且当其灰度电压被测试时，在其中提供的灰度级电压发生器电路中产生的灰度电压（Vx）与参考电压（ 例如，用于测试灰度电压而生成的Vx + DeltaV）和测试结果作为来自半导体器件的外部端子的二值化电压输出。 即使在液晶驱动电路中较高的灰度级或半导体器件的输出端数量增加的情况下，也可以加快灰度电压测试。 因此，可以减少测试所需的时间和成本。
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公开(公告)号：US07443373B2
公开(公告)日：2008-10-28
申请号：US11002143
申请日：2004-12-03
IPC分类号： G09G3/36
CPC分类号： G09G3/3677 , G09G3/006 , G09G2310/0289
摘要： A problem, which one of the inventions included in the present application solves, is to provide a semiconductor device that can simultaneously test a plurality of output pins by less channels of a semiconductor test equipment in number than the integrated output pins of the semiconductor device. Representative one of the inventions has such a configuration that an LCD driver, which is the semiconductor device having a function of driving a gate line of a liquid crystal display panel, comprises: an exclusive-OR circuit for inverting polarities of positive and negative voltages for driving the gate line; a tri-state type inverter circuit capable of changing and controlling, to a high-impedance state, an output circuit for driving the gate line; and at least one of test control terminals TEST for controlling the exclusive-OR circuit and the tri-state type inverter circuit. When a test is conducted, only one terminal of the gate output outputs a positive voltage VGH or negative voltage VGL and the other terminal is set to a high-impedance state, whereby the plurality of gate outputs are simultaneously tested.
摘要翻译： 包括在本申请中的发明中的一个解决的问题是提供一种半导体器件，其可以通过半导体测试设备的数量少于半导体器件的集成输出引脚的较少通道同时测试多个输出引脚。 代表性的发明之一具有这样的结构，即作为具有驱动液晶显示面板的栅极线的功能的半导体器件的LCD驱动器包括：用于将正和负电压的极性反转的异或电路， 驾驶门线; 能够改变和控制高阻抗状态的用于驱动栅极线的输出电路的三态逆变器电路; 以及用于控制异或电路和三态逆变器电路的测试控制端子TEST中的至少一个。 当进行测试时，仅栅极输出的一个端子输出正电压VGH或负电压VGL，另一个端子被设置为高阻抗状态，从而同时测试多个栅极输出。
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