Operational amplifier and its offset cancel circuit
    1.
    发明授权
    Operational amplifier and its offset cancel circuit 有权
    运算放大器及其偏移消除电路

    公开(公告)号:US06448836B2

    公开(公告)日:2002-09-10

    申请号:US09731710

    申请日:2000-12-08

    IPC分类号: H03L500

    CPC分类号: H03F3/45753

    摘要: An offset cancel circuit for an operational amplifier comprises a capacitive element for storing a voltage to be amplified by an operational amplifier section and containing an offset, and for feedback-controlling a voltage value of the operational amplifier section based on the stored voltage, and switching elements for switching operation between the storage of the voltage in the capacitive element and the feedback control based on the value of the voltage stored in the capacitive element. The capacitive element and the switching elements can be used to cancel accurately an offset in the operational amplifier section without increasing the gate areas of transistors in the operational amplifier section.

    摘要翻译: 用于运算放大器的偏移消除电路包括用于存储由运算放大器部分放大并且包含偏移的电压的电容元件,并且用于基于所存储的电压反馈控制运算放大器部分的电压值,以及切换 用于基于存储在电容元件中的电压的值,在电容元件中的电压的存储和反馈控制之间切换操作的元件。 可以使用电容元件和开关元件来精确地抵消运算放大器部分中的偏移,而不增加运算放大器部分中的晶体管的栅极面积。

    Image sensor
    2.
    发明授权
    Image sensor 有权
    图像传感器

    公开(公告)号:US06914631B2

    公开(公告)日:2005-07-05

    申请号:US10042240

    申请日:2002-01-11

    CPC分类号: H04N5/363

    摘要: The invention relates to an X-Y address type solid-state image pickup device manufactured by a CMOS process, and has an object to provide an X-Y address type solid-state image pickup device which has a small element size and a wide opening ratio, and can reduce a kTC noise. A photodiode 10, a reset transistor 12, a source follower amplifier 14, and a horizontal selection transistor 16 are formed in each of pixel regions Pmn. A kTC noise reduction circuit 6VR1 for reducing a kTC noise and a CDS circuit 6CL1 are formed outside of the pixel regions Pmn. A differential amplifier is constituted by a first differential transistor 62 of the kTC noise reduction circuit 6VR1 and the source follower amplifier 14 in each of the pixel regions Pmn.

    摘要翻译: 本发明涉及一种通过CMOS工艺制造的XY地址型固态摄像装置,其目的是提供一种具有小元件尺寸和宽开口率的XY地址型固态图像拾取装置,并且可以 降低kTC噪声。 在每个像素区域Pmn中形成光电二极管10,复位晶体管12,源极跟随放大器14和水平选择晶体管16。 在像素区域Pmn的外部形成用于降低kTC噪声的kTC噪声降低电路6 VR 1和CDS电路6 CL 1。 差分放大器由每个像素区域Pmn中的kTC降噪电路6 VR 1的第一差分晶体管62和源极跟随放大器14构成。

    Offset cancel circuit of voltage follower equipped with operational amplifier
    4.
    发明授权
    Offset cancel circuit of voltage follower equipped with operational amplifier 失效
    具有运算放大器的电压跟随器的偏移消除电路

    公开(公告)号:US07358946B2

    公开(公告)日:2008-04-15

    申请号:US11181774

    申请日:2005-07-15

    IPC分类号: G09G3/36

    CPC分类号: G09G3/3685 H03F3/45753

    摘要: A differential amplifying circuit 11 includes a current mirror circuit having first and second current ends to which drains of MOS transistors M8 and M9 are respectively connected, and a pair of differential MOS transistors M1 and M2 having gates between which a switch SW1 is connected. A reference potential Vref is applied to the gate of the MOS transistors M9. A switch SW2 is connected between the output VO of an output buffer circuit 12 and the gate of a MOS transistor M1, and a switch SW3 is connected between the output VO and the gate of the MOS transistor M8. During the offset-cancel preparation period, the switches SW1 and SW3 are on and the switch SW2 is off. Next, the switches SW1 to SW3 are turned over, consequently outputting offset-canceled potential VO.

    摘要翻译: 差分放大电路11包括具有分别连接MOS晶体管M 8和M 9的漏极的第一和第二电流端的电流镜电路,以及具有栅极的一对差分MOS晶体管M 1和M 2,开关SW 1连接。 参考电位Vref被施加到MOS晶体管M 9的栅极。 开关SW 2连接在输出缓冲器电路12的输出VO和MOS晶体管M 1的栅极之间,开关SW 3连接在输出VO和MOS晶体管M8的栅极之间。 在偏移取消准备期间,开关SW 1和SW 3接通,开关SW 2断开。 接下来,开关SW 1至SW 3翻转,从而输出偏移抵消电位VO。

    X-Y address type solid-state image pickup device with an image averaging circuit disposed in the noise cancel circuit
    5.
    发明授权
    X-Y address type solid-state image pickup device with an image averaging circuit disposed in the noise cancel circuit 有权
    具有设置在噪声消除电路中的图像平均电路的X-Y地址型固态图像拾取装置

    公开(公告)号:US07242427B2

    公开(公告)日:2007-07-10

    申请号:US10055901

    申请日:2002-01-28

    IPC分类号: H04N5/217

    CPC分类号: H04N5/378 H04N5/343 H04N5/347

    摘要: The invention relates to an X-Y address type solid-state image pickup device manufactured by a CMOS process, and has an object to provide an X-Y address type solid-state image pickup device in which a chip area is not increased, manufacturing costs are suppressed, and an image averaging processing can be carried out. Pixel regions Pmn are arranged in a matrix form in regions defined by horizontal selection lines RWm and vertical selection lines CLn. Each of the pixel regions Pmn includes a photodiode 10, a source follower amplifier 14 for converting an electric charge of the photodiode 10 into a voltage and amplifying it to output image data, and a horizontal selection transistor 16 for outputting the image data to a predetermined one of the vertical selection lines CLn. An amplifier/noise cancel circuit 6 has a built-in image averaging circuit for carrying out an averaging processing of the image data outputted from at least two of the plurality of the pixel regions Pmn.

    摘要翻译: 本发明涉及一种通过CMOS工艺制造的XY地址型固态摄像装置,其目的是提供一种XY地址型固态摄像装置,其中芯片面积不增加,制造成本被抑制, 并且可以执行图像平均处理。 像素区域Pmn以由水平选择线RWm和垂直选择线CLn限定的区域中的矩阵形式排列。 每个像素区Pmn包括光电二极管10,用于将光电二极管10的电荷转换成电压并放大以输出图像数据的源极跟随器放大器14以及用于将图像数据输出到预定的水平选择晶体管16 垂直选择线CLn之一。 放大器/噪声消除电路6具有内置图像平均电路,用于对从多个像素区域Pmn中的至少两个输出的图像数据进行平均处理。

    Offset cancel circuit of voltage follower equipped with operational amplifier
    6.
    发明授权
    Offset cancel circuit of voltage follower equipped with operational amplifier 有权
    具有运算放大器的电压跟随器的偏移消除电路

    公开(公告)号:US06946905B2

    公开(公告)日:2005-09-20

    申请号:US10301649

    申请日:2002-11-22

    CPC分类号: G09G3/3685 H03F3/45753

    摘要: A differential amplifying circuit 11 includes a current mirror circuit having first and second current ends to which drains of MOS transistors M8 and M9 are respectively connected, and a pair of differential MOS transistors M1 and M2 having gates between which a switch SW1 is connected. A reference potential Vref is applied to the gate of the MOS transistors M9. A switch SW2 is connected between the output VO of an output buffer circuit 12 and the gate of a MOS transistor M1, and a switch SW3 is connected between the output VO and the gate of the MOS transistor M8. During the offset-cancel preparation period, the switches SW1 and SW3 are on and the switch SW2 is off. Next, the switches SW1 to SW3 are turned over, consequently outputting offset-canceled potential VO.

    摘要翻译: 差分放大电路11包括具有分别连接MOS晶体管M 8和M 9的漏极的第一和第二电流端的电流镜电路,以及具有栅极的一对差分MOS晶体管M 1和M 2,开关SW 1连接。 参考电位Vref被施加到MOS晶体管M 9的栅极。 开关SW 2连接在输出缓冲器电路12的输出VO和MOS晶体管M 1的栅极之间,开关SW 3连接在输出VO和MOS晶体管M8的栅极之间。 在偏移取消准备期间,开关SW 1和SW 3接通,开关SW 2断开。 接下来,开关SW 1至SW 3翻转,从而输出偏移抵消电位VO。

    CMOS image sensor with voltage control circuit
    7.
    发明授权
    CMOS image sensor with voltage control circuit 有权
    CMOS图像传感器带电压控制电路

    公开(公告)号:US07224390B2

    公开(公告)日:2007-05-29

    申请号:US10318052

    申请日:2002-12-13

    IPC分类号: H04N3/14 H04N5/335

    CPC分类号: H04N5/3575 H04N5/363

    摘要: A CMOS image sensor that reduces kTC noise in a wide band. A pixel circuit corresponding to one pixel includes a photoelectric conversion element for carrying out the photoelectric conversion of incident light, a reset transistor for resetting a cathode of the photoelectric conversion element to initial voltage, an amplifying transistor for converting electric charges accumulated in the photoelectric conversion element to voltage, and a row selection transistor for selecting signals output from pixel areas arranged in a row direction. A voltage control circuit controls the potential of a gate of the reset transistor during a period when the photoelectric conversion element is reset to change ON-state resistance of the reset transistor. By doing so, a cutoff frequency for a low-pass filter formed in the pixel circuit by ON-state resistance of the reset transistor and parasitic capacitance produced at the cathode on the photoelectric conversion element will be controlled.

    摘要翻译: CMOS图像传感器可以在宽带中降低kTC噪声。 对应于一个像素的像素电路包括用于进行入射光的光电转换的光电转换元件,用于将光电转换元件的阴极复位为初始电压的复位晶体管,用于转换在光电转换中累积的电荷的放大晶体管 以及用于选择从行方向排列的像素区域输出的信号的行选择晶体管。 在光电转换元件被复位以改变复位晶体管的导通电阻的时段期间,电压控制电路控制复位晶体管的栅极的电位。 通过这样做,将控制由复位晶体管的导通状态电阻形成在像素电路中的低通滤波器的截止频率以及光电转换元件上阴极产生的寄生电容。

    CMOS sensor circuit having a voltage control circuit controlling a gate potential of a photodiode reset transistor to a potential other than power source potentials
    8.
    发明授权
    CMOS sensor circuit having a voltage control circuit controlling a gate potential of a photodiode reset transistor to a potential other than power source potentials 失效
    CMOS传感器电路具有将光电二极管复位晶体管的栅极电位控制为电源电位以外的电位的电压控制电路

    公开(公告)号:US07196726B2

    公开(公告)日:2007-03-27

    申请号:US10058789

    申请日:2002-01-30

    IPC分类号: H04N3/14 H04N5/335

    CPC分类号: H04N5/3594 H04N5/374

    摘要: The CMOS sensor circuit comprises a photodiode, a reset transistor resetting the photodiode to an initial voltage, and a voltage control circuit controlling a gate potential of the reset transistor to a potential other than power source potentials. The voltage control circuit consists of an inverter circuit driving a gate of the reset transistor. The inverter circuit includes a P-channel MOS transistor, an N-channel MOS transistor, and a transistor inserted between a drain of the P-channel MOS transistor and a drain of the N-channel MOS transistor so as to control a blooming.

    摘要翻译: CMOS传感器电路包括光电二极管,将光电二极管复位为初始电压的复位晶体管,以及将复位晶体管的栅极电位控制为电源电位以外的电位的电压控制电路。 电压控制电路由驱动复位晶体管的栅极的逆变器电路构成。 逆变器电路包括P沟道MOS晶体管,N沟道MOS晶体管和插入在P沟道MOS晶体管的漏极和N沟道MOS晶体管的漏极之间的晶体管,以便控制着色。

    Active rectifying apparatus
    9.
    发明授权
    Active rectifying apparatus 有权
    主动整流装置

    公开(公告)号:US08416015B2

    公开(公告)日:2013-04-09

    申请号:US13078386

    申请日:2011-04-01

    申请人: Chikara Tsuchiya

    发明人: Chikara Tsuchiya

    IPC分类号: H03K17/74 H03G11/02

    摘要: A semiconductor apparatus includes: a first transistor; a second transistor having a higher withstand voltage than the first transistor, a source of the second transistor coupled to a drain of the first transistor, a gate of the second transistor coupled to a source of the first transistor; a third transistor having a higher withstand voltage than the first transistor and a drain of the third transistor coupled to a drain of the second transistor; and a comparator that compares a source voltage of the first transistor with a source voltage of the third transistor, and controls a gate voltage of the first transistor.

    摘要翻译: 一种半导体装置,包括:第一晶体管; 第二晶体管具有比第一晶体管更高的耐受电压,第二晶体管的源极耦合到第一晶体管的漏极,第二晶体管的栅极耦合到第一晶体管的源极; 具有比第一晶体管更高的耐受电压的第三晶体管和耦合到第二晶体管的漏极的第三晶体管的漏极; 以及比较器,其将第一晶体管的源极电压与第三晶体管的源极电压进行比较,并且控制第一晶体管的栅极电压。

    DC/DC converter
    10.
    发明授权
    DC/DC converter 有权
    DC / DC转换器

    公开(公告)号:US07019501B2

    公开(公告)日:2006-03-28

    申请号:US10806150

    申请日:2004-03-23

    IPC分类号: G05F1/40

    摘要: A DC/DC converter enabling an increase in frequency. The DC/DC converter includes a main transistor, a synchronization transistor, a control circuit, which controls the main transistor and the synchronization transistor, and a capacitor, which is charged to generate gate voltage for the main transistor. The control circuit includes a charging time setting circuit for setting the activation time of the main transistor and the synchronization transistor.

    摘要翻译: DC / DC转换器,能够提高频率。 DC / DC转换器包括主晶体管,同步晶体管,控制主晶体管和同步晶体管的控制电路以及被充电以产生主晶体管的栅极电压的电容器。 控制电路包括用于设定主晶体管和同步晶体管的激活时间的充电时间设定电路。