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公开(公告)号：US06388696B1
公开(公告)日：2002-05-14
申请号：US09084324
申请日：1998-05-27
IPC分类号： B41J245
CPC分类号： B41J2/45 , H01L24/06 , H01L27/153 , H01L2224/04042 , H01L2224/0603 , H01L2224/45144 , H01L2224/48465 , H01L2224/49107 , H01L2224/49109 , H01L2924/12036 , H01L2924/12041 , H01L2924/00
摘要： According to the present invention, a plurality of p-type semiconductor layers 13 are formed in a single row and a first layer insulating film 12 having first opening portions 16a and an n-side opening portion 17 is formed on the layers in an n-type semiconductor block 11. On the first layer insulating film 12, p-side electrodes 14 to connect to the p-type semiconductor layers 13 at the first opening portions 16a and an n-side electrode 55 (an n-side contact electrode 55a and an n-side pad electrode 55b) to connect with the n-type semiconductor block 11 at the n-side opening portion 17 are formed. Furthermore, p-side common wirings 4 to connect with specific p-side electrodes 14 are formed via a second layer insulating film 18. The p-side electrodes 14 and the n-side electrode 55 are formed using the same conductive film material through a single film formation and patterning process. An Au alloy film, for instance, may be used to form the conductive film that is to constitute the p-side electrodes 14 and the n-side electrode 55.
摘要翻译： 根据本发明，多个p型半导体层13形成为单列，并且在n型层中的层上形成具有第一开口部分16a和n侧开口部分17的第一层绝缘膜12， 在第一层绝缘膜12上，在第一开口部16a和n侧电极55（n侧接触电极55a和n侧电极55）连接到p型半导体层13的p侧电极14 形成与n侧开口部17处的n型半导体块11连接的n侧焊盘电极55b）。 此外，通过第二层绝缘膜18形成与特定p侧电极14连接的p侧公共配线4.P侧电极14和n侧电极55使用相同的导电膜材料通过 单膜形成和图案化工艺。 例如，可以使用Au合金膜来形成构成p侧电极14和n侧电极55的导电膜。
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公开(公告)号：US06211537B1
公开(公告)日：2001-04-03
申请号：US09040450
申请日：1998-03-18
IPC分类号： H01L3300
CPC分类号： B41J2/45 , H01L27/153 , H01L33/0008
摘要： A 1200 dpi LED may be manufactured without highly accurate mask alignment and provide good light radiation efficiency. A first interlayer dielectric is formed on a semiconductor substrate and has a plurality of first windows formed therein and aligned in a row. A diffusion region is formed in the semiconductor substrate through each of the first windows. An electrode is formed to have an area in contact with the corresponding diffusion region. Another electrode is formed on the other side of the substrate. A second interlayer dielectric is formed on the first interlayer dielectric such that the second interlayer dielectric does not overlap the area of the electrode and does not extend to a first perimeter of the area.
摘要翻译： 可以在没有高精度掩模对准的情况下制造1200dpi的LED，并提供良好的光辐射效率。 第一层间电介质形成在半导体衬底上，并且具有形成在其中的多个第一窗口并排成一行。 通过每个第一窗口在半导体衬底中形成扩散区域。 电极形成为具有与相应的扩散区域接触的区域。 另一电极形成在基板的另一侧。 第二层间电介质形成在第一层间电介质上，使得第二层间电介质不与电极的区域重叠，并且不延伸到该区域的第一周边。
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公开(公告)号：US6064418A
公开(公告)日：2000-05-16
申请号：US57611
申请日：1998-04-09
CPC分类号： H01L33/0008 , B41J2/45 , H01L27/153
摘要： In an array of light-emitting diodes formed by diffusion of an impurity into a semiconductor substrate, the width of the diodes in the array direction is between four-tenths and five-tenths of the array pitch. The width of the windows above the diodes is between three-tenths and four-tenths of the array pitch. Between one-fourth and one-half of the surface area of each diode is covered by an electrode making contact with the diode through the window. The distance from the centers of the light-emitting diodes at the ends of the array to the edges of the substrate is between twenty-five and sixty-five hundredths of the array pitch.
摘要翻译： 在通过将杂质扩散到半导体衬底中形成的发光二极管的阵列中，二极管在阵列方向上的宽度是阵列间距的十分之五十分之一。 二极管上方的窗口的宽度在阵列间距的十分之三到四分之一之间。 每个二极管的四分之一到四分之一的表面积由与二极管通过窗口接触的电极覆盖。 从阵列端部的发光二极管的中心到基板的边缘的距离在阵列间距的二十五分之一到六百零五分之间。
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公开(公告)号：US5972729A
公开(公告)日：1999-10-26
申请号：US31534
申请日：1998-02-27
IPC分类号： B41J2/44 , B41J2/45 , B41J2/455 , H01L21/301 , H01L27/15 , H01L31/10 , H01L33/08 , H01L33/30 , H01L33/44 , H01L33/48 , H01L33/00
CPC分类号： H01L27/153 , B41J2/45 , H01L33/0008 , Y10S438/975
摘要： A method of manufacturing a light-emitting or a light-receiving diode array chip. A first interlayer dielectric is formed in each of a plurality of chip areas on a substrate of a first conductivity type. Impurity diffusion regions of a second conductivity type are formed in the substrate using the first interlayer dielectric as a diffusion mask. An electrode is formed in contact with each of the impurity diffusion regions. The substrate is separated so that the plurality of chip areas are separated into individual chips. A second interlayer dielectric may be formed on the first interlayer dielectric after forming the impurity diffusion regions. The second interlayer dielectric is formed such that the second interlayer dielectric is absent from a second area along which the substrate is separated into the individual chips, at least in the vicinity of the last one of a plurality of windows. Island-shaped patterns may be formed on the interlayer dielectric so as to hold the interlayer dielectric onto the substrate. The first interlayer dielectric may be removed such that the first interlayer dielectric is absent from the second area, at least in the vicinity of the last one of the plurality of windows.
摘要翻译： 一种制造发光或光接收二极管阵列芯片的方法。 在第一导电类型的衬底上的多个芯片区域中的每一个中形成第一层间电介质。 使用第一层间电介质作为扩散掩模，在衬底中形成第二导电类型的杂质扩散区域。 形成与每个杂质扩散区接触的电极。 分离基板使得多个芯片区域分离为单独的芯片。 在形成杂质扩散区之后，可以在第一层间电介质上形成第二层间电介质。 第二层间电介质形成为使得第二层间电介质不存在于第二区域中，至少在多个窗口中的最后一个窗口附近，基板沿着该第二区域分离成单独的芯片。 可以在层间电介质上形成岛状图案，以将层间电介质保持在基板上。 可以去除第一层间电介质，使得至少在多个窗口中的最后一个窗口附近，第二区域中不存在第一层间电介质。
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5.发明授权Light-emitting element array and fabrication method with separate light-emitting and current-conducting diffusion areas 有权发光元件阵列和具有分开的发光和导电扩散区域的制造方法
公开(公告)号：US6133588A
公开(公告)日：2000-10-17
申请号：US128856
申请日：1998-08-04
CPC分类号： H01L33/38 , H01L33/0008 , H01L33/40
摘要： A light-emitting element is formed in a semiconductor substrate having a semi-insulating upper layer and a conductive lower layer. An impurity is diffused into both layers, forming a light-emitting area by creating a pn junction in the lower layer. An additional current-conducting area is formed by diffusion of the impurity into the upper layer. An electrode is formed on the substrate, making electrical contact with the current-conducting area, but not covering any part of the light-emitting area. The current-conducting area carries current from the electrode to the light-emitting area.
摘要翻译： 在具有半绝缘上层和导电性下层的半导体衬底中形成发光元件。 杂质扩散到两层中，通过在下层中形成pn结而形成发光区域。 通过将杂质扩散到上层中形成另外的导电区域。 在基板上形成电极，与导电区域电接触，但不覆盖发光区域的任何部分。 导电区域将电流从电极传送到发光区域。
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6.发明授权Light-emitting element and array with etched surface, and fabrication method thereof 有权具有蚀刻表面的发光元件和阵列及其制造方法
公开(公告)号：US6063644A
公开(公告)日：2000-05-16
申请号：US145278
申请日：1998-09-02
CPC分类号： H01L33/30 , H01L33/0008 , H01L33/0062
摘要： A light-emitting element, or array of light-emitting elements, is formed by diffusion of an impurity into a semiconductor substrate, creating a light-emitting region. Following the diffusion, the surface zone of the light-emitting region, which includes crystal defects caused by the diffusion process, is removed by etching, thereby increasing the light-emitting efficiency by removing nonradiative recombination centers.
摘要翻译： 通过将杂质扩散到半导体衬底中，形成发光区域，形成发光元件或发光元件阵列。 在扩散之后，通过蚀刻去除包括由扩散过程引起的晶体缺陷的发光区域的表面区域，从而通过去除非辐射复合中心来提高发光效率。
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公开(公告)号：US5997152A
公开(公告)日：1999-12-07
申请号：US929759
申请日：1997-09-15
IPC分类号： B41J2/45 , H01L25/075 , F21V21/00
CPC分类号： H01L25/0753 , B41J2/45 , H01L2924/0002 , Y10S257/91 , Y10S362/80
摘要： A light emitting element module is provided including a board and plural chips arranged in the form of an array on the board. Each chip includes at least one light emitting element having a light emitting function and/or a photosensing function. The chips are arranged on the board so that the upper surfaces of adjacent chips which are located opposite to the board are positionally displaced in the height direction of the chips by at least the distance corresponding to the thickness of the chips. This uneven chip arrangement in the height direction may be established by alternately arranging thicker chips and thinner chips on the board.
摘要翻译： 提供了一种发光元件模块，其包括板和在板上以阵列的形式布置的多个芯片。 每个芯片包括至少一个具有发光功能和/或感光功能的发光元件。 芯片布置在板上，使得与芯片相对的相邻芯片的上表面在芯片的高度方向上位置移位至少对应于芯片的厚度的距离。 可以通过在板上交替地布置更厚的芯片和更薄的芯片来建立在高度方向上的这种不均匀的芯片布置。
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公开(公告)号：US5869221A
公开(公告)日：1999-02-09
申请号：US997735
申请日：1997-12-24
CPC分类号： H01L27/153
摘要： A method of fabricating an LED array includes forming a first insulating film composed of aluminum oxide on a semiconductor substrate of a first conductive type; patterning the first insulating film by photolithography to form a plurality of first windows; diffusing an impurity of a second conductive type through the plurality of first windows into the first insulating film, thereby forming a plurality of diffusion regions of the second conductive type below the plurality of first windows; forming a second insulating film on the first insulating film and the plurality of first windows; patterning the second insulating film by photolithography to-remove the second insulating film from the plurality of first windows, using an etchant that does not etch the first insulating film; forming a metal film on the second insulating film and the plurality of first windows; and patterning the metal film by photolithography to form a plurality of electrodes which make electrical contact with respective diffusion regions.
摘要翻译： 制造LED阵列的方法包括在第一导电类型的半导体衬底上形成由氧化铝构成的第一绝缘膜; 通过光刻图案化第一绝缘膜以形成多个第一窗口; 将通过所述多个第一窗口的第二导电类型的杂质扩散到所述第一绝缘膜中，从而在所述多个第一窗口的下方形成所述第二导电类型的多个扩散区域; 在所述第一绝缘膜和所述多个第一窗口上形成第二绝缘膜; 使用不蚀刻第一绝缘膜的蚀刻剂通过光刻图案化第二绝缘膜以从多个第一窗口去除第二绝缘膜; 在所述第二绝缘膜和所述多个第一窗口上形成金属膜; 并通过光刻法形成金属膜以形成与各个扩散区电接触的多个电极。
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公开(公告)号：US5821567A
公开(公告)日：1998-10-13
申请号：US763860
申请日：1996-12-11
IPC分类号： H01L27/144 , H01L27/146 , H01L27/15 , H01L31/0224 , H01L31/10 , H01L31/12 , H01L33/00
CPC分类号： H01L31/022408 , H01L27/1446 , H01L27/14601 , H01L27/14643 , H01L27/14683 , H01L27/153 , H01L31/125 , H01L33/0008 , H01L27/156
摘要： A light-sensing/emitting diode array chip has impurity diffusion regions with a depth of at least 0.5 .mu.m but not more than 2 .mu.m in a semiconductor substrate. Each impurity diffusion region is preferably divided into a first region, used for emitting or sensing light, and a wider second region, used for electrode contact. The second regions are located on alternate sides of the array line, permitting a small array pitch to be combined with a large contact area. In a wafer process for fabrication of the chips, a diffusion mask has both windows defining the impurity diffusion regions, and dicing line marks. The dicing line marks are narrowed where they pass adjacent to the windows at the ends of the chip. In the electrode fabrication step, a photomask with an enlarged pattern is used, to allow for misalignment with the diffusion mask.
摘要翻译： 光敏/发光二极管阵列芯片在半导体衬底中具有深度至少为0.5μm但不大于2μm的杂质扩散区域。 每个杂质扩散区优选分为用于发射或感测光的第一区域和用于电极接触的较宽的第二区域。 第二区域位于阵列线的另一侧，允许小的阵列间距与大的接触面积组合。 在用于制造芯片的晶片工艺中，扩散掩模具有限定杂质扩散区域的两个窗口和切割线标记。 切割线标记在其靠近芯片端部的窗口的地方变窄。 在电极制造步骤中，使用具有放大图案的光掩模，以允许与扩散掩模的未对准。
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公开(公告)号：US5733689A
公开(公告)日：1998-03-31
申请号：US611410
申请日：1996-03-06
CPC分类号： H01L27/153
摘要： A method of fabricating an LED array includes (a) forming a first insulating film composed of aluminum oxide on a semiconductor substrate of a first conductive type; (b) patterning the first insulating film by photolithography to form a plurality of first windows; (c) diffusing an impurity of a second conductive type through the plurality of first windows into the first insulating film, thereby forming a plurality of diffusion regions of the second conductive type below the plurality of first windows; (d) forming a second insulating film on the first insulating film and the plurality of first windows; (e) patterning the second insulating film by photolithography to remove the second insulating film from the plurality of first windows, using an etchant that does not etch the first insulating film; (f) forming a metal film on the second insulating film and the plurality of first windows; and (g) patterning the metal film by photolithography to form a plurality of electrodes which make electrical contact with respective diffusion regions.
摘要翻译： 制造LED阵列的方法包括：（a）在第一导电类型的半导体衬底上形成由氧化铝构成的第一绝缘膜; （b）通过光刻图案化所述第一绝缘膜以形成多个第一窗口; （c）将通过所述多个第一窗口的第二导电类型的杂质扩散到所述第一绝缘膜中，从而在所述多个第一窗口下方形成所述第二导电类型的多个扩散区域; （d）在所述第一绝缘膜和所述多个第一窗口上形成第二绝缘膜; （e）使用不蚀刻第一绝缘膜的蚀刻剂通过光刻对第二绝缘膜图案化以从多个第一窗口去除第二绝缘膜; （f）在所述第二绝缘膜和所述多个第一窗口上形成金属膜; 和（g）通过光刻法形成金属膜以形成与各个扩散区电接触的多个电极。
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