INTEGRATED CIRCUIT INCLUDING A SEMICONDUCTOR DEVICE
    1.
    发明申请
    INTEGRATED CIRCUIT INCLUDING A SEMICONDUCTOR DEVICE 有权
    集成电路,包括半导体器件

    公开(公告)号:US20080088355A1

    公开(公告)日:2008-04-17

    申请号:US11870750

    申请日:2007-10-11

    IPC分类号: H03K17/687

    摘要: An integrated circuit including a semiconductor device is disclosed. One embodiment provides a load current component, having a multiplicity of trenches in a cell array. A sensor component is integrated into the cell array of the load current component and has a sensor cell array, the area of which is smaller than the area of the cell array of the load current component by a specific factor. The trenches forming the cell array of the sensor component correspond to the trenches of the cell array of the load current component, configured such that the trenches of the sensor component at the at least one side merge uniformly into the trenches of the cell array of the load current component without interruptions or disturbances of the trench geometry.

    摘要翻译: 公开了一种包括半导体器件的集成电路。 一个实施例提供负载电流分量,其具有单元阵列中的多个沟槽。 传感器组件被集成到负载电流分量的单元阵列中,并且具有传感器单元阵列,其区域小于负载电流分量的单元阵列的面积的特定因子。 形成传感器组件的单元阵列的沟槽对应于负载电流分量的单元阵列的沟槽,其被配置为使得至少一侧的传感器组件的沟槽均匀地合并到单元阵列的沟槽中 负载电流分量,不影响沟槽几何形状的干扰或干扰。

    Integrated circuit including a semiconductor device
    2.
    发明授权
    Integrated circuit including a semiconductor device 有权
    包括半导体器件的集成电路

    公开(公告)号:US07800171B2

    公开(公告)日:2010-09-21

    申请号:US11870750

    申请日:2007-10-11

    IPC分类号: H01L21/336

    摘要: An integrated circuit including a semiconductor device is disclosed. One embodiment provides a load current component, having a multiplicity of trenches in a cell array. A sensor component is integrated into the cell array of the load current component and has a sensor cell array, the area of which is smaller than the area of the cell array of the load current component by a specific factor. The trenches forming the cell array of the sensor component correspond to the trenches of the cell array of the load current component, configured such that the trenches of the sensor component at the at least one side merge uniformly into the trenches of the cell array of the load current component without interruptions or disturbances of the trench geometry.

    摘要翻译: 公开了一种包括半导体器件的集成电路。 一个实施例提供负载电流分量,其具有单元阵列中的多个沟槽。 传感器组件被集成到负载电流分量的单元阵列中,并且具有传感器单元阵列,其区域小于负载电流分量的单元阵列的面积的特定因子。 形成传感器组件的单元阵列的沟槽对应于负载电流分量的单元阵列的沟槽,其被配置为使得至少一侧的传感器组件的沟槽均匀地合并到单元阵列的沟槽中 负载电流分量,不影响沟槽几何形状的干扰或干扰。

    Semiconductor device and method of manufacturing a semiconductor device
    4.
    发明授权
    Semiconductor device and method of manufacturing a semiconductor device 有权
    半导体装置及其制造方法

    公开(公告)号:US07939885B2

    公开(公告)日:2011-05-10

    申请号:US12112547

    申请日:2008-04-30

    IPC分类号: H01L29/76

    摘要: A semiconductor device has a substrate having a plurality of neighboring trenches, and a contact area, one mesa stripe each being formed between two neighboring trenches. The contact area contacts mesa stripes and surrounds an opening region in which the contact area is not formed and which is formed such that the contact area contacts the same mesa stripes at two positions between which the opening region is arranged, and the opening region having a region of elongate extension which intersects the mesa stripes in a skewed or perpendicular manner.

    摘要翻译: 半导体器件具有具有多个相邻沟槽的衬底,以及每个在两个相邻沟槽之间形成的接触区域,一个台面条纹。 接触区域接触台面条状并且围绕其中未形成接触区域的开口区域,并且其形成为使得接触区域在布置有开口区域的两个位置处接触相同的台面条纹,并且开口区域具有 细长延伸区域以斜面或垂直方式与台面条纹相交。

    Field effect trench transistor
    10.
    发明申请
    Field effect trench transistor 有权
    场效应沟槽晶体管

    公开(公告)号:US20060071276A1

    公开(公告)日:2006-04-06

    申请号:US11230705

    申请日:2005-09-20

    IPC分类号: H01L23/62

    摘要: One embodiment of the invention relates to a field effect trench transistor with a multiplicity of transistor cells that are arranged like an array and whose gate electrodes are arranged in active trenches formed in a semiconductor body. Inactive trenches are arranged in the array of the transistor cells, there being no gate electrodes situated in said inactive trenches, and a series of polysilicon diodes are integrated in one or more of the inactive trenches which diodes, for protection against damage to the gate oxide through ESD pulses, are contact-connected to a source metallization at one of their ends and to a gate metallization at their other end, and/or alternatively or additionally one or more polysilicon zener diodes connected in series is or are integrated in the inactive trench or trenches and contact-connected to the gate metallization by one of its or their ends and to drain potential by its or their other end.

    摘要翻译: 本发明的一个实施例涉及具有多个晶体管单元的场效应沟槽晶体管,其排列成阵列并且其栅电极被布置在形成于半导体本体中的有源沟槽中。 在晶体管单元的阵列中布置非活性沟槽,不存在位于所述非活性沟槽中的栅电极,并且一系列多晶硅二极管集成在一个或多个非活性沟槽中,这些二极管用于防止对栅极氧化物的损伤 通过ESD脉冲,在它们的一端处的源极金属化和其另一端的栅极金属化接触连接,和/或可选地或另外地一个或多个串联连接的多晶硅齐纳二极管被集成在非活性沟槽中 或沟槽,并且通过其端点之一与栅极金属化接触连接,并通过其或其另一端漏极电位。