公开(公告)号：US20140039334A1

公开(公告)日：2014-02-06

申请号：US13951342

申请日：2013-07-25

申请人： Matthew Banet ,  Gregory Feld ,  Andrew Terry

发明人： Matthew Banet ,  Gregory Feld ,  Andrew Terry

IPC分类号： A61B5/00 ,  A61B5/044 ,  A61B5/04 ,  A61B5/0245 ,  A61B5/0452

CPC分类号： A61B5/4848 ,  A61B5/0006 ,  A61B5/0022 ,  A61B5/0205 ,  A61B5/0245 ,  A61B5/04012 ,  A61B5/044 ,  A61B5/0452 ,  A61B5/686 ,  A61B5/7475 ,  G06F19/00

摘要： The invention provides a system for evaluating a patient featuring: 1) an ECG-measuring system connected to the patient and configured to sense ECG information from the patient; 2) a data-acquisition system interfaced to a vital sign-monitoring system configured to sense vital sign information from the patient during an electro-physiology (EP) procedure; and 3) an external software system interfaced to both systems. The external software system includes a first software interface that receives ECG information measured from the patient by the ECG-measuring system, and a second software interface that receives vital sign and EP-related information from the data-acquisition system measured from the patient during an EP procedure. A database stores physiological and EP-related information measured from the patient before, during, and after the EP procedure. And an algorithm interfaced with the database determines an efficacy of the EP procedure by collectively analyzing information measured during each of these phases.

摘要翻译： 本发明提供了一种用于评估患者的系统，其特征在于：1）连接到患者并被配置为感测患者的ECG信息的ECG测量系统; 2）接口到生命体征监测系统的数据采集系统，其配置成在电生理（EP）过程期间感测患者的生命体征信息; 和3）连接到这两个系统的外部软件系统。 外部软件系统包括第一软件接口，其接收由ECG测量系统从患者测量的ECG信息;以及第二软件接口，其从在患者期间从患者测量的数据采集系统接收生命体征和EP相关信息 EP程序。 数据库存储在EP程序之前，期间和之后从患者测量的生理学和EP相关信息。 并且与数据库连接的算法通过集体分析在这些阶段中的每一个期间测量的信息来确定EP过程的功效。

公开(公告)号：US20100245142A1

公开(公告)日：2010-09-30

申请号：US12384187

申请日：2009-04-01

申请人： Andrew Myles ,  Andrew Terry

发明人： Andrew Myles ,  Andrew Terry

IPC分类号： H03M1/00 ,  H03M1/66

CPC分类号： H03M1/08 ,  H03M1/0665 ,  H03M1/806 ,  H03M3/502

摘要： Systems and methods using the same to achieve a tri-level multi-bit delta-sigma DAC having reduced power consumption and voltage droop have been achieved. A new rotation-based first order noise-shaping Dynamic Element Matcher (DEM) technique for use with 3-level unit elements have been disclosed. Reduced reference loading has been achieved when the tri-level DEM scheme is applied to switched capacitor implementations in particular. Furthermore a differential switched-capacitor DAC implementation, which enables use of the DEM technique is disclosed. The invention allows reduced circuit complexity required to implement a N-bit DAC when constructed using 3-level unit elements.

摘要翻译： 已经实现了使用其实现具有降低的功率消耗和电压下降的三电平多位Δ-ΣDAC的系统和方法。 已经公开了一种与3级单元元件一起使用的新的基于旋转的一阶噪声整形动态元素匹配器（DEM）技术。 当三电平DEM方案特别适用于开关电容器实现时，已经实现了减少的参考负载。 此外，公开了能够使用DEM技术的差分开关电容器DAC实现。 本发明允许在使用3级单元元件构造时实现N位DAC所需的电路复杂度降低。

公开(公告)号：US09143105B2

公开(公告)日：2015-09-22

申请号：US13299873

申请日：2011-11-18

申请人： Sebastian Loeda ,  Andrew Terry

发明人： Sebastian Loeda ,  Andrew Terry

IPC分类号： H03F99/00 ,  H03G1/00 ,  H03G3/00 ,  H03F3/217

CPC分类号： H03G1/0088 ,  H03F3/217 ,  H03F3/2173 ,  H03F2200/345 ,  H03G3/001

摘要： A variable gain analog amplifier is described that uses pulse-density modulation in the form of a sigma-delta modulator (SDM) to produce a gain by modulating the selection of a switch that selects the amount of resistance in a negative feedback loop of the amplifier. The output of the SDM is dithered to increase the gain resolution of the analog amplifier, wherein the increased resolution produces a quiet, inaudible transition between changes in gain setting at an output of the variable gain amplifier and in addition produces a quiet, inaudible mixing and merging of audio signals.

摘要翻译： 描述了一种可变增益模拟放大器，其采用Σ-Δ调制器（SDM）形式的脉冲密度调制，以通过调制选择放大器的负反馈环路中的电阻量的开关选择来产生增益 。 SDM的输出被抖动以增加模拟放大器的增益分辨率，其中增加的分辨率在可变增益放大器的输出处的增益设置的变化之间产生安静的，不可听见的转变，并且还产生安静的，不可听见的混合和 合并音频信号。

公开(公告)号：US08868007B2

公开(公告)日：2014-10-21

申请号：US13601482

申请日：2012-08-31

申请人： Andrew Terry

发明人： Andrew Terry

IPC分类号： H04B1/38

CPC分类号： H04B1/30

摘要： Communication processing paths include distortions, such as DC offset in the baseband analog path which needs to be accounted for. The use of a digital-to-analog converter (DAC) to inject a DC offset cancellation signal can bring about noise/area/power advantages. The DAC is driven by a mixed signal low pass filter loop. However, the DAC could also be driven in an open loop system, or a combination of open and closed loop. A low noise sign and magnitude DAC with low area and power requirements is implemented using selectively connected programmable current sources to virtual earth input terminals on a transimpedance amplifier (TIA) op-amp circuit. The constant virtual earth voltage eliminates linearity problems that would otherwise exist due to the finite current source output impedance. Current sources are only switched in when required so unneeded sources are out of circuit and do not contribute noise or use any power.

摘要翻译： 通信处理路径包括失真，例如需要考虑的基带模拟路径中的DC偏移。 使用数模转换器（DAC）注入直流偏移消除信号可以带来噪声/面积/功率优势。 DAC由混合信号低通滤波器环路驱动。 然而，DAC也可以在开环系统中驱动，也可以是开环和闭环的组合。 具有低面积和功率要求的低噪声符号和幅度DAC通过使用选择性连接的可编程电流源到跨阻抗放大器（TIA）运算放大器电路上的虚拟接地输入端子来实现。 恒定的虚拟接地电压消除了由于有限的电流源输出阻抗而将存在的线性问题。 电流源仅在需要时才开关，因此不需要的电源不会出现电路，不会产生噪音或使用任何电源。

公开(公告)号：US20140065979A1

公开(公告)日：2014-03-06

申请号：US13601482

申请日：2012-08-31

申请人： Andrew Terry

发明人： Andrew Terry

IPC分类号： H04B15/00

CPC分类号： H04B1/30

摘要： Communication processing paths include distortions, such as DC offset in the baseband analog path which needs to be accounted for. The use of a digital-to-analog converter (DAC) to inject a DC offset cancellation signal can bring about noise/area/power advantages. The DAC is driven by a mixed signal low pass filter loop. However, the DAC could also be driven in an open loop system, or a combination of open and closed loop. A low noise sign and magnitude DAC with low area and power requirements is implemented using selectively connected programmable current sources to virtual earth input terminals on a transimpedance amplifier (TIA) op-amp circuit. The constant virtual earth voltage eliminates linearity problems that would otherwise exist due to the finite current source output impedance. Current sources are only switched in when required so unneeded sources are out of circuit and do not contribute noise or use any power.

摘要翻译： 通信处理路径包括失真，例如需要考虑的基带模拟路径中的DC偏移。 使用数模转换器（DAC）注入直流偏移消除信号可以带来噪声/面积/功率优势。 DAC由混合信号低通滤波器环路驱动。 然而，DAC也可以在开环系统中驱动，也可以是开环和闭环的组合。 具有低面积和功率要求的低噪声符号和幅度DAC通过使用选择性连接的可编程电流源到跨阻抗放大器（TIA）运算放大器电路上的虚拟接地输入端子来实现。 恒定的虚拟接地电压消除了由于有限的电流源输出阻抗而将存在的线性问题。 电流源仅在需要时才开关，因此不需要的电源不会出现电路，不会产生噪音或使用任何电源。

公开(公告)号：US20140145301A1

公开(公告)日：2014-05-29

申请号：US13988327

申请日：2011-11-18

申请人： Yashodhan Vijay Moghe ,  Andrew Terry ,  Andrew James Read ,  Steven Grant Duvall

发明人： Yashodhan Vijay Moghe ,  Andrew Terry ,  Andrew James Read ,  Steven Grant Duvall

IPC分类号： H01L27/02 ,  H01L49/02

CPC分类号： H01L27/0292 ,  H01L23/48 ,  H01L23/5222 ,  H01L23/5223 ,  H01L23/60 ,  H01L27/0207 ,  H01L27/0248 ,  H01L27/0255 ,  H01L27/0629 ,  H01L28/40 ,  H01L29/0607 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： An integrated circuit, including at least two integrated circuit portions mutually spaced on a single electrically insulating die and at least one coupling region on the die to provide capacitive coupling between the otherwise mutually isolated integrated circuit portions, the integrated circuit portions being formed by a plurality of layers on the single die, the layers including metal and dielectric layers and at least one semiconductor layer; wherein at least one of the dielectric layers extends from the integrated circuit portions across the coupling region and at least a corresponding one of the metal layers and/or at least one semiconductor layer extends from each of the integrated circuit portions and partially across the coupling region to form capacitors therein and thereby provide the capacitive coupling between the integrated circuit portions.

摘要翻译： 一种集成电路，包括在单个电绝缘管芯上相互间隔开的至少两个集成电路部分和管芯上的至少一个耦合区域，以在另外相互隔离的集成电路部分之间提供电容耦合，所述集成电路部分由多个 层，包括金属和介电层以及至少一个半导体层; 其中所述电介质层中的至少一个从所述集成电路部分延伸穿过所述耦合区域，并且所述金属层中的至少一个和/或至少一个半导体层从所述集成电路部分中的每一个延伸并部分地跨过所述耦合区域 以在其中形成电容器，从而提供集成电路部分之间的电容耦合。

公开(公告)号：US07876151B1

公开(公告)日：2011-01-25

申请号：US12592622

申请日：2009-11-30

申请人： Andrew Terry

发明人： Andrew Terry

IPC分类号： H03G3/00

CPC分类号： H03G1/0088 ,  H03G3/001

摘要： Systems and methods to achieve an IC audio volume control requiring minimum silicon area and having an accurate volume control gain setting are disclosed. A resistive element in form of a R/2R ladder is deployed between an output node of an operational amplifier and an input node of the circuit. All resistors of said resistive element are unit resistors having a same resistance, wherein said unit resistors are arranged in parallel or series combinations to achieve a resistance desired. A first number of switches are deployed between nodes of the R/2R ladder and an inverting input of the operational amplifier. Furthermore a second number of switches are deployed between nodes within resistor units of the R/2R ladder and the inverting input. The circuit invented could have a single input or a differential input, or a single ended output or a differential output.

摘要翻译： 公开了实现需要最小硅面积并且具有精确的音量控制增益设置的IC音频音量控制的系统和方法。 形式为R / 2R梯形图的电阻元件部署在运算放大器的输出节点和电路的输入节点之间。 所述电阻元件的所有电阻器都是具有相同电阻的单位电阻器，其中所述单元电阻器被并联或串联组合地布置以实现期望的电阻。 第一数量的开关部署在R / 2R梯形图的节点和运算放大器的反相输入端之间。 此外，第二数量的开关部署在R / 2R梯形电阻单元和反相输入端的节点之间。 所发明的电路可以具有单个输入或差分输入，或单端输出或差分输出。

公开(公告)号：US09299655B2

公开(公告)日：2016-03-29

申请号：US13988327

申请日：2011-11-18

申请人： Yashodhan Vijay Moghe ,  Andrew Terry ,  Andrew James Read ,  Steven Grant Duvall

发明人： Yashodhan Vijay Moghe ,  Andrew Terry ,  Andrew James Read ,  Steven Grant Duvall

IPC分类号： H01L29/00 ,  H01L23/522 ,  H01L23/60 ,  H01L27/06 ,  H01L23/48 ,  H01L27/02 ,  H01L49/02

CPC分类号： H01L27/0292 ,  H01L23/48 ,  H01L23/5222 ,  H01L23/5223 ,  H01L23/60 ,  H01L27/0207 ,  H01L27/0248 ,  H01L27/0255 ,  H01L27/0629 ,  H01L28/40 ,  H01L29/0607 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： An integrated circuit, including at least two integrated circuit portions mutually spaced on a single electrically insulating die and at least one coupling region on the die to provide capacitive coupling between the otherwise mutually isolated integrated circuit portions, the integrated circuit portions being formed by a plurality of layers on the single die, the layers including metal and dielectric layers and at least one semiconductor layer; wherein at least one of the dielectric layers extends from the integrated circuit portions across the coupling region and at least a corresponding one of the metal layers and/or at least one semiconductor layer extends from each of the integrated circuit portions and partially across the coupling region to form capacitors therein and thereby provide the capacitive coupling between the integrated circuit portions.

摘要翻译： 一种集成电路，包括在单个电绝缘管芯上相互间隔开的至少两个集成电路部分和管芯上的至少一个耦合区域，以在另外相互隔离的集成电路部分之间提供电容耦合，所述集成电路部分由多个 层，包括金属和介电层以及至少一个半导体层; 其中所述电介质层中的至少一个从所述集成电路部分延伸穿过所述耦合区域，并且所述金属层中的至少一个和/或至少一个半导体层从所述集成电路部分中的每一个延伸并部分地跨过所述耦合区域 以在其中形成电容器，从而提供集成电路部分之间的电容耦合。

公开(公告)号：US07812753B1

公开(公告)日：2010-10-12

申请号：US12384187

申请日：2009-04-01

申请人： Andrew Myles ,  Andrew Terry

发明人： Andrew Myles ,  Andrew Terry

IPC分类号： H03M1/66

CPC分类号： H03M1/08 ,  H03M1/0665 ,  H03M1/806 ,  H03M3/502

摘要： Systems and methods using the same to achieve a tri-level multi-bit delta-sigma DAC having reduced power consumption and voltage droop have been achieved. A new rotation-based first order noise-shaping Dynamic Element Matcher (DEM) technique for use with 3-level unit elements have been disclosed. Reduced reference loading has been achieved when the tri-level DEM scheme is applied to switched capacitor implementations in particular. Furthermore a differential switched-capacitor DAC implementation, which enables use of the DEM technique is disclosed. The invention allows reduced circuit complexity required to implement a N-bit DAC when constructed using 3-level unit elements.

摘要翻译： 已经实现了使用其实现具有降低的功率消耗和电压下降的三电平多位Δ-ΣDAC的系统和方法。 已经公开了一种与3级单元元件一起使用的新的基于旋转的一阶噪声整形动态元素匹配器（DEM）技术。 当三电平DEM方案特别适用于开关电容器实现时，已经实现了减少的参考负载。 此外，公开了能够使用DEM技术的差分开关电容器DAC实现。 本发明允许在使用3级单元元件构造时实现N位DAC所需的电路复杂度降低。

公开(公告)号：US20060217132A1

公开(公告)日：2006-09-28

申请号：US11087412

申请日：2005-03-23

申请人： Justin Drummond-Murray ,  Andrew Terry ,  Niels Erven ,  Peter Doggart

发明人： Justin Drummond-Murray ,  Andrew Terry ,  Niels Erven ,  Peter Doggart

IPC分类号： H04Q7/20

CPC分类号： H04W64/00

摘要： The present invention relates to locating a person who is operating a wireless communications device in an indoor environment. In particular, it relates to processing various combinations of RSSI, direction of arrival and flight time characteristics of a signal, as received at two or more and preferably three or more access points. In one embodiment, the access points implement a wireless LAN (WLAN) and the communications device is a telephone operating over the WLAN. In another embodiment, the localization of a wireless device allows a system to reject users who are outside a predefined physical area.

摘要翻译： 本发明涉及在室内环境中定位正在操作无线通信设备的人员。 具体地说，涉及处理RSSI，到达方向以及信号的飞行时间特征的各种组合，如在两个或更多，优选三个或更多个接入点处接收到的。 在一个实施例中，接入点实现无线LAN（WLAN），并且通信设备是在WLAN上运行的电话。 在另一个实施例中，无线设备的定位允许系统拒绝在预定义的物理区域之外的用户。