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    MUSHROOM TYPE MEMORY CELL HAVING SELF-ALIGNED BOTTOM ELECTRODE AND DIODE ACCESS DEVICE
    5.
    发明申请
    MUSHROOM TYPE MEMORY CELL HAVING SELF-ALIGNED BOTTOM ELECTRODE AND DIODE ACCESS DEVICE 审中-公开
    具有自对准底部电极和二极管访问装置的MUSHROOM型存储单元

    公开(公告)号：US20100019215A1

    公开(公告)日：2010-01-28

    申请号：US12177435

    申请日：2008-07-22

    申请人： Hsiang-Lan Lung ,  Chung Hon Lam ,  Thomas D. Happ ,  Matthew J. Breitwisch ,  Alejandro Gabriel Schrott ,  Min Yang

    发明人： Hsiang-Lan Lung ,  Chung Hon Lam ,  Thomas D. Happ ,  Matthew J. Breitwisch ,  Alejandro Gabriel Schrott ,  Min Yang

    IPC分类号： H01L47/00 ,  H01L21/00

    CPC分类号： G11C13/0004 ,  G11C11/5678 ,  G11C2213/72 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144 ,  H01L45/16

    摘要： Memory devices are described along with methods for manufacturing. A memory device as described herein includes a plurality of word lines extending in a first direction, and a plurality of bit lines overlying the plurality of word lines and extending in a second direction. A plurality of memory cells are at cross-point locations. Each memory cell comprises a diode having first and second sides aligned with sides of a corresponding word line. Each memory cell also includes a bottom electrode self-centered on the diode, the bottom electrode having a top surface with a surface area less than that of the top surface of the diode. Each of the memory cells includes a strip of memory material on the top surface of the bottom electrode, the strip of memory material underlying and in electrical communication with a corresponding bit line.

    摘要翻译： 描述存储器件以及制造方法。 如本文所述的存储器件包括沿第一方向延伸的多个字线和覆盖多个字线并沿第二方向延伸的多个位线。 多个存储单元处于交叉点位置。 每个存储单元包括具有与相应字线的侧面对准的第一和第二侧的二极管。 每个存储单元还包括以二极管为中心的底部电极，底部电极具有表面积小于二极管顶表面的顶表面。 每个存储器单元包括在底部电极的顶表面上的存储器材料条，存储器材料条下面并与相应位线电连通。

    Phase change memory cell with limited switchable volume
    7.
    发明授权
    Phase change memory cell with limited switchable volume 失效
    相变容量有限的相变存储单元

    公开(公告)号：US07514705B2

    公开(公告)日：2009-04-07

    申请号：US11410466

    申请日：2006-04-25

    申请人： Matthew J. Breitwisch ,  Chung Hon Lam ,  Jan Boris Philipp ,  Stephen M. Rossnagel ,  Alejandro Gabriel Schrott

    发明人： Matthew J. Breitwisch ,  Chung Hon Lam ,  Jan Boris Philipp ,  Stephen M. Rossnagel ,  Alejandro Gabriel Schrott

    IPC分类号： H01L47/00

    CPC分类号： H01L45/144 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1246 ,  H01L45/1625 ,  H01L45/1666

    摘要： A memory cell comprises a dielectric layer and a phase change material. The dielectric layer defines a trench having both a wide portion and a narrow portion. The narrow portion is substantially narrower than the wide portion. The phase change material, in turn, at least partially fills the wide and narrow portions of the trench. What is more, the phase change material within the narrow portion of the trench defines a void. Data can be stored in the memory cell by heating the phase change material by applying a pulse of switching current to the memory cell. Advantageously, embodiments of the invention provide high switching current density and heating efficiency so that the magnitude of the switching current pulse can be reduced.

    摘要翻译： 存储单元包括介电层和相变材料。 电介质层限定了具有宽部分和窄部分的沟槽。 狭窄部分基本上比宽部分窄。 相变材料又至少部分地填充沟槽的宽而窄的部分。 此外，沟槽狭窄部分内的相变材料限定了空隙。 通过向存储单元施加切换电流的脉冲来加热相变材料，可以将数据存储在存储单元中。 有利地，本发明的实施例提供高开关电流密度和加热效率，从而可以减小开关电流脉冲的幅度。

    Scaled-down phase change memory cell in recessed heater
    10.
    发明授权
    Scaled-down phase change memory cell in recessed heater 有权
    嵌入式加热器中的缩小相变存储单元

    公开(公告)号：US08426967B2

    公开(公告)日：2013-04-23

    申请号：US11620138

    申请日：2007-01-05

    申请人： Eric Andrew Joseph ,  Chung Hon Lam ,  Alejandro Gabriel Schrott

    发明人： Eric Andrew Joseph ,  Chung Hon Lam ,  Alejandro Gabriel Schrott

    IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/06

    CPC分类号： H01L45/1233 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/1246 ,  H01L45/126 ,  H01L45/144 ,  H01L45/148 ,  H01L45/1691

    摘要： A semiconductor structure configurable for use as a nonvolatile storage element includes a first electrode, an insulating layer formed on at least a portion of an upper surface of the first electrode, and a pillar traversing the insulating layer and being recessed relative to an upper surface of the insulating layer. The pillar includes a heater formed on at least a portion of the upper surface of the first electrode and a collar formed on sidewalls of the insulating layer proximate the heater and on at least a portion of an upper surface of the heater. The structure further includes a PCM layer formed on at least a portion of the upper surface of the insulating layer and substantially filling a volume defined by the upper surface of the heater and at least a portion of an upper surface of the collar. A second electrode is formed on at least a portion of an upper surface of the phase change material layer.

    摘要翻译： 可配置为用作非易失性存储元件的半导体结构包括第一电极，形成在第一电极的上表面的至少一部分上的绝缘层和穿过绝缘层并且相对于第一电极的上表面凹陷的柱 绝缘层。 支柱包括形成在第一电极的上表面的至少一部分上的加热器和形成在靠近加热器的绝缘层的侧壁上和在加热器的上表面的至少一部分上的套环。 该结构还包括形成在绝缘层的上表面的至少一部分上并基本上填充由加热器的上表面限定的体积和套环的上表面的至少一部分的PCM层。 第二电极形成在相变材料层的上表面的至少一部分上。