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20 条记录 (耗时 0.014 秒)

    Process for fabricating an interconnect for contact holes
    6.
    发明授权
    Process for fabricating an interconnect for contact holes 失效

    公开(公告)号：US06602788B2

    公开(公告)日：2003-08-05

    申请号：US09894942

    申请日：2001-06-28

    申请人： Axel Bürke ,  Jens Hahn ,  Sven Schmidbauer

    发明人： Axel Bürke ,  Jens Hahn ,  Sven Schmidbauer

    IPC分类号： H01L2144

    CPC分类号： H01L21/76877 ,  H01L21/2855 ,  H01L23/53219 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A process for fabricating an interconnect for contact holes includes forming contact holes in an insulation layer leading to a first interconnect layer, cleaning the hole surface, forming a barrier layer on the hole surface, forming an AlGeCu-containing second interconnect layer on the insulation surface by a low-temperature PVD process to fill up the contact holes, forming and patterning a mask layer, and patterning the second interconnect layer by an anisotropic etching process using the mask layer. Due to the relatively small grain sizes and precipitations that are formed in the process, the layer can be patterned directly in a subsequent patterning step, resulting in an extremely reliable and inexpensive interconnect that is easy to integrate in existing process sequences.

    Process for producing aluminum-filled contact holes
    7.
    发明授权
    Process for producing aluminum-filled contact holes 有权
    生产铝填充接触孔的方法

    公开(公告)号：US07214610B2

    公开(公告)日：2007-05-08

    申请号：US10768241

    申请日：2004-01-30

    申请人： Jens Hahn ,  Sven Schmidbauer

    发明人： Jens Hahn ,  Sven Schmidbauer

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/76843 ,  H01L21/2855 ,  H01L21/76877

    摘要： A process for producing aluminum-filled contact holes in a wafer is disclosed. The process uses a coating installation that includes a plurality of vacuum-processing chambers that are coupled to one another via at least one transfer chamber with an associated handler for transferring the wafers. The preferred process including forming the contact holes and depositing a barrier layer. The wafer is cooled to ambient temperature. A cold aluminum PVD coating process can then be carried out in a PVD-aluminum ESC chamber. After the wafer is heated (e.g., to a temperature of less than about 450° C.), a hot aluminum PVD deposition process is carried out in the PVD-aluminum ESC chamber.

    摘要翻译： 公开了一种在晶片中生产铝填充的接触孔的方法。 该方法使用包括多个真空处理室的涂层设备，所述真空处理室经由至少一个传送室彼此耦合，具有用于传送晶片的相关处理器。 优选的方法包括形成接触孔并沉积阻挡层。 将晶片冷却至环境温度。 然后可以在PVD-aluminum ESC室中进行冷铝PVD涂层工艺。 在晶片加热（例如，低于约450℃的温度）之后，在PVD-铝ESC室中进行热铝PVD沉积工艺。

    Gate structure for a transistor and method for fabricating the gate structure
    8.
    发明申请
    Gate structure for a transistor and method for fabricating the gate structure 审中-公开
    晶体管的栅极结构和栅极结构的制造方法

    公开(公告)号：US20050202617A1

    公开(公告)日：2005-09-15

    申请号：US11044730

    申请日：2005-01-28

    申请人： Jens Hahn ,  Sven Schmidbauer ,  Axel Buerke

    发明人： Jens Hahn ,  Sven Schmidbauer ,  Axel Buerke

    IPC分类号： H01L21/28 ,  H01L29/49 ,  H01L21/8234

    CPC分类号： H01L21/28061 ,  H01L21/28247 ,  H01L29/4941

    摘要： A gate structure includes a gate electrode layer stack with a doped polysilicon layer and a gate metal layer. Between the doped polysilicon layer and the gate metal layer is a barrier layer made of metal nitride for suppressing a chemical reaction between metal and silicon. A contact layer made of metal and covering the polysilicon layer is provided on the polysilicon layer to prevent nitriding of the polysilicon layer and to reduce contact resistance. The contact layer includes titanium and the barrier layer includes titanium nitride. Since titanium nitride is chemically and thermally stable, the nitrogen remains fixedly bound in the barrier layer, which reduces the probability of a nitriding of the polysilicon layer.

    摘要翻译： 栅极结构包括具有掺杂多晶硅层和栅极金属层的栅电极层堆叠。 在掺杂多晶硅层和栅极金属层之间是由金属氮化物制成的阻挡层，用于抑制金属与硅之间的化学反应。 在多晶硅层上设置由金属制成的覆盖多晶硅层的接触层，以防止多晶硅层的氮化和降低接触电阻。 接触层包括钛，并且阻挡层包括氮化钛。 由于氮化钛是化学和热稳定的，所以氮保持固定在阻挡层中，这降低了多晶硅层氮化的可能性。

    Method for depositing a two-layer diffusion barrier
    10.
    发明授权
    Method for depositing a two-layer diffusion barrier 有权

    公开(公告)号：US06579786B2

    公开(公告)日：2003-06-17

    申请号：US09992977

    申请日：2001-11-19

    申请人： Sven Schmidbauer ,  Alexander Ruf

    发明人： Sven Schmidbauer ,  Alexander Ruf

    IPC分类号： H01L2120

    CPC分类号： H01L21/76843

    摘要： A method for depositing a two-layer diffusion barrier on a semiconductor wafer consisting of a TaN layer and a Ta layer serving as a carrier layer for copper interconnects. The TaN layer is inventively deposited at temperatures above 200° C. in a first step, and the Ta layer is deposited in a second step while cooling the semiconductor wafer to a temperature below 50° C.