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公开(公告)号：US06893976B2
公开(公告)日：2005-05-17
申请号：US10235166
申请日：2002-09-05
IPC分类号： B81C1/00 , H01L21/302
CPC分类号： B81C1/00373 , B81C2201/0187 , H04Q2213/1301
摘要： A method of producing a shadow mask having a set of apertures (the set of apertures including a given aperture with an aperture boundary) uses a wafer having at least a first silicon layer, a second silicon layer, and an insulator layer between the first and second silicon layers. A first portion of the first silicon layer within the aperture boundary is removed. This produces a second portion of the first silicon layer, which remains within the aperture boundary. The second silicon layer within the aperture boundary is removed, as well as the insulator layer within the aperture boundary. The second portion of the first silicon layer remaining within the aperture boundary then is removed.
摘要翻译： 一种制造具有一组孔径（包括具有孔径边界的给定孔径的一组孔口）的荫罩的方法使用具有至少第一硅层，第二硅层和绝缘体层的晶片，所述第一硅层和第二硅层在第一和第 第二硅层。 去除孔边界内的第一硅层的第一部分。 这产生了保留在孔边界内的第一硅层的第二部分。 孔边界内的第二硅层以及孔边界内的绝缘体层被去除。 剩余在孔边界内的第一硅层的第二部分被去除。
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公开(公告)号：US20130306356A1
公开(公告)日：2013-11-21
申请号：US13873961
申请日：2013-04-30
申请人： Mark G. Allen , Seong-O Choi , Jung-Hwan Pauk , Xiaosong Wu , Yanzhu Zhao , Yong-Kyu Yoon , Swaminathan Rajaraman
发明人： Mark G. Allen , Seong-O Choi , Jung-Hwan Pauk , Xiaosong Wu , Yanzhu Zhao , Yong-Kyu Yoon , Swaminathan Rajaraman
CPC分类号： B32B3/30 , A61B5/685 , A61B2562/125 , A61M37/0015 , A61M2037/0053 , A61N1/327 , C25D1/003 , C25D1/10 , C25D5/022 , H01B13/00 , H05K1/02 , H05K3/20 , H05K3/4007 , H05K2201/0367 , H05K2201/09045 , H05K2201/09118 , H05K2203/0113 , Y10T428/2958 , Y10T428/298
摘要： Methods are provided for fabricating three-dimensional electrically conductive structures. Three-dimensional electrically conductive microstructures are also provided. The method may include providing a mold having at least one microdepression which defines a three-dimensional structure; filling the microdepression of the mold with at least one substrate material; molding the at least one substrate material to form a substrate; and depositing and patterning of at least one electrically conductive layer either during the molding process or subsequent to the molding process to form an electrically conductive structure. In one embodiment, the three-dimensional electrically conductive microstructure comprises an electrically functional microneedle array comprising two or more microneedles, each including a high aspect ratio, polymeric three dimensional substrate structure which is at least substantially coated by an electrically conductive layer.
摘要翻译： 提供用于制造三维导电结构的方法。 还提供三维导电微结构。 该方法可以包括提供具有限定三维结构的至少一个微压缩的模具; 用至少一种基底材料填充模具的微压; 模制所述至少一种基底材料以形成基底; 以及在模制过程期间或在模制过程之后沉积和图案化至少一个导电层以形成导电结构。 在一个实施例中，三维导电微结构包括电功能微针阵列，其包括两个或更多个微针，每个微针包括高纵横比，至少基本上被导电层涂覆的聚合物三维衬底结构。
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公开(公告)号：US09330820B2
公开(公告)日：2016-05-03
申请号：US13873961
申请日：2013-04-30
申请人： Mark G. Allen , Seong-O Choi , Jung-Hwan Pauk , Xiaosong Wu , Yanzhu Zhao , Yong-Kyu Yoon , Swaminathan Rajaraman
发明人： Mark G. Allen , Seong-O Choi , Jung-Hwan Pauk , Xiaosong Wu , Yanzhu Zhao , Yong-Kyu Yoon , Swaminathan Rajaraman
IPC分类号： H01B13/00 , A61B5/00 , A61M37/00 , H05K1/02 , C25D1/00 , C25D1/10 , C25D5/02 , A61N1/32 , H05K3/40 , H05K3/20
CPC分类号： B32B3/30 , A61B5/685 , A61B2562/125 , A61M37/0015 , A61M2037/0053 , A61N1/327 , C25D1/003 , C25D1/10 , C25D5/022 , H01B13/00 , H05K1/02 , H05K3/20 , H05K3/4007 , H05K2201/0367 , H05K2201/09045 , H05K2201/09118 , H05K2203/0113 , Y10T428/2958 , Y10T428/298
摘要： Methods are provided for fabricating three-dimensional electrically conductive structures. Three-dimensional electrically conductive microstructures are also provided. The method may include providing a mold having at least one microdepression which defines a three-dimensional structure; filling the microdepression of the mold with at least one substrate material; molding the at least one substrate material to form a substrate; and depositing and patterning of at least one electrically conductive layer either during the molding process or subsequent to the molding process to form an electrically conductive structure. In one embodiment, the three-dimensional electrically conductive microstructure comprises an electrically functional microneedle array comprising two or more microneedles, each including a high aspect ratio, polymeric three dimensional substrate structure which is at least substantially coated by an electrically conductive layer.
摘要翻译： 提供用于制造三维导电结构的方法。 还提供三维导电微结构。 该方法可以包括提供具有限定三维结构的至少一个微压缩的模具; 用至少一种基底材料填充模具的微压缩; 模制所述至少一种基底材料以形成基底; 以及在模制过程期间或在模制过程之后沉积和图案化至少一个导电层以形成导电结构。 在一个实施例中，三维导电微结构包括电功能微针阵列，其包括两个或更多个微针，每个微针包括高纵横比，至少基本上被导电层涂覆的聚合物三维衬底结构。
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公开(公告)号：US20080063866A1
公开(公告)日：2008-03-13
申请号：US11754680
申请日：2007-05-29
申请人： Mark Allen , Seong-O Choi , Jung-Hwan Park , Xiaosong Wu , Yanzhu Zhao , Yong-Kyu Yoon , Swaminathan Rajaraman
发明人： Mark Allen , Seong-O Choi , Jung-Hwan Park , Xiaosong Wu , Yanzhu Zhao , Yong-Kyu Yoon , Swaminathan Rajaraman
IPC分类号： B32B3/30
CPC分类号： B32B3/30 , A61B5/685 , A61B2562/125 , A61M37/0015 , A61M2037/0053 , A61N1/327 , C25D1/003 , C25D1/10 , C25D5/022 , H01B13/00 , H05K1/02 , H05K3/20 , H05K3/4007 , H05K2201/0367 , H05K2201/09045 , H05K2201/09118 , H05K2203/0113 , Y10T428/2958 , Y10T428/298
摘要： Methods are provided for fabricating three-dimensional electrically conductive structures. Three-dimensional electrically conductive microstructures are also provided. The method may include providing a mold having at least one microdepression which defines a three-dimensional structure; filling the microdepression of the mold with at least one substrate material; molding the at least one substrate material to form a substrate; and depositing and patterning of at least one electrically conductive layer either during the molding process or subsequent to the molding process to form an electrically conductive structure. In one embodiment, the three-dimensional electrically conductive microstructure comprises an electrically functional microneedle array comprising two or more microneedles, each including a high aspect ratio, polymeric three dimensional substrate structure which is at least substantially coated by an electrically conductive layer.
摘要翻译： 提供用于制造三维导电结构的方法。 还提供三维导电微结构。 该方法可以包括提供具有限定三维结构的至少一个微压缩的模具; 用至少一种基底材料填充模具的微压; 模制所述至少一种基底材料以形成基底; 以及在模制过程期间或在模制过程之后沉积和图案化至少一个导电层以形成导电结构。 在一个实施例中，三维导电微结构包括电功能微针阵列，其包括两个或更多个微针，每个微针包括高纵横比，至少基本上被导电层涂覆的聚合物三维衬底结构。
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5.发明申请APPARATUS AND METHODS FOR HIGH THROUGHPUT NETWORK ELECTROPHYSIOLOGY AND CELLULAR ANALYSIS 有权高通量网络电生理与细胞分析的装置与方法公开(公告)号：US20100120626A1
公开(公告)日：2010-05-13
申请号：US12615778
申请日：2009-11-10
CPC分类号： C12N13/00 , B32B2535/00 , C12M1/42 , G01N33/4836 , G01N33/48728 , G01N33/48735 , Y10T156/10
摘要： Provided herein are apparatus and methods relating to the development of instrumentation for high throughput network electrophysiology and cellular analysis. More specifically, provided herein are multiwell microelectrode arrays (MEAs) and methods for the development of such an apparatus in an inexpensive fashion with a flexible, ANSI/SBS-compliant (American National Standards Institute/Society for Biomolecular Screening) format. Microelectrode arrays are a grid of tightly spaced microelectrodes useful for stimulating and sensing electrically active cells, networks and tissue. The techniques described herein relate to the use of microfabrication in combination with certain large-area processes that have been employed to achieve multiwell MEAs in ANSI/SBS-compliant culture well formats, which are also transparent for inverted/backside microscopy compatibility. These multiwell MEAs can be used to investigate two and three-dimensional networks of electrically active cells and tissue such as cardiac, neural, and muscular in a high throughput fashion. Also being ANSI/SBS-compliant, they are compatible with machinery and robotics developed for the pharmaceutical industry for drug screening applications.
摘要翻译： 本文提供了与开发用于高通量网络电生理学和细胞分析的仪器相关的装置和方法。 更具体地，本文提供了多孔微电极阵列（MEA）和用于以便宜的方式开发这种装置的方法，其具有柔性的符合ANSI / SBS（美国国家标准学会/生物分子筛选学会）的格式。 微电极阵列是用于刺激和感测电活性细胞，网络和组织的紧密间隔的微电极的网格。 本文所述的技术涉及使用微加工与已经用于实现符合ANSI / SBS的培养孔格式的多孔MEA的某些大面积方法的组合，其对于倒置/背面显微镜兼容性也是透明的。 这些多孔MEA可用于以高通量方式研究电活性细胞和组织如心脏，神经和肌肉的两维和三维网络。 同样符合ANSI / SBS标准，它们与制药行业开发用于药物筛选应用的机械和机器人兼容。
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6.发明授权Apparatus and methods for high throughput network electrophysiology and cellular analysis 有权用于高通量网络电生理和细胞分析的装置和方法公开(公告)号：US09290756B2
公开(公告)日：2016-03-22
申请号：US12615778
申请日：2009-11-10
IPC分类号： G01N33/487 , C12N13/00 , C12M1/42 , G01N33/483
CPC分类号： C12N13/00 , B32B2535/00 , C12M1/42 , G01N33/4836 , G01N33/48728 , G01N33/48735 , Y10T156/10
摘要： Provided herein are apparatus and methods relating to the development of instrumentation for high throughput network electrophysiology and cellular analysis. More specifically, provided herein are multiwell microelectrode arrays (MEAs) and methods for the development of such an apparatus in an inexpensive fashion with a flexible, ANSI/SBS-compliant (American National Standards Institute/Society for Biomolecular Screening) format. Microelectrode arrays are a grid of tightly spaced microelectrodes useful for stimulating and sensing electrically active cells, networks and tissue. The techniques described herein relate to the use of microfabrication in combination with certain large-area processes that have been employed to achieve multiwell MEAs in ANSI/SBS-compliant culture well formats, which are also transparent for inverted/backside microscopy compatibility. These multiwell MEAs can be used to investigate two and three-dimensional networks of electrically active cells and tissue such as cardiac, neural, and muscular in a high throughput fashion. Also being ANSI/SBS-compliant, they are compatible with machinery and robotics developed for the pharmaceutical industry for drug screening applications.
摘要翻译： 本文提供了与开发用于高通量网络电生理学和细胞分析的仪器相关的装置和方法。 更具体地，本文提供了多孔微电极阵列（MEA）和用于以便宜的方式开发这种装置的方法，其具有柔性的符合ANSI / SBS（美国国家标准协会/生物分子筛选学会）的格式。 微电极阵列是用于刺激和感测电活性细胞，网络和组织的紧密间隔的微电极的网格。 本文所述的技术涉及使用微加工与已经用于实现符合ANSI / SBS的培养孔格式的多孔MEA的某些大面积方法的组合，其对于倒置/背面显微镜兼容性也是透明的。 这些多孔MEA可用于以高通量方式研究电活性细胞和组织如心脏，神经和肌肉的两维和三维网络。 同样符合ANSI / SBS标准，它们与制药行业开发用于药物筛选应用的机械和机器人兼容。
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