Led with substrate modifications for enhanced light extraction and method of making same
    3.
    发明申请
    Led with substrate modifications for enhanced light extraction and method of making same 有权
    带有基板修改以增强光提取及其制造方法

    公开(公告)号:US20090233394A1

    公开(公告)日:2009-09-17

    申请号:US12384277

    申请日:2009-04-01

    IPC分类号: H01L33/00 H01L21/3065

    摘要: The surface morphology of an LED light emitting surface is changed by applying a reactive ion etch (RIE) process to the light emitting surface. Etched features, such as truncated pyramids, may be formed on the emitting surface, prior to the RIE process, by cutting into the surface using a saw blade or a masked etching technique. Sidewall cuts may also be made in the emitting surface prior to the RIE process. A light absorbing damaged layer of material associated with saw cutting is removed by the RIE process. The surface morphology created by the RIE process may be emulated using different, various combinations of non-RIE processes such as grit sanding and deposition of a roughened layer of material or particles followed by dry etching.

    摘要翻译: 通过对发光表面施加反应离子蚀刻(RIE)工艺来改变LED发光表面的表面形态。 在RIE工艺之前,通过使用锯片或掩模蚀刻技术切割到表面中,可以在发射表面上形成蚀刻特征,例如截顶棱锥。 也可以在RIE工艺之前在发射表面制造侧壁切口。 通过RIE工艺去除与锯切相关的光吸收损伤的材料层。 RIE工艺产生的表面形态可以使用非RIE工艺的各种各样的组合来进行仿真,例如砂光砂磨和粗糙化的材料层或颗粒的沉积,随后进行干蚀刻。

    LED with substrate modifications for enhanced light extraction and method of making same
    5.
    发明授权
    LED with substrate modifications for enhanced light extraction and method of making same 有权
    LED具有基板修改以增强光提取及其制作方法

    公开(公告)号:US07534633B2

    公开(公告)日:2009-05-19

    申请号:US11083460

    申请日:2005-03-17

    IPC分类号: H01L21/00

    摘要: The surface morphology of an LED light emitting surface is changed by applying a reactive ion etch (RIE) process to the light emitting surface. Etched features, such as truncated pyramids, may be formed on the emitting surface, prior to the RIE process, by cutting into the surface using a saw blade or a masked etching technique. Sidewall cuts may also be made in the emitting surface prior to the RIE process. A light absorbing damaged layer of material associated with saw cutting is removed by the RIE process. The surface morphology created by the RIE process may be emulated using different, various combinations of non-RIE processes such as grit sanding and deposition of a roughened layer of material or particles followed by dry etching.

    摘要翻译: 通过对发光表面施加反应离子蚀刻(RIE)工艺来改变LED发光表面的表面形态。 在RIE工艺之前,通过使用锯片或掩模蚀刻技术切割到表面中,可以在发射表面上形成蚀刻特征,例如截顶棱锥。 也可以在RIE工艺之前在发射表面制造侧壁切口。 通过RIE工艺去除与锯切相关的光吸收损伤的材料层。 RIE工艺产生的表面形态可以使用非RIE工艺的各种各样的组合来进行仿真,例如砂光砂磨和粗糙化的材料层或颗粒的沉积,随后进行干蚀刻。

    Double flip semiconductor device and method for fabrication
    8.
    发明申请
    Double flip semiconductor device and method for fabrication 审中-公开
    双层半导体器件及其制造方法

    公开(公告)号:US20080197369A1

    公开(公告)日:2008-08-21

    申请号:US11708990

    申请日:2007-02-20

    IPC分类号: H01L33/00 H01L21/00

    摘要: A double flip-chip semiconductor device formed by a double flip fabrication process. Epitaxial layers are grown on a substrate in the normal fashion with the n-type layers grown first and the p-type layers grown subsequently. The chip is flipped a first time and mounted to a sacrificial layer. The original substrate is removed, exposing the n-type layer, and various additional layers and treatments are added to the device. Because the n-type layer is exposed during fabrication, the layer may be processed in various ways including adding a reflective element, texturing the surface or adding microstructures to the layer to improve light extraction. The chip is flipped a second time and mounted to a support element. The sacrificial layer is then removed and additional layers and treatment are added to the device. The finished device features a configuration in which the layers maintain the same orientation with respect to the support element that they had with the original substrate on which they were grown. Processing the n-type layers, rather than the p-type layers as in a single flip process, provides greater design flexibility when selecting features to add to the device. Thus, previously unavailable processes and reflective elements may be utilized, enhancing the external quantum efficiency of the device.

    摘要翻译: 通过双层翻转制造工艺形成的双倒装芯片半导体器件。 以正常方式在衬底上生长外延层,其中首先生长n型层,随后生长p型层。 芯片首次翻转并安装到牺牲层。 去除原始基底,暴露n型层,并将各种附加层和处理添加到该装置中。 因为n型层在制造过程中被曝光,所以该层可以以各种方式加工,包括添加反射元件,使表面纹理化或者向层中添加微结构以改善光提取。 芯片第二次翻转并安装在支撑元件上。 然后去除牺牲层,并向设备添加附加层和处理。 完成的装置具有这样的构造,其中层相对于它们与其生长在其上的原始基底所具有的支撑元件保持相同的取向。 在单次翻转过程中处理n型层而不是p型层,在选择要添加到设备中的特征时,提供更大的设计灵活性。 因此,可以利用先前不可用的处理和反射元件,增强器件的外部量子效率。

    Wire bond free wafer level LED
    9.
    发明申请
    Wire bond free wafer level LED 有权
    无接线晶圆级LED

    公开(公告)号:US20090121241A1

    公开(公告)日:2009-05-14

    申请号:US11985410

    申请日:2007-11-14

    IPC分类号: H01L33/00

    摘要: A wire-bond free semiconductor device with two electrodes both of which are accessible from the bottom side of the device. The device is fabricated with two electrodes that are electrically connected to the oppositely doped epitaxial layers, each of these electrodes having leads with bottom-side access points. This structure allows the device to be biased with an external voltage/current source, obviating the need for wire-bonds or other such connection mechanisms that must be formed at the packaging level. Thus, features that are traditionally added to the device at the packaging level (e.g., phosphor layers or encapsulants) may be included in the wafer level fabrication process. Additionally, the bottom-side electrodes are thick enough to provide primary structural support to the device, eliminating the need to leave the growth substrate as part of the finished device.

    摘要翻译: 具有两个电极的无引线键合半导体器件,两者均可从器件的底部接近。 该器件由与相对掺杂的外延层电连接的两个电极制成,这些电极中的每一个具有具有底侧接入点的引线。 这种结构允许器件被外部电压/电流源偏置,避免了在封装级别必须形成的引线接合或其他这样的连接机构的需要。 因此,传统上在包装级别添加到设备的特征(例如,磷光体层或密封剂)可以包括在晶片级制造工艺中。 此外,底侧电极足够厚以为器件提供主要的结构支撑,从而不需要将生长衬底作为成品器件的一部分。

    COMPOSITE HIGH REFLECTIVITY LAYER
    10.
    发明申请
    COMPOSITE HIGH REFLECTIVITY LAYER 有权
    复合高反射层

    公开(公告)号:US20120280263A1

    公开(公告)日:2012-11-08

    申请号:US13415626

    申请日:2012-03-08

    IPC分类号: H01L33/60 H01L33/48

    摘要: A high efficiency light emitting diode with a composite high reflectivity layer integral to said LED or package to improve emission efficiency. One embodiment of a light emitting diode (LED) chip comprises a LED and a composite high reflectivity layer integral to the LED to reflect light emitted from the active region. One embodiment of a LED package comprises a LED mounted on a substrate with an encapsulant over said LED and a composite high reflectivity layer arranged to reflect emitted light. The composite layer comprises a plurality of layers such that at least one of said plurality of layers has an index of refraction lower than the encapsulant and a reflective layer on a side of said plurality of layers opposite the LED. In some embodiments, conductive vias are included through the composite layer to allow an electrical signal to pass through the layer to the LED.

    摘要翻译: 一种具有与所述LED或封装集成的复合高反射层的高效率发光二极管,以提高发射效率。 发光二极管(LED)芯片的一个实施例包括LED和与LED成一体的复合高反射率层以反射从有源区域发射的光。 LED封装的一个实施例包括安装在具有在所述LED上的密封剂的衬底上的LED和布置成反射发射光的复合高反射率层。 复合层包括多个层,使得所述多个层中的至少一个层具有低于密封剂的折射率和在与LED相对的所述多个层的一侧上的反射层。 在一些实施例中,通过复合层包括导电通孔,以允许电信号通过该层到达LED。