摘要:
The surface morphology of an LED light emitting surface is changed by applying a reactive ion etch (RIE) process to the light emitting surface. Etched features, such as truncated pyramids, may be formed on the emitting surface, prior to the RIE process, by cutting into the surface using a saw blade or a masked etching technique. Sidewall cuts may also be made in the emitting surface prior to the RIE process. A light absorbing damaged layer of material associated with saw cutting is removed by the RIE process. The surface morphology created by the RIE process may be emulated using different, various combinations of non-RIE processes such as grit sanding and deposition of a roughened layer of material or particles followed by dry etching.
摘要:
The surface morphology of an LED light emitting surface is changed by applying processes, such as a reactive ion etch (RIE) process to the light emitting surface. In one embodiment, the changed surface morphology takes the form of a moth-eye surface. The surface morphology created by the RIE process may be emulated using different combinations of non-RIE processes such as grit sanding and deposition of a roughened layer of material or particles followed by dry etching.
摘要:
The surface morphology of an LED light emitting surface is changed by applying a reactive ion etch (RIE) process to the light emitting surface. Etched features, such as truncated pyramids, may be formed on the emitting surface, prior to the RIE process, by cutting into the surface using a saw blade or a masked etching technique. Sidewall cuts may also be made in the emitting surface prior to the RIE process. A light absorbing damaged layer of material associated with saw cutting is removed by the RIE process. The surface morphology created by the RIE process may be emulated using different, various combinations of non-RIE processes such as grit sanding and deposition of a roughened layer of material or particles followed by dry etching.
摘要:
The surface morphology of an LED light emitting surface is changed by applying processes, such as a reactive ion etch (RIE) process to the light emitting surface. In one embodiment, the changed surface morphology takes the form of a moth-eye surface. The surface morphology created by the RIE process may be emulated using different combinations of non-RIE processes such as grit sanding and deposition of a roughened layer of material or particles followed by dry etching.
摘要:
The surface morphology of an LED light emitting surface is changed by applying a reactive ion etch (RIE) process to the light emitting surface. Etched features, such as truncated pyramids, may be formed on the emitting surface, prior to the RIE process, by cutting into the surface using a saw blade or a masked etching technique. Sidewall cuts may also be made in the emitting surface prior to the RIE process. A light absorbing damaged layer of material associated with saw cutting is removed by the RIE process. The surface morphology created by the RIE process may be emulated using different, various combinations of non-RIE processes such as grit sanding and deposition of a roughened layer of material or particles followed by dry etching.
摘要:
The surface morphology of an LED light emitting surface is changed by applying a reactive ion etch (RIE) process to the light emitting surface. Etched features, such as truncated pyramids, may be formed on the emitting surface, prior to the RIE process, by cutting into the surface using a saw blade or a masked etching technique. Sidewall cuts may also be made in the emitting surface prior to the RIE process. A light absorbing damaged layer of material associated with saw cutting is removed by the RIE process. The surface morphology created by the RIE process may be emulated using different, various combinations of non-RIE processes such as grit sanding and deposition of a roughened layer of material or particles followed by dry etching.
摘要:
A wire-bond free semiconductor device with two electrodes both of which are accessible from the bottom side of the device. The device is fabricated with two electrodes that are electrically connected to the oppositely doped epitaxial layers, each of these electrodes having leads with bottom-side access points. This structure allows the device to be biased with an external voltage/current source, obviating the need for wire-bonds or other such connection mechanisms that must be formed at the packaging level. Thus, features that are traditionally added to the device at the packaging level (e.g., phosphor layers or encapsulants) may be included in the wafer level fabrication process. Additionally, the bottom-side electrodes are thick enough to provide primary structural support to the device, eliminating the need to leave the growth substrate as part of the finished device.
摘要:
A double flip-chip semiconductor device formed by a double flip fabrication process. Epitaxial layers are grown on a substrate in the normal fashion with the n-type layers grown first and the p-type layers grown subsequently. The chip is flipped a first time and mounted to a sacrificial layer. The original substrate is removed, exposing the n-type layer, and various additional layers and treatments are added to the device. Because the n-type layer is exposed during fabrication, the layer may be processed in various ways including adding a reflective element, texturing the surface or adding microstructures to the layer to improve light extraction. The chip is flipped a second time and mounted to a support element. The sacrificial layer is then removed and additional layers and treatment are added to the device. The finished device features a configuration in which the layers maintain the same orientation with respect to the support element that they had with the original substrate on which they were grown. Processing the n-type layers, rather than the p-type layers as in a single flip process, provides greater design flexibility when selecting features to add to the device. Thus, previously unavailable processes and reflective elements may be utilized, enhancing the external quantum efficiency of the device.
摘要:
A wire-bond free semiconductor device with two electrodes both of which are accessible from the bottom side of the device. The device is fabricated with two electrodes that are electrically connected to the oppositely doped epitaxial layers, each of these electrodes having leads with bottom-side access points. This structure allows the device to be biased with an external voltage/current source, obviating the need for wire-bonds or other such connection mechanisms that must be formed at the packaging level. Thus, features that are traditionally added to the device at the packaging level (e.g., phosphor layers or encapsulants) may be included in the wafer level fabrication process. Additionally, the bottom-side electrodes are thick enough to provide primary structural support to the device, eliminating the need to leave the growth substrate as part of the finished device.
摘要:
A high efficiency light emitting diode with a composite high reflectivity layer integral to said LED or package to improve emission efficiency. One embodiment of a light emitting diode (LED) chip comprises a LED and a composite high reflectivity layer integral to the LED to reflect light emitted from the active region. One embodiment of a LED package comprises a LED mounted on a substrate with an encapsulant over said LED and a composite high reflectivity layer arranged to reflect emitted light. The composite layer comprises a plurality of layers such that at least one of said plurality of layers has an index of refraction lower than the encapsulant and a reflective layer on a side of said plurality of layers opposite the LED. In some embodiments, conductive vias are included through the composite layer to allow an electrical signal to pass through the layer to the LED.