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公开(公告)号：US4176295A
公开(公告)日：1979-11-27
申请号：US915649
申请日：1978-06-15
申请人： Michael C. Driver , James G. Oakes , John R. Davis
发明人： Michael C. Driver , James G. Oakes , John R. Davis
摘要： A high peak power microwave generator is disclosed in which a plurality of transmission lines are connected to an output wave guide at predetermined intervals along the direction of propagation. Each transmission line is periodically charged, and this electromagnetic energy is released into the wave guide upon the actuation of a light activated silicon switch (LASS) diode connected to the transmission line. The LASS diodes are actuated simultaneously by a laser beam which traverses equal optical paths to each switch. The coincident switching of the transmission lines enables the power in each line to be additive in the wave guide, and much higher output pulses can be obtained. Further, the high speed switching capabilities afforded by the LASS diodes means that the resulting high power can be obtained at a much higher frequency.
摘要翻译： 公开了一种高峰值功率微波发生器，其中多个传输线沿着传播方向以预定间隔连接到输出波导。 每个传输线被周期性地充电，并且当连接到传输线的光激活硅开关（LASS）二极管的致动时，该电磁能被释放到波导中。 LASS二极管通过穿过每个开关相同光路的激光束同时启动。 传输线的重合切换使得每行中的功率在波导中是相加的，并且可以获得更高的输出脉冲。 此外，LASS二极管提供的高速切换功能意味着可以以更高的频率获得所得到的高功率。
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公开(公告)号：US4769883A
公开(公告)日：1988-09-13
申请号：US472529
申请日：1983-03-07
IPC分类号： G01R31/28 , H01L21/48 , H01L23/538 , H01L23/66 , H05K1/00 , H05K1/02 , H01G7/00 , G01R23/00 , H01F7/06 , H01P3/08 , H05K3/00
CPC分类号： H01L23/66 , G01R31/2822 , H01L21/485 , H01L23/5382 , H01L2224/45015 , H01L2224/45144 , H01L2224/49175 , H01L24/45 , H01L24/49 , H01L2924/00014 , H01L2924/01014 , H01L2924/01079 , H01L2924/12042 , H01L2924/14 , H01L2924/19041 , H01L2924/30107 , H01L2924/3011 , H05K1/0237 , H05K1/0286 , Y10T29/435 , Y10T29/49004 , Y10T29/4902 , Y10T29/49082 , Y10T29/49124 , Y10T29/49156
摘要： A method of tuning a microwave integrated circuit by trimming desired film-type circuit patterns included therein by a cold-pressure bonding technique is disclosed. More specifically, intercoupled circuit patterns are formed on a semi-insulating substrate with some circuit patterns having impedance characteristics of a desired nominal value. Each circuit pattern may comprise a plurality of conductive paths of malleable metal. Gaps are provided at appropriately chosen places in the conductive paths of predetermined circuit patterns. Selected ones of the gaps of the conductive paths are bridged to adjust the impedance characteristics of the associated predetermined circuit pattern by wiping with a probe the malleable metal of the conductive path at one end of the gap, across the gap to make contact with the malleable metal of the conductive path at the other end of the gap. The method further includes steps for in-situ testing of the integrated circuit by energizing the microwave integrated circuit to effect operation thereof; testing selected parameters of the energized microwave integrated circuit for determining the operational response thereof; and performing the step of bridging selected gaps of the energized microwave integrated circuit with a probe of insulating material to adjust the impedance characteristics thereof to render a desired measure response therefrom as determined by the testing step.
摘要翻译： 公开了一种通过利用冷压接技术修整所需的薄膜型电路图案来调谐微波集成电路的方法。 更具体地说，在具有阻抗特性为期望标称值的一些电路图案的半绝缘衬底上形成相互联系的电路图案。 每个电路图案可以包括多个可延展金属的导电路径。 在预定电路图案的导电路径中的适当选择的位置提供间隙。 桥接导电路径的间隙中的选定的间隙以通过用探针擦拭间隙的一端处的导电路径的可延展金属跨越间隙以与可延展的接触来调节相关联的预定电路图案的阻抗特性 导电路径的金属在间隙的另一端。 该方法还包括通过激励微波集成电路来实现集成电路的操作来现场测试集成电路的步骤; 测试通电微波集成电路的选定参数，以确定其运行响应; 以及通过绝缘材料的探针执行桥接所述通电的微波集成电路的选定间隙的步骤，以调整其阻抗特性，以便通过测试步骤确定所需的测量响应。
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3.发明授权Optimized circuits for three dimensional packaging and methods of manufacture therefore 有权因此，用于三维包装的优化电路和制造方法公开(公告)号：US07471146B2
公开(公告)日：2008-12-30
申请号：US11353930
申请日：2006-02-14
申请人： William Macropoulos , Greg Mendolia , James G. Oakes , Izz Khayo
发明人： William Macropoulos , Greg Mendolia , James G. Oakes , Izz Khayo
CPC分类号： H05K1/024 , H05K1/142 , H05K1/165 , H05K2201/0187 , H05K2201/09972
摘要： An embodiment of the present invention provides an apparatus, comprising an integrated circuit, wherein a first portion of the integrated circuit is placed on a top tier substrate and a second portion of the integrated circuit is placed on a bottom tier substrate stacked adjacent the top tier substrate and wherein the first portion and the second portion of the integrated circuit are interconnected; and printed spiral arms stacked vertically on both the top and bottom surface of the top tier substrate thereby creating high Q inductors.
摘要翻译： 本发明的实施例提供了一种包括集成电路的装置，其中集成电路的第一部分被放置在顶层基板上，并且集成电路的第二部分被放置在邻近顶层的堆叠层 衬底，并且其中集成电路的第一部分和第二部分互连; 并且印刷螺旋臂垂直堆叠在顶层基板的顶表面和底表面上，从而形成高Q电感器。
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公开(公告)号：US5646450A
公开(公告)日：1997-07-08
申请号：US594511
申请日：1996-01-31
IPC分类号： H01L23/482 , H01L23/66 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L23/4821 , H01L23/66 , H01L2924/0002
摘要： A semiconductor structure is described having a first electrode and a second electrode disposed on a surface of the structure and a bridging conductor connected between the first electrode and the second electrode. The bridging conductor includes a plurality of layers of different metals wherein the plurality of layers of different metals includes a layer of refractory metal adjacent a layer of electrically conductive metal. In a preferred embodiment, the refractory metal is titanium and the electrically conductive metal is gold. With such an arrangement, a semiconductor structure is provided which is effective in preventing restructuring due to mechanical stresses induced in the metal by dissimilar thermal expansion coefficients when electrical pulsing cycles the temperature of the semiconductor structure.
摘要翻译： 描述了半导体结构，其具有设置在该结构的表面上的第一电极和第二电极以及连接在第一电极和第二电极之间的桥接导体。 桥接导体包括多个不同金属的层，其中不同金属的多个层包括与导电金属层相邻的难熔金属层。 在优选的实施方案中，难熔金属是钛，导电金属是金。 通过这样的布置，提供半导体结构，其有效地防止了当电脉冲循环半导体结构的温度时，通过不同的热膨胀系数在金属中引起的机械应力来防止重构。
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