-
1.发明申请公开(公告)号：US20230117100A1
公开(公告)日：2023-04-20
申请号：US18083991
申请日：2022-12-19
Applicant: Micron Technology, Inc.
Inventor： Darwin A. Clampitt , Shawn D. Lyonsmith , Matthew J. King , Lise M. Clampitt , John Hopkins , Kevin Y. Titus , Indra V. Chary , Martin Jared Barclay , Anilkumar Chandolu , Pavithra Natarajan , Roger W. Lindsay
IPC: H10B43/27 , H01L23/528 , H10B43/10 , H01L23/522 , H01L21/02 , H10B51/20 , H01L21/67
Abstract: Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatuses includes a first deck located over a substrate, and a second deck located over the first deck, and pillars extending through the first and second decks. The first deck includes first memory cells, first control gates associated with the first memory cells, and first conductive paths coupled to the first control gates. The second conductive paths include second conductive pads located on a first level of the apparatus over the substrate. The second deck includes second memory cells, second control gates associated with the second memory cells, and second conductive paths coupled to the second control gates. The second conductive paths include second conductive pads located on a second level of the apparatus. The first and second conductive pads having lengths in a direction perpendicular to a direction from the first deck to the second deck.
-
2.发明授权公开(公告)号：US11532638B2
公开(公告)日：2022-12-20
申请号：US17008130
申请日：2020-08-31
Applicant: Micron Technology, Inc.
Inventor： Darwin A. Clampitt , Shawn D. Lyonsmith , Matthew J. King , Lisa M. Clampitt , John Hopkins , Kevin Y. Titus , Indra V. Chary , Martin Jared Barclay , Anilkumar Chandolu , Pavithra Natarajan , Roger W. Lindsay
IPC: H01L27/11582 , H01L23/528 , H01L27/11565 , H01L23/522 , H01L27/11597 , H01L21/02 , H01L21/67 , G11C16/04
Abstract: Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatuses includes a first deck located over a substrate, and a second deck located over the first deck, and pillars extending through the first and second decks. The first deck includes first memory cells, first control gates associated with the first memory cells, and first conductive paths coupled to the first control gates. The second conductive paths include second conductive pads located on a first level of the apparatus over the substrate. The second deck includes second memory cells, second control gates associated with the second memory cells, and second conductive paths coupled to the second control gates. The second conductive paths include second conductive pads located on a second level of the apparatus. The first and second conductive pads having lengths in a direction perpendicular to a direction from the first deck to the second deck.
-
3.发明申请公开(公告)号：US20230043786A1
公开(公告)日：2023-02-09
申请号：US17966594
申请日：2022-10-14
Applicant: Micron Technology, Inc.
Inventor： Darwin A. Clampitt , Roger W. Lindsay , Christopher R. Ritchie , Shawn D. Lyonsmith , Matthew J. King , Lisa M. Clampitt
IPC: H01L27/11582 , H01L23/528 , H01L23/522 , H01L27/11556 , H01L21/768 , H01L27/11565 , H01L21/311 , H01L21/02 , H01L27/11519 , H01L27/11524 , H01L27/1157 , H01L27/11575 , H01L27/11548 , G11C7/18
Abstract: Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatus includes a first conductive contact; a second conductive contact; levels of conductive materials stacked over one another and located over the first and second conductive contacts; levels of dielectric materials interleaved with the levels of the conductive materials, the levels of conductive materials and the levels of dielectric materials formed a stack of materials; a first conductive structure located on a first side of the stack of materials and contacting the first conductive contact and a first level of conductive material of the levels of conductive materials; and a second conductive structure located on a second side of the stack of materials and contacting the second conductive contact and a second level of conductive material of the levels of conductive materials.
-
公开(公告)号：US20210090246A1
公开(公告)日：2021-03-25
申请号：US17117222
申请日：2020-12-10
Applicant: Micron Technology, Inc.
Inventor： Amitava Majumdar , Qianlan Liu , Pradeep Ramachandran , Shawn D. Lyonsmith , Steve K. McCandless , Ted L. Taylor , Ahmed N. Noemaun , Gordon A. Haller
Abstract: A method of predicting virtual metrology data for a wafer lot that includes receiving first image data from an imager system, the first image data relating to at least one first wafer lot, receiving measured metrology data from metrology equipment relating to the at least one first wafer lot, applying one or more machine learning techniques to the first image data and the measured metrology data to generate at least one predictive model for predicting at least one of virtual metrology data or virtual cell metrics data of wafer lots, and utilizing the at least one generated predictive model to generate at least one of first virtual metrology data or first virtual cell metrics data for the first wafer lot.
-
公开(公告)号：US10672500B2
公开(公告)日：2020-06-02
申请号：US16419885
申请日：2019-05-22
Applicant: Micron Technology, Inc.
Inventor： Amitava Majumdar , Rajesh Kamana , Hongmei Wang , Shawn D. Lyonsmith , Ervin T. Hill , Zengtao T. Liu , Marlon W. Hug
Abstract: Methods, systems, and devices for non-contact measurement of memory cell threshold voltage, including at one or more intermediate stages of fabrication, are described. One access line may be grounded and coupled with one or more memory cells. Each of the one or more memory cells may be coupled with a corresponding floating access line. A floating access line may be scanned with an electron beam configured to set the floating access line to a particular surface voltage at the scanned bit line, and the threshold voltage of the corresponding memory cell may be determined based on whether setting the scanned bit line to the surface voltage causes a detectable amount current to flow through the corresponding memory cell.
-
Patent Agency Ranking
公开(公告)号：US11869178B2
公开(公告)日：2024-01-09
申请号：US17117222
申请日：2020-12-10
Applicant: Micron Technology, Inc.
Inventor： Amitava Majumdar , Qianlan Liu , Pradeep Ramachandran , Shawn D. Lyonsmith , Steve K. McCandless , Ted L. Taylor , Ahmed N. Noemaun , Gordon A. Haller
CPC classification number: G06T7/0004 , G01B1/00 , G01N21/211 , G01N21/4738 , G06F30/367 , G06N20/00 , G01B2210/56 , G06T2207/10024 , G06T2207/10152 , G06T2207/20081 , G06T2207/30148
Abstract: A method of predicting virtual metrology data for a wafer lot that includes receiving first image data from an imager system, the first image data relating to at least one first wafer lot, receiving measured metrology data from metrology equipment relating to the at least one first wafer lot, applying one or more machine learning techniques to the first image data and the measured metrology data to generate at least one predictive model for predicting at least one of virtual metrology data or virtual cell metrics data of wafer lots, and utilizing the at least one generated predictive model to generate at least one of first virtual metrology data or first virtual cell metrics data for the first wafer lot.
-
7.发明授权公开(公告)号：US11508746B2
公开(公告)日：2022-11-22
申请号：US16664280
申请日：2019-10-25
Applicant: Micron Technology, Inc.
Inventor： Darwin A. Clampitt , Roger W. Lindsay , Christopher R. Ritchie , Shawn D. Lyonsmith , Matthew J. King , Lisa M. Clampitt
IPC: H01L27/11582 , H01L23/528 , H01L23/522 , H01L27/11556 , H01L27/11565 , H01L27/11519 , H01L27/11524 , H01L27/1157 , H01L27/11575 , H01L27/11548 , G11C7/18 , H01L21/768 , H01L21/311 , H01L21/02
Abstract: Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatus includes a first conductive contact; a second conductive contact; levels of conductive materials stacked over one another and located over the first and second conductive contacts; levels of dielectric materials interleaved with the levels of the conductive materials, the levels of conductive materials and the levels of dielectric materials formed a stack of materials; a first conductive structure located on a first side of the stack of materials and contacting the first conductive contact and a first level of conductive material of the levels of conductive materials; and a second conductive structure located on a second side of the stack of materials and contacting the second conductive contact and a second level of conductive material of the levels of conductive materials.
-
8.发明申请公开(公告)号：US20220068956A1
公开(公告)日：2022-03-03
申请号：US17008130
申请日：2020-08-31
Applicant: Micron Technology, Inc.
Inventor： Darwin A. Clampitt , Shawn D. Lyonsmith , Matthew J. King , Lisa M. Clampitt , John Hopkins , Kevin Y. Titus , Indra V. Chary , Martin Jared Barclay , Anilkumar Chandolu , Pavithra Natarajan , Roger W. Lindsay
IPC: H01L27/11582 , H01L23/528 , H01L23/522 , H01L27/11565
Abstract: Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatuses includes a first deck located over a substrate, and a second deck located over the first deck, and pillars extending through the first and second decks. The first deck includes first memory cells, first control gates associated with the first memory cells, and first conductive paths coupled to the first control gates. The second conductive paths include second conductive pads located on a first level of the apparatus over the substrate. The second deck includes second memory cells, second control gates associated with the second memory cells, and second conductive paths coupled to the second control gates. The second conductive paths include second conductive pads located on a second level of the apparatus. The first and second conductive pads having lengths in a direction perpendicular to a direction from the first deck to the second deck.
-
公开(公告)号：US20190355418A1
公开(公告)日：2019-11-21
申请号：US16419895
申请日：2019-05-22
Applicant: Micron Technology, Inc.
Inventor： Amitava Majumdar , Rajesh Kamana , Hongmei Wang , Shawn D. Lyonsmith , Ervin T. Hill , Zengtao T. Liu , Marlon W. Hug
Abstract: Methods, systems, and devices for non-contact electron beam probing techniques, including at one or more intermediate stages of fabrication, are described. One subset of first access lines may be grounded and coupled with one or more memory cells. A second subset of first access lines may be floating and coupled with one or more memory cells. A second access line may correspond to each first access line and may be configured to be coupled with the corresponding first access line, by way of one or more corresponding memory cells, when scanned with an electron beam. A leakage path may be determined by comparing an optical pattern generated in part by determining a brightness of each scanned access line and comparing the generated optical pattern with a second optical pattern.
-
公开(公告)号：US20210126007A1
公开(公告)日：2021-04-29
申请号：US16664280
申请日：2019-10-25
Applicant: Micron Technology, Inc.
Inventor： Darwin A. Clampitt , Roger W. Lindsay , Christopher R. Ritchie , Shawn D. Lyonsmith , Matthew J. King , Lisa M. Clampitt
IPC: H01L27/11582 , H01L23/528 , H01L23/522 , H01L27/11556 , H01L21/768 , H01L21/311 , H01L21/02 , H01L27/11519 , H01L27/11565
Abstract: Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatus includes a first conductive contact; a second conductive contact; levels of conductive materials stacked over one another and located over the first and second conductive contacts; levels of dielectric materials interleaved with the levels of the conductive materials, the levels of conductive materials and the levels of dielectric materials formed a stack of materials; a first conductive structure located on a first side of the stack of materials and contacting the first conductive contact and a first level of conductive material of the levels of conductive materials; and a second conductive structure located on a second side of the stack of materials and contacting the second conductive contact and a second level of conductive material of the levels of conductive materials.
-
-
-
-
-
-
-
-
-
Search Results
18
records
(took 0.026 seconds)
