公开(公告)号：US11889683B2

公开(公告)日：2024-01-30

申请号：US16918129

申请日：2020-07-01

Applicant: Micron Technology, Inc.

Inventor： John D. Hopkins ,  Darwin A. Clampitt ,  Michael J. Puett ,  Christopher R. Ritchie

IPC: H10B41/27 ,  H01L23/522 ,  H10B43/27 ,  H10B43/10 ,  H10B41/10 ,  H10B43/35

CPC classification number: H10B41/27 ,  H01L23/5226 ,  H10B41/10 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35

Abstract: A method used in forming a memory array comprising strings of memory cells comprises forming a stack comprising vertically-alternating first tiers and second tiers. A channel-material string is in individual channel openings in the vertically-alternating first tiers and second tiers. A conductor-material contact is in the individual channel openings directly against the channel material of individual of the channel-material strings. The conductor-material contacts are vertically recessed in the individual channel openings. A conductive via is formed in the individual channel openings directly against the vertically-recessed conductor-material contact in that individual channel opening. Other aspects, including structure independent of method, are disclosed.

公开(公告)号：US11508746B2

公开(公告)日：2022-11-22

申请号：US16664280

申请日：2019-10-25

Applicant: Micron Technology, Inc.

Inventor： Darwin A. Clampitt ,  Roger W. Lindsay ,  Christopher R. Ritchie ,  Shawn D. Lyonsmith ,  Matthew J. King ,  Lisa M. Clampitt

IPC: H01L27/11582 ,  H01L23/528 ,  H01L23/522 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/1157 ,  H01L27/11575 ,  H01L27/11548 ,  G11C7/18 ,  H01L21/768 ,  H01L21/311 ,  H01L21/02

Abstract: Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatus includes a first conductive contact; a second conductive contact; levels of conductive materials stacked over one another and located over the first and second conductive contacts; levels of dielectric materials interleaved with the levels of the conductive materials, the levels of conductive materials and the levels of dielectric materials formed a stack of materials; a first conductive structure located on a first side of the stack of materials and contacting the first conductive contact and a first level of conductive material of the levels of conductive materials; and a second conductive structure located on a second side of the stack of materials and contacting the second conductive contact and a second level of conductive material of the levels of conductive materials.

公开(公告)号：US20210272845A1

公开(公告)日：2021-09-02

申请号：US17320863

申请日：2021-05-14

Applicant: Micron Technology, Inc.

Inventor： Anilkumar Chandolu ,  Christopher R. Ritchie ,  Darwin A. Clampitt ,  S M Istiaque Hossain

IPC: H01L21/768 ,  H01L27/11582 ,  H01L27/11556

Abstract: A method of forming a microelectronic device comprises forming a stack structure comprising vertically alternating insulating structures and additional insulating structures arranged in tiers. Each of the tiers individually comprises one of the insulating structures and one of the additional insulating structures. A first trench is formed to partially vertically extend through the stack structure. The first trench comprises a first portion having a first width, and a second portion at a horizontal boundary of the first portion and having a second width greater than the first width. A dielectric structure is formed within the first trench. The dielectric structure comprises a substantially void-free section proximate the horizontal boundary of the first portion of the trench. Microelectronic devices and electronic systems are also described.

公开(公告)号：US20210126007A1

公开(公告)日：2021-04-29

申请号：US16664280

申请日：2019-10-25

Applicant: Micron Technology, Inc.

Inventor： Darwin A. Clampitt ,  Roger W. Lindsay ,  Christopher R. Ritchie ,  Shawn D. Lyonsmith ,  Matthew J. King ,  Lisa M. Clampitt

IPC: H01L27/11582 ,  H01L23/528 ,  H01L23/522 ,  H01L27/11556 ,  H01L21/768 ,  H01L21/311 ,  H01L21/02 ,  H01L27/11519 ,  H01L27/11565

Abstract: Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatus includes a first conductive contact; a second conductive contact; levels of conductive materials stacked over one another and located over the first and second conductive contacts; levels of dielectric materials interleaved with the levels of the conductive materials, the levels of conductive materials and the levels of dielectric materials formed a stack of materials; a first conductive structure located on a first side of the stack of materials and contacting the first conductive contact and a first level of conductive material of the levels of conductive materials; and a second conductive structure located on a second side of the stack of materials and contacting the second conductive contact and a second level of conductive material of the levels of conductive materials.

公开(公告)号：US11521897B2

公开(公告)日：2022-12-06

申请号：US17320863

申请日：2021-05-14

Applicant: Micron Technology, Inc.

Inventor： Anilkumar Chandolu ,  Christopher R. Ritchie ,  Darwin A. Clampitt ,  S M Istiaque Hossain

IPC: H01L21/76 ,  H01L21/768 ,  H01L27/11582 ,  H01L27/11556

Abstract: A method of forming a microelectronic device comprises forming a stack structure comprising vertically alternating insulating structures and additional insulating structures arranged in tiers. Each of the tiers individually comprises one of the insulating structures and one of the additional insulating structures. A first trench is formed to partially vertically extend through the stack structure. The first trench comprises a first portion having a first width, and a second portion at a horizontal boundary of the first portion and having a second width greater than the first width. A dielectric structure is formed within the first trench. The dielectric structure comprises a substantially void-free section proximate the horizontal boundary of the first portion of the trench. Microelectronic devices and electronic systems are also described.

公开(公告)号：US20220005817A1

公开(公告)日：2022-01-06

申请号：US16918129

申请日：2020-07-01

Applicant: Micron Technology, Inc.

Inventor： John D. Hopkins ,  Darwin A. Clampitt ,  Michael J. Puett ,  Christopher R. Ritchie

IPC: H01L27/11556 ,  H01L23/522 ,  H01L27/11582

Abstract: A method used in forming a memory array comprising strings of memory cells comprises forming a stack comprising vertically-alternating first tiers and second tiers. A channel-material string is in individual channel openings in the vertically-alternating first tiers and second tiers. A conductor-material contact is in the individual channel openings directly against the channel material of individual of the channel-material strings. The conductor-material contacts are vertically recessed in the individual channel openings. A conductive via is formed in the individual channel openings directly against the vertically-recessed conductor-material contact in that individual channel opening. Other aspects, including structure independent of method, are disclosed.

公开(公告)号：US11043412B2

公开(公告)日：2021-06-22

申请号：US16532035

申请日：2019-08-05

Applicant: Micron Technology, Inc.

Inventor： Anilkumar Chandolu ,  Christopher R. Ritchie ,  Darwin A. Clampitt ,  S M Istiaque Hossain

IPC: H01L21/76 ,  H01L27/11 ,  H01L21/768 ,  H01L27/11582 ,  H01L27/11556

Abstract: A method of forming a microelectronic device comprises forming a stack structure comprising vertically alternating insulating structures and additional insulating structures arranged in tiers. Each of the tiers individually comprises one of the insulating structures and one of the additional insulating structures. A first trench is formed to partially vertically extend through the stack structure. The first trench comprises a first portion having a first width, and a second portion at a horizontal boundary of the first portion and having a second width greater than the first width. A dielectric structure is formed within the first trench. The dielectric structure comprises a substantially void-free section proximate the horizontal boundary of the first portion of the trench. Microelectronic devices and electronic systems are also described.

公开(公告)号：US20240138145A1

公开(公告)日：2024-04-25

申请号：US18397059

申请日：2023-12-27

Applicant: Micron Technology, Inc.

Inventor： John D. Hopkins ,  Darwin A. Clampitt ,  Michael J. Puett ,  Christopher R. Ritchie

IPC: H10B41/27 ,  H01L23/522 ,  H10B41/10 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35

CPC classification number: H10B41/27 ,  H01L23/5226 ,  H10B41/10 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35

Abstract: A method used in forming a memory array comprising strings of memory cells comprises forming a stack comprising vertically-alternating first tiers and second tiers. A channel-material string is in individual channel openings in the vertically-alternating first tiers and second tiers. A conductor-material contact is in the individual channel openings directly against the channel material of individual of the channel-material strings. The conductor-material contacts are vertically recessed in the individual channel openings. A conductive via is formed in the individual channel openings directly against the vertically-recessed conductor-material contact in that individual channel opening. Other aspects, including structure independent of method, are disclosed.

公开(公告)号：US20230397424A1

公开(公告)日：2023-12-07

申请号：US18324084

申请日：2023-05-25

Applicant: Micron Technology, Inc.

Inventor： Jordan D. Greenlee ,  Everett A. McTeer ,  Rita J. Klein ,  John D. Hopkins ,  Nancy M. Lomeli ,  Xiao Li ,  Christopher R. Ritchie ,  Alyssa N. Scarbrough ,  Jiewei Chen ,  Sijia Yu ,  Naiming Liu

IPC: H10B43/27 ,  H10B41/27

CPC classification number: H10B43/27 ,  H10B41/27

Abstract: A microelectronic device comprises a stack structure, a memory pillar, and a boron-containing material. The stack structure comprises alternating conductive structures and dielectric structures. The memory pillar extends through the stack structure and defines memory cells at intersections of the memory pillar and the conductive structures. The boron-containing material is on at least a portion of the conductive structures of the stack structure. Related methods and electronic systems are also described.

公开(公告)号：US20230043786A1

公开(公告)日：2023-02-09

申请号：US17966594

申请日：2022-10-14

Applicant: Micron Technology, Inc.

Inventor： Darwin A. Clampitt ,  Roger W. Lindsay ,  Christopher R. Ritchie ,  Shawn D. Lyonsmith ,  Matthew J. King ,  Lisa M. Clampitt

IPC: H01L27/11582 ,  H01L23/528 ,  H01L23/522 ,  H01L27/11556 ,  H01L21/768 ,  H01L27/11565 ,  H01L21/311 ,  H01L21/02 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/1157 ,  H01L27/11575 ,  H01L27/11548 ,  G11C7/18

Abstract: Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatus includes a first conductive contact; a second conductive contact; levels of conductive materials stacked over one another and located over the first and second conductive contacts; levels of dielectric materials interleaved with the levels of the conductive materials, the levels of conductive materials and the levels of dielectric materials formed a stack of materials; a first conductive structure located on a first side of the stack of materials and contacting the first conductive contact and a first level of conductive material of the levels of conductive materials; and a second conductive structure located on a second side of the stack of materials and contacting the second conductive contact and a second level of conductive material of the levels of conductive materials.