公开(公告)号：US20240373636A1

公开(公告)日：2024-11-07

申请号：US18621738

申请日：2024-03-29

Applicant: Micron Technology, Inc.

Inventor： Matthew J. King ,  David H. Wells ,  Yiping Wang ,  Mojtaba Asadirad ,  Harsh Narendrakumar Jain

IPC: H10B43/27 ,  H10B41/27

Abstract: A method of forming a microelectronic device comprises forming a preliminary stack structure over a source structure. The preliminary stack structure comprises a vertically alternating sequence of insulative material and sacrificial material arranged in preliminary tiers. The method comprises forming a staircase structure having steps comprising edges of at least some of the preliminary tiers of the preliminary stack structure, forming implant regions within exposed portions of the sacrificial material at the steps of the staircase structure, forming openings extending through the preliminary stack structure to the source structure and within a horizontal area of the staircase structure, replacing portions of the sacrificial material with conductive structures, forming strapping structures comprising conductive material, at locations vacated by the implant regions, laterally adjacent to the conductive structures at the steps of the staircase structure, and forming conductive contacts within the openings. Additional methods and microelectronic devices are also described.

公开(公告)号：US20210005626A1

公开(公告)日：2021-01-07

申请号：US16983664

申请日：2020-08-03

Applicant: Micron Technology, Inc.

Inventor： Akira Goda ,  Haitao Liu ,  Jin Chen ,  Guangyu Huang ,  Mojtaba Asadirad

IPC: H01L27/11573 ,  G11C16/08 ,  G11C16/24 ,  H01L21/02 ,  H01L23/528 ,  H01L23/532 ,  H01L27/11526 ,  H01L27/11556 ,  H01L27/11582 ,  H01L29/04 ,  H01L29/16 ,  H01L29/36 ,  H01L29/66 ,  H01L29/78 ,  G11C16/04

Abstract: Some embodiments include apparatuses, and methods of forming the apparatuses. Some of the apparatuses include a first group of conductive materials interleaved with a first group of dielectric materials, a pillar extending through the conductive materials and the dielectric materials, memory cells located along the first pillar, a conductive contact coupled to a conductive material of the first group of conductive materials, and additional pillars extending through a second group of conductive materials and a second group of dielectric materials. The second pillar includes a first portion coupled to a conductive region, a second portion, a third portion, and a fourth portion coupled to the conductive contact. The second portion is located between the first and third portions. The second portion of each of the additional pillars is part of a piece of material extending from a first pillar to a second pillar of the additional pillars.

公开(公告)号：US20210151464A1

公开(公告)日：2021-05-20

申请号：US17140494

申请日：2021-01-04

Applicant: Micron Technology, Inc.

Inventor： Albert Fayrushin ,  Haitao Liu ,  Mojtaba Asadirad

IPC: H01L27/11582 ,  H01L29/10 ,  H01L23/522 ,  H01L23/528 ,  H01L21/02 ,  H01L21/768 ,  H01L23/532

Abstract: A semiconductor device comprises a stack comprising an alternating sequence of dielectric structures and conductive structures, and a channel structure within an opening vertically extending through the stack and comprising a first semiconductor material having a first band gap. The semiconductor device also comprises a conductive plug structure within the opening and in direct contact with the channel region, and a band offset structure within the opening and in direct physical contact with the channel structure and the conductive plug structure. The band offset structure comprises a second semiconductor material having a second band gap different than the first band gap. The semiconductor device further comprises a conductive line structure electrically coupled to the conductive plug structure. A method of forming a semiconductor device and an electronic system are also described.

公开(公告)号：US10923493B2

公开(公告)日：2021-02-16

申请号：US16123538

申请日：2018-09-06

Applicant: Micron Technology, Inc.

Inventor： Albert Fayrushin ,  Haitao Liu ,  Mojtaba Asadirad

IPC: H01L27/11582 ,  H01L29/10 ,  H01L23/522 ,  H01L23/528 ,  H01L21/02 ,  H01L21/768 ,  H01L23/532 ,  G11C16/04 ,  G11C16/10 ,  G11C16/26 ,  G11C16/14

Abstract: A semiconductor device comprises a stack comprising an alternating sequence of dielectric structures and conductive structures, and a channel structure within an opening vertically extending through the stack and comprising a first semiconductor material having a first band gap. The semiconductor device also comprises a conductive plug structure within the opening and in direct contact with the channel region, and a band offset structure within the opening and in direct physical contact with the channel structure and the conductive plug structure. The band offset structure comprises a second semiconductor material having a second band gap different than the first band gap. The semiconductor device further comprises a conductive line structure electrically coupled to the conductive plug structure. A method of forming a semiconductor device and an electronic system are also described.

公开(公告)号：US20240071905A1

公开(公告)日：2024-02-29

申请号：US17898107

申请日：2022-08-29

Applicant: Micron Technology, Inc.

Inventor： Martin J. Barclay ,  Mojtaba Asadirad ,  Yiping Wang ,  Matthew Holland ,  Mohad Baboli

IPC: H01L23/522 ,  H01L21/768

CPC classification number: H01L23/5226 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/76877 ,  H01L27/11582

Abstract: A microelectronic device comprises a stack structure, a staircase structure, a first liner material, an etch stop structure, and conductive contact structures. The stack structure includes conductive structures and insulative structures arranged in tiers. The stack structure includes sidewalls horizontally bounding the staircase structure. The staircase structure has steps includes edges of tiers of the stack structure. The first liner material is on the steps and the sidewalls and includes horizontally extending portions on the steps and vertically extending portions on the sidewalls. The etch stop structure is on the horizontally extending portions of the first liner material, the vertically extending portions of the first liner material being free of the etch stop structure. The conductive contact structures extend through the etch stop structure and the first liner material and to the conductive structures. Memory devices, electronic systems, and methods of forming microelectronic devices are also described.

公开(公告)号：US11778824B2

公开(公告)日：2023-10-03

申请号：US17140494

申请日：2021-01-04

Applicant: Micron Technology, Inc.

Inventor： Albert Fayrushin ,  Haitao Liu ,  Mojtaba Asadirad

IPC: H10B43/27 ,  H01L29/10 ,  H01L23/522 ,  H01L23/528 ,  H01L21/02 ,  H01L21/768 ,  H01L23/532 ,  G11C16/04 ,  G11C16/10 ,  G11C16/26 ,  G11C16/14

CPC classification number: H10B43/27 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/76877 ,  H01L23/528 ,  H01L23/5226 ,  H01L23/53271 ,  H01L29/1037 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/14 ,  G11C16/26 ,  H01L21/0262 ,  H01L21/02546

Abstract: A semiconductor device comprises a stack comprising an alternating sequence of dielectric structures and conductive structures, and a channel structure within an opening vertically extending through the stack and comprising a first semiconductor material having a first band gap. The semiconductor device also comprises a conductive plug structure within the opening and in direct contact with the channel region, and a band offset structure within the opening and in direct physical contact with the channel structure and the conductive plug structure. The band offset structure comprises a second semiconductor material having a second band gap different than the first band gap. The semiconductor device further comprises a conductive line structure electrically coupled to the conductive plug structure. A method of forming a semiconductor device and an electronic system are also described.

公开(公告)号：US10734399B2

公开(公告)日：2020-08-04

申请号：US15858509

申请日：2017-12-29

Applicant: Micron Technology, Inc.

Inventor： Akira Goda ,  Haitao Liu ,  Jin Chen ,  Guangyu Huang ,  Mojtaba Asadirad

IPC: H01L27/11573 ,  H01L27/11582 ,  H01L27/11578 ,  H01L27/11556 ,  H01L27/11551 ,  H01L27/11526 ,  G11C16/26 ,  G11C16/24 ,  G11C16/14 ,  G11C16/10 ,  H01L23/528 ,  H01L29/36 ,  H01L29/04 ,  H01L21/02 ,  H01L29/78 ,  H01L29/66 ,  H01L29/16 ,  H01L23/532 ,  G11C16/08 ,  G11C16/04 ,  H01L29/08

Abstract: Some embodiments include apparatuses, and methods of forming the apparatuses. Some of the apparatuses include a first group of conductive materials interleaved with a first group of dielectric materials, a pillar extending through the conductive materials and the dielectric materials, memory cells located along the first pillar, a conductive contact coupled to a conductive material of the first group of conductive materials, and additional pillars extending through a second group of conductive materials and a second group of dielectric materials. The second pillar includes a first portion coupled to a conductive region, a second portion, a third portion, and a fourth portion coupled to the conductive contact. The second portion is located between the first and third portions. The second portion of each of the additional pillars is part of a piece of material extending from a first pillar to a second pillar of the additional pillars.

公开(公告)号：US20200083245A1

公开(公告)日：2020-03-12

申请号：US16123538

申请日：2018-09-06

Applicant: Micron Technology, Inc.

Inventor： Albert Fayrushin ,  Haitao Liu ,  Mojtaba Asadirad

IPC: H01L27/11582 ,  H01L29/10 ,  H01L23/522 ,  H01L23/528 ,  H01L21/02 ,  H01L21/768 ,  H01L23/532

Abstract: A semiconductor device comprises a stack comprising an alternating sequence of dielectric structures and conductive structures, and a channel structure within an opening vertically extending through the stack and comprising a first semiconductor material having a first band gap. The semiconductor device also comprises a conductive plug structure within the opening and in direct contact with the channel region, and a band offset structure within the opening and in direct physical contact with the channel structure and the conductive plug structure. The band offset structure comprises a second semiconductor material having a second band gap different than the first band gap. The semiconductor device further comprises a conductive line structure electrically coupled to the conductive plug structure. A method of forming a semiconductor device and an electronic system are also described.

公开(公告)号：US20240251552A1

公开(公告)日：2024-07-25

申请号：US18417709

申请日：2024-01-19

Applicant: Micron Technology, Inc.

Inventor： Mojtaba Asadirad ,  Yiping Wang ,  David H. Wells ,  Matt J. King

IPC: H10B43/27 ,  H10B41/27

CPC classification number: H10B43/27 ,  H10B41/27

Abstract: Methods, systems, and devices for NAND staircase landing pads conversion are described. A memory device may include one or more lateral word line contacts that may couple a word line with a conductive pillar that traverses a stack of materials of the memory device. The use of the lateral word line contact may allow for a conductive pillar to be coupled with a target word line without requiring an end of the conductive pillar to be placed directly on the word line. Additionally, the memory architecture described herein may allow for the target word line to be coupled with CMOS circuitry via a first conductive pillar without the use of a second conductive pillar, as the first conductive pillar may traverse the stack of materials and be coupled with the CMOS circuitry. Therefore, total quantity of conductive pillars may be reduced, and the risk of manufacturing errors may be lowered.