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公开(公告)号：US09213603B2
公开(公告)日：2015-12-15
申请号：US14456559
申请日：2014-08-11
Applicant: Micron Technology, Inc.
Inventor： Federico Tiziani , Giovanni Campardo , Massimo Iaculo , Claudio Giaccio , Manuela Scognamiglio , Danilo Caraccio , Ornella Vitale , Antonino Pollio
CPC classification number: G06F3/0625 , G06F1/3275 , G06F3/0634 , G06F3/0659 , G06F3/0679 , G06F11/10 , G06F11/1044 , G06F11/1068 , G06F11/1072 , G06F12/0246 , G06F13/1668 , G11C29/52 , Y02D10/14
Abstract: In various embodiments, a single virtualized error correcting code (ECC) NAND controller executes an ECC algorithm and manages a stack of NAND flash memories. The virtualized ECC NAND controller allows the host processor to drive the stack of flash memory devices as a single NAND chip while the controller redirects the data to the selected NAND memory device in the stack. In various embodiments, a controller manages a plurality of NAND memory devices. The controller provides power to a select one of the plurality of NAND memory devices at a time to conserve overall power consumption of the storage system.
Abstract translation: 在各种实施例中，单个虚拟化纠错码（ECC）NAND控制器执行ECC算法并管理NAND闪存堆栈。 虚拟化ECC NAND控制器允许主机处理器作为单个NAND芯片驱动闪存器件堆叠，同时控制器将数据重定向到堆栈中选择的NAND存储器件。 在各种实施例中，控制器管理多个NAND存储器件。 控制器一次为多个NAND存储器件中的一个选择一个供电，以节省存储系统的整体功耗。
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公开(公告)号：US20160098223A1
公开(公告)日：2016-04-07
申请号：US14967934
申请日：2015-12-14
Applicant: Micron Technology, Inc.
Inventor： Federico Tiziani , Giovanni Campardo , Massimo Iaculo , Claudio Giaccio , Manuela Scognamiglio , Danilo Caraccio , Ornella Vitale , Antonino Pollio
CPC classification number: G06F3/0625 , G06F1/3275 , G06F3/0634 , G06F3/0659 , G06F3/0679 , G06F11/10 , G06F11/1044 , G06F11/1068 , G06F11/1072 , G06F12/0246 , G06F13/1668 , G11C29/52 , Y02D10/14
Abstract: A single virtualized ECC NAND controller executes an ECC algorithm and manages a stack of NAND flash memories. The virtualized ECC NAND controller allows the host processor to drive the stack of flash memory devices as a single NAND chip while the controller redirects the data to the selected NAND memory device in the stack.
Abstract translation: 单个虚拟化ECC NAND控制器执行ECC算法并管理NAND闪存堆栈。 虚拟化ECC NAND控制器允许主机处理器作为单个NAND芯片驱动闪存器件堆叠，同时控制器将数据重定向到堆栈中选择的NAND存储器件。
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公开(公告)号：US20140351675A1
公开(公告)日：2014-11-27
申请号：US14456559
申请日：2014-08-11
Applicant: Micron Technology, Inc.
Inventor： Federico Tiziani , Giovanni Campardo , Massimo Iaculo , Claudio Giaccio , Manuela Scognamiglio , Danilo Caraccio , Ornella Vitale , Antonino Pollio
CPC classification number: G06F3/0625 , G06F1/3275 , G06F3/0634 , G06F3/0659 , G06F3/0679 , G06F11/10 , G06F11/1044 , G06F11/1068 , G06F11/1072 , G06F12/0246 , G06F13/1668 , G11C29/52 , Y02D10/14
Abstract: In various embodiments, a single virtualized error correcting code (ECC) NAND controller executes an ECC algorithm and manages a stack of NAND flash memories. The virtualized ECC NAND controller allows the host processor to drive the stack of flash memory devices as a single NAND chip while the controller redirects the data to the selected NAND memory device in the stack. In various embodiments, a controller manages a plurality of NAND memory devices. The controller provides power to a select one of the plurality of NAND memory devices at a time to conserve overall power consumption of the storage system.
Abstract translation: 在各种实施例中，单个虚拟化纠错码（ECC）NAND控制器执行ECC算法并管理NAND闪存堆栈。 虚拟化ECC NAND控制器允许主机处理器作为单个NAND芯片驱动闪存器件堆叠，同时控制器将数据重定向到堆栈中选择的NAND存储器件。 在各种实施例中，控制器管理多个NAND存储器件。 控制器一次为多个NAND存储器件中的一个选择一个供电，以节省存储系统的整体功耗。
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Patent Agency Ranking
公开(公告)号：US20140351493A1
公开(公告)日：2014-11-27
申请号：US14350558
申请日：2014-04-08
Applicant: Micron Technology, Inc.
Inventor： Massimo Iaculo , Ornella Vitale , Antonino Pollio
IPC: G06F12/02
CPC classification number: G06F12/0246 , G06F2212/7211 , G11C16/349
Abstract: In accordance with some embodiments, wear leveling may be done based on the difference in age of discarded blocks and engaged blocks. Data is moved to an older discarded block from a younger engaged block. Two wear leveling bits may be used for each logical block, such that the wear leveling bits are used in alternating cycles.
Abstract translation: 根据一些实施例，可以基于废弃块和接合块的年龄差异来进行磨损平衡。 数据从较年轻的被动块移动到较旧的废弃块。 每个逻辑块可以使用两个损耗均衡位，使得在交替周期中使用损耗均衡比特。
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公开(公告)号：US09971536B2
公开(公告)日：2018-05-15
申请号：US15431457
申请日：2017-02-13
Applicant: Micron Technology, Inc.
Inventor： Federico Tiziani , Giovanni Campardo , Massimo Iaculo , Claudio Giaccio , Manuela Scognamiglio , Danilo Caraccio , Ornella Vitale , Antonino Pollio
CPC classification number: G06F3/0625 , G06F1/3275 , G06F3/0634 , G06F3/0659 , G06F3/0679 , G06F11/10 , G06F11/1044 , G06F11/1068 , G06F11/1072 , G06F12/0246 , G06F13/1668 , G11C29/52 , Y02D10/14
Abstract: Various embodiments disclose a controller to manage memory devices. In an exemplary method, signals are exchanged with a host processor to allow the host processor to communicate with multiple memory devices in a memory stack as a single device, regardless of an actual number of memory devices within the memory stack. Power is provided to a single one of the multiple memory devices in the memory stack at a time to reduce power consumption. Other methods, apparatuses, and devices are also disclosed.
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公开(公告)号：US20170160973A1
公开(公告)日：2017-06-08
申请号：US15431457
申请日：2017-02-13
Applicant: Micron Technology, Inc.
Inventor： Federico Tiziani , Giovanni Campardo , Massimo Iaculo , Claudio Giaccio , Manuela Scognamiglio , Danilo Caraccio , Ornella Vitale , Antonino Pollio
CPC classification number: G06F3/0625 , G06F1/3275 , G06F3/0634 , G06F3/0659 , G06F3/0679 , G06F11/10 , G06F11/1044 , G06F11/1068 , G06F11/1072 , G06F12/0246 , G06F13/1668 , G11C29/52 , Y02D10/14
Abstract: A single virtualized ECC NAND controller executes an ECC algorithm and manages a stack of NAND flash memories. The virtualized ECC NAND controller allows the host processor to drive the stack of flash memory devices as a single NAND chip while the controller redirects the data to the selected NAND memory device in the stack.
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公开(公告)号：US09569129B2
公开(公告)日：2017-02-14
申请号：US14967934
申请日：2015-12-14
Applicant: Micron Technology, Inc.
Inventor： Federico Tiziani , Giovanni Campardo , Massimo Iaculo , Claudio Giaccio , Manuela Scognamiglio , Danilo Caraccio , Ornella Vitale , Antonino Pollio
CPC classification number: G06F3/0625 , G06F1/3275 , G06F3/0634 , G06F3/0659 , G06F3/0679 , G06F11/10 , G06F11/1044 , G06F11/1068 , G06F11/1072 , G06F12/0246 , G06F13/1668 , G11C29/52 , Y02D10/14
Abstract: Various embodiments disclose a controller to manage memory devices. In an exemplary method, signals are exchanged with a host processor to allow the host processor to communicate with a plurality of memory devices in a memory stack as a single device, regardless of an actual number of memory devices within the memory stack. Power is provided to a single one of the plurality of the memory devices in the memory stack at a time to reduce power consumption. Other methods, apparatuses, and devices are also disclosed.
Abstract translation: 各种实施例公开了一种用于管理存储器件的控制器。 在示例性方法中，信号与主处理器交换，以允许主机处理器作为单个设备与存储器堆叠中的多个存储器件通信，而不管存储器堆栈内的实际数量的存储器件。 一次将功率提供给存储器堆叠中的多个存储器件中的单个存储器件，以降低功耗。 还公开了其它方法，装置和装置。
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公开(公告)号：US09189390B2
公开(公告)日：2015-11-17
申请号：US14350558
申请日：2014-04-08
Applicant: Micron Technology, Inc.
Inventor： Massimo Iaculo , Ornella Vitale , Antonino Pollio
CPC classification number: G06F12/0246 , G06F2212/7211 , G11C16/349
Abstract: In accordance with some embodiments, wear leveling may be done based on the difference in age of discarded blocks and engaged blocks. Data is moved to an older discarded block from a younger engaged block. Two wear leveling bits may be used for each logical block, such that the wear leveling bits are used in alternating cycles.
Abstract translation: 根据一些实施例，可以基于废弃块和接合块的年龄差异来进行磨损平衡。 数据从较年轻的被动块移动到较旧的废弃块。 每个逻辑块可以使用两个损耗均衡位，使得在交替周期中使用损耗均衡比特。
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