公开(公告)号：US20150331792A1

公开(公告)日：2015-11-19

申请号：US14809959

申请日：2015-07-27

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Luca De Santis ,  Pasquale Conenna

IPC: G06F12/02 ,  G06F12/08

CPC classification number: G06F12/0246 ,  G06F12/0875 ,  G06F13/16 ,  G06F13/1694 ,  G06F2212/202 ,  G06F2212/452 ,  G11C16/10

Abstract: A bus controller has a displacer, an arithmetic logic unit coupled to the displacer, and a replacer selectively coupled to the displacer and the arithmetic logic unit.

Abstract translation: 总线控制器具有置换器，耦合到置换器的算术逻辑单元和选择性地耦合到置换器和算术逻辑单元的替换器。

公开(公告)号：US10049038B2

公开(公告)日：2018-08-14

申请号：US14809959

申请日：2015-07-27

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Luca De Santis ,  Pasquale Conenna

IPC: G06F12/00 ,  G06F13/00 ,  G06F13/28 ,  G06F12/02 ,  G06F12/0875 ,  G06F13/16 ,  G11C16/10

Abstract: A bus controller has a displacer, an arithmetic logic unit coupled to the displacer, and a replacer selectively coupled to the displacer and the arithmetic logic unit.

公开(公告)号：US09128894B2

公开(公告)日：2015-09-08

申请号：US14170728

申请日：2014-02-03

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Luca De Santis ,  Pasquale Conenna

IPC: G06F12/00 ,  G06F13/00 ,  G06F13/28 ,  G06F13/16 ,  G11C16/10

CPC classification number: G06F12/0246 ,  G06F12/0875 ,  G06F13/16 ,  G06F13/1694 ,  G06F2212/202 ,  G06F2212/452 ,  G11C16/10

Abstract: A bus controller has a displacer, an arithmetic logic unit coupled to the displacer, and a replacer selectively coupled to the displacer and the arithmetic logic unit.

Abstract translation: 总线控制器具有置换器，耦合到置换器的算术逻辑单元和选择性地耦合到置换器和算术逻辑单元的替换器。

公开(公告)号：US20230017305A1

公开(公告)日：2023-01-19

申请号：US17730325

申请日：2022-04-27

Applicant: Micron Technology, Inc.

Inventor： Mattia Cichocki ,  Vladimir Mikhalev ,  Phani Bharadwaj Vanguri ,  James Eric Davis ,  Kenneth William Marr ,  Chiara Cerafogli ,  Michael James Irwin ,  Domenico Tuzi ,  Umberto Siciliani ,  Alessandro Alilla ,  Andrea Giovanni Xotta ,  Chung-Ping Wu ,  Luigi Marchese ,  Pasquale Conenna ,  Joonwoo Nam ,  Ishani Bhatt ,  Fulvio Rori ,  Andrea D'Alessandro ,  Michele Piccardi ,  Aleksey Prozapas ,  Luigi Pilolli ,  Violante Moschiano

IPC: H01L27/02 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11529 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11573 ,  H01L27/11582

Abstract: A variety of applications can include apparatus or methods that provide a well ring for resistive ground power domain segregation. The well ring can be implemented as a n-well in a p-type substrate. Resistive separation between ground domains can be generated by biasing a n-well ring to an external supply voltage. This approach can provide a procedure, from a process standpoint, that provides relatively high flexibility to design for chip floor planning and simulation, while providing sufficient noise rejection between independent ground power domains when correctly sized. Significant noise rejection between ground power domains can be attained.

公开(公告)号：US20140156904A1

公开(公告)日：2014-06-05

申请号：US14170728

申请日：2014-02-03

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Luca De Santis ,  Pasquale Conenna

IPC: G06F13/16

CPC classification number: G06F12/0246 ,  G06F12/0875 ,  G06F13/16 ,  G06F13/1694 ,  G06F2212/202 ,  G06F2212/452 ,  G11C16/10

Abstract: A bus controller has a displacer, an arithmetic logic unit coupled to the displacer, and a replacer selectively coupled to the displacer and the arithmetic logic unit.

Abstract translation: 总线控制器具有置换器，耦合到置换器的算术逻辑单元和选择性地耦合到置换器和算术逻辑单元的替换器。