公开(公告)号：US06509233B2

公开(公告)日：2003-01-21

申请号：US10094476

申请日：2002-03-07

申请人： Mike Chang ,  Sik Lui ,  Sung-Shan Tai

发明人： Mike Chang ,  Sik Lui ,  Sung-Shan Tai

IPC分类号： H01L21336

CPC分类号： H01L29/7813 ,  H01L21/28167 ,  H01L21/31155 ,  H01L29/42368 ,  H01L29/517

摘要： Cesium is implanted into the gate oxide layer of a vertical trench-gated MOSFET. The cesium, which is an electropositive material, reduces the threshold voltage of the device and lowers the on-resistance by improving the accumulation region adjacent the bottom of the trench.

公开(公告)号：US20130175612A1

公开(公告)日：2013-07-11

申请号：US13780579

申请日：2013-02-28

申请人： Sung-Shan Tai ,  Sik Lui ,  Xiaobin Wang

发明人： Sung-Shan Tai ,  Sik Lui ,  Xiaobin Wang

IPC分类号： H01L29/78

CPC分类号： H01L29/7813 ,  H01L29/0638 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/456 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7811

摘要： A semiconductor device and fabrication methods are disclosed. The device includes a plurality of gate electrodes formed in trenches located in an active region of a semiconductor substrate. A first gate runner is formed in the substrate and electrically connected to the gate electrodes, wherein the first gate runner surrounds the active region. A second gate runner is connected to the first gate runner and located between the active region and a termination region. A termination structure surrounds the first and second gate runners and the active region. The termination structure includes a conductive material in an insulator-lined trench in the substrate, wherein the termination structure is electrically shorted to a source or body layer of the substrate thereby forming a channel stop for the device.

摘要翻译： 公开了半导体器件和制造方法。 该器件包括形成在位于半导体衬底的有源区中的沟槽中的多个栅电极。 第一栅极流道形成在基板中并电连接到栅电极，其中第一栅极流道围绕有源区。 第二浇口浇道连接到第一浇口浇道并且位于活性区域和终止区域之间。 终端结构围绕第一和第二栅极流道和有源区域。 端接结构包括在衬底中的绝缘体衬里的沟槽中的导电材料，其中端接结构电气短路到衬底的源极或体层，从而形成用于器件的通道停止。

公开(公告)号：US08907416B2

公开(公告)日：2014-12-09

申请号：US13780579

申请日：2013-02-28

申请人： Sung-Shan Tai ,  Sik Lui ,  Xiaobin Wang

发明人： Sung-Shan Tai ,  Sik Lui ,  Xiaobin Wang

IPC分类号： H01L29/66 ,  H01L29/78 ,  H01L29/40 ,  H01L29/06 ,  H01L29/08 ,  H01L29/417 ,  H01L29/423 ,  H01L29/45

CPC分类号： H01L29/7813 ,  H01L29/0638 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/456 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7811

摘要： A semiconductor device and fabrication methods are disclosed. The device includes a plurality of gate electrodes formed in trenches located in an active region of a semiconductor substrate. A first gate runner is formed in the substrate and electrically connected to the gate electrodes, wherein the first gate runner surrounds the active region. A second gate runner is connected to the first gate runner and located between the active region and a termination region. A termination structure surrounds the first and second gate runners and the active region. The termination structure includes a conductive material in an insulator-lined trench in the substrate, wherein the termination structure is electrically shorted to a source or body layer of the substrate thereby forming a channel stop for the device.

摘要翻译： 公开了半导体器件和制造方法。 该器件包括形成在位于半导体衬底的有源区中的沟槽中的多个栅电极。 第一栅极流道形成在基板中并电连接到栅电极，其中第一栅极流道围绕有源区。 第二浇口浇道连接到第一浇口浇道并且位于活性区域和终止区域之间。 终端结构围绕第一和第二栅极流道和有源区域。 端接结构包括在衬底中的绝缘体衬里的沟槽中的导电材料，其中端接结构电气短路到衬底的源极或体层，从而形成用于器件的通道停止。

公开(公告)号：US08394702B2

公开(公告)日：2013-03-12

申请号：US12782573

申请日：2010-05-18

申请人： Sung-Shan Tai ,  Sik Lui ,  Xiaobin Wang

发明人： Sung-Shan Tai ,  Sik Lui ,  Xiaobin Wang

IPC分类号： H01L21/336 ,  H01L21/8249 ,  H01L21/425 ,  H01L21/20 ,  H01L29/66

CPC分类号： H01L29/7813 ,  H01L29/0638 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/456 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7811

摘要： A semiconductor device and fabrication methods are disclosed. The device includes a plurality of gate electrodes formed in trenches located in an active region of a semiconductor substrate. A first gate runner is formed in the substrate and electrically connected to the gate electrodes, wherein the first gate runner surrounds the active region. A second gate runner is connected to the first gate runner and located between the active region and a termination region. A termination structure surrounds the first and second gate runners and the active region. The termination structure includes a conductive material in an insulator-lined trench in the substrate, wherein the termination structure is electrically shorted to a source or body layer of the substrate thereby forming a channel stop for the device.

摘要翻译： 公开了半导体器件和制造方法。 该器件包括形成在位于半导体衬底的有源区中的沟槽中的多个栅电极。 第一栅极流道形成在基板中并电连接到栅电极，其中第一栅极流道围绕有源区。 第二浇口浇道连接到第一浇口浇道并且位于活性区域和终止区域之间。 终端结构围绕第一和第二栅极流道和有源区域。 端接结构包括在衬底中的绝缘体衬里的沟槽中的导电材料，其中端接结构电气短路到衬底的源极或体层，从而形成用于器件的通道停止。

公开(公告)号：US20110233667A1

公开(公告)日：2011-09-29

申请号：US12782573

申请日：2010-05-18

申请人： Sung-Shan Tai ,  Sik Lui ,  Xiaobin Wang

发明人： Sung-Shan Tai ,  Sik Lui ,  Xiaobin Wang

IPC分类号： H01L29/78 ,  H01L21/336 ,  H01L27/088

CPC分类号： H01L29/7813 ,  H01L29/0638 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/456 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7811

摘要： A semiconductor device and fabrication methods are disclosed. The device includes a plurality of gate electrodes formed in trenches located in an active region of a semiconductor substrate. A first gate runner is formed in the substrate and electrically connected to the gate electrodes, wherein the first gate runner surrounds the active region. A second gate runner is connected to the first gate runner and located between the active region and a termination region. A termination structure surrounds the first and second gate runners and the active region. The termination structure includes a conductive material in an insulator-lined trench in the substrate, wherein the termination structure is electrically shorted to a source or body layer of the substrate thereby forming a channel stop for the device.

摘要翻译： 公开了半导体器件和制造方法。 该器件包括形成在位于半导体衬底的有源区域中的沟槽中的多个栅电极。 第一栅极流道形成在基板中并电连接到栅电极，其中第一栅极流道围绕有源区。 第二浇口浇道连接到第一浇口浇道并且位于活性区域和终止区域之间。 终端结构围绕第一和第二栅极流道和有源区域。 端接结构包括在衬底中的绝缘体衬里的沟槽中的导电材料，其中端接结构电气短路到衬底的源极或体层，从而形成用于器件的通道停止。

公开(公告)号：US20060108635A1

公开(公告)日：2006-05-25

申请号：US10996561

申请日：2004-11-23

申请人： Anup Bhalla ,  Sik Lui ,  Sung-Shan Tai

发明人： Anup Bhalla ,  Sik Lui ,  Sung-Shan Tai

IPC分类号： H01L31/113

CPC分类号： H01L29/7813 ,  H01L24/33 ,  H01L29/045 ,  H01L29/4236 ,  H01L29/66734 ,  H01L29/7811 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00

摘要： This invention discloses an improved MOSFET devices manufactured with a trenched gate by forming part of the trench on a (110) crystal orientation of a semiconductor substrate. The trench is covering with a dielectric oxide layer along the sidewalls and the bottom surface or the termination of the trench formed along different crystal orientations of the semiconductor substrate. Special manufacturing processes such as oxide annealing process, special mask or SOG processes are implemented to overcome the limitations of the non-uniform dielectric layer growth.

摘要翻译： 本发明公开了一种通过在半导体衬底的（110）晶体取向上形成沟槽的一部分而制造的具有沟槽栅极的改进的MOSFET器件。 沟槽沿着沿着半导体衬底的不同晶体取向形成的沟槽的侧壁和底表面或沟槽的终端覆盖电介质氧化物层。 实施诸如氧化物退火工艺，特殊掩模或SOG工艺的特殊制造工艺以克服非均匀介电层生长的限制。

公开(公告)号：US20170288034A1

公开(公告)日：2017-10-05

申请号：US15499487

申请日：2017-04-27

申请人： Anup Bhalla ,  François Hébert ,  Sung-Shan Tai ,  Sik K. Lui

发明人： Anup Bhalla ,  François Hébert ,  Sung-Shan Tai ,  Sik K. Lui

IPC分类号： H01L29/423 ,  H01L29/06 ,  H01L29/40 ,  H01L27/088

CPC分类号： H01L29/42368 ,  H01L27/088 ,  H01L29/0619 ,  H01L29/401 ,  H01L29/4236

摘要： This invention discloses a semiconductor power device. The trenched semiconductor power device includes a trenched gate, opened from a top surface of a semiconductor substrate, surrounded by a source region encompassed in a body region near the top surface above a drain region disposed on a bottom surface of a substrate. The semiconductor power device further includes an implanting-ion block disposed above the top surface on a mesa area next to the body region having a thickness substantially larger than 0.3 micron for blocking body implanting ions and source ions from entering into the substrate under the mesa area whereby masks for manufacturing the semiconductor power device can be reduced.

公开(公告)号：US08709895B2

公开(公告)日：2014-04-29

申请号：US13038346

申请日：2011-03-01

申请人： Sung-Shan Tai ,  Hung-Sheng Tsai

发明人： Sung-Shan Tai ,  Hung-Sheng Tsai

IPC分类号： H01L21/336

CPC分类号： H01L29/7813 ,  H01L29/0638 ,  H01L29/0653 ,  H01L29/0661 ,  H01L29/0696 ,  H01L29/41766 ,  H01L29/4238 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7811 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present invention provides a termination structure of a power semiconductor device and a manufacturing method thereof. The power semiconductor device has an active region and a termination region. The termination region surrounds the active region, and the termination structure is disposed in the termination region. The termination structure includes a semiconductor substrate, an insulating layer and a metal layer. The semiconductor substrate has a trench disposed in the termination region. The insulating layer is partially filled into the trench and covers the semiconductor substrate, and a top surface of the insulating layer has a hole. The metal layer is disposed on the insulating layer, and is filled into the hole.

摘要翻译： 本发明提供一种功率半导体器件的端接结构及其制造方法。 功率半导体器件具有有源区和端接区。 终端区域围绕有源区域，终端结构设置在终端区域中。 端接结构包括半导体衬底，绝缘层和金属层。 半导体衬底具有设置在终端区域中的沟槽。 绝缘层部分地填充到沟槽中并且覆盖半导体衬底，并且绝缘层的顶表面具有孔。 金属层设置在绝缘层上，并被填充到孔中。

公开(公告)号：US08471368B2

公开(公告)日：2013-06-25

申请号：US13431551

申请日：2012-03-27

申请人： Yu Wang ,  Tiesheng Li ,  Sung-Shan Tai ,  Hong Chang

发明人： Yu Wang ,  Tiesheng Li ,  Sung-Shan Tai ,  Hong Chang

IPC分类号： H01L29/06

CPC分类号： H01L29/7813 ,  H01L22/12 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/4238 ,  H01L29/66734 ,  H01L2924/0002 ,  H01L2924/00

摘要： This invention discloses a semiconductor wafer for manufacturing electronic circuit thereon. The semiconductor substrate further includes an etch-back indicator that includes trenches of different sizes having polysilicon filled in the trenches and then completely removed from some of the trenches of greater planar trench dimensions and the polysilicon still remaining in a bottom portion in some of the trenches having smaller planar trench dimensions.

摘要翻译： 本发明公开了一种用于在其上制造电子电路的半导体晶片。 半导体衬底还包括回蚀指示器，其包括不同尺寸的沟槽，其具有填充在沟槽中的多晶硅，然后从更大的平面沟槽尺寸的一些沟槽中完全去除，并且多晶硅仍保留在一些沟槽中的底部 具有较小的平面沟槽尺寸。

公开(公告)号：US20130049104A1

公开(公告)日：2013-02-28

申请号：US13218476

申请日：2011-08-26

申请人： Sung-Shan Tai ,  Teng-hao Yeh ,  Chia-Hui Chen

发明人： Sung-Shan Tai ,  Teng-hao Yeh ,  Chia-Hui Chen

IPC分类号： H01L29/78 ,  H01L21/336 ,  H01L21/3105

CPC分类号： H01L29/7813 ,  H01L29/41741 ,  H01L29/41766 ,  H01L29/41775 ,  H01L29/66719 ,  H01L29/66727 ,  H01L29/66734

摘要： A method of forming a contact opening in a semiconductor substrate is presented. A plurality of trench gates each having a projecting portion are formed in a semiconductor substrate, and a stop layer is deposited over the semiconductor substrate extending over the projecting portions, wherein each portion of the stop layer along each of the sidewalls of the projecting portions is covered by a spacer. By removing the portions of the stop layer not covered by the spacers by utilizing a relatively higher etching selectivity of the stop layer to the spacers, the openings between adjacent projecting portions with an L-type shape on each sidewall can be formed, and a lithography process can be performed to form self-aligned contact openings thereafter.

摘要翻译： 提出了在半导体衬底中形成接触开口的方法。 在半导体衬底中形成各自具有突出部分的多个沟槽栅极，并且在突出部分上延伸的半导体衬底上沉积停止层，其中沿着突出部分的每个侧壁的阻挡层的每个部分是 被间隔物覆盖。 通过利用阻挡层对间隔物的相对较高的蚀刻选择性去除未被间隔物覆盖的停止层的部分，可以形成每个侧壁上具有L型形状的相邻突出部分之间的开口，并且可以形成光刻 此后可以进行处理以形成自对准的接触开口。