公开(公告)号：US5639697A

公开(公告)日：1997-06-17

申请号：US593900

申请日：1996-01-30

申请人： Milind G. Weling ,  Subhas Bothra ,  Calvin T. Gabriel

发明人： Milind G. Weling ,  Subhas Bothra ,  Calvin T. Gabriel

IPC分类号： H01L21/3105 ,  H01L21/302 ,  H01L21/463

CPC分类号： H01L21/31053 ,  Y10S438/926

摘要： A method of commonizing the pattern density of topography for different layers of semiconductor wafers to improve the Chemical Mechanical Polishing process used during wafer processing is disclosed. In order to achieve a predetermined pattern density of topography on the surface of a wafer, dummy raised lines are inserted as necessary into gaps between active conductive traces on a trace layer. In some embodiments, the predetermined pattern density is in the range of approximately 40% to 80%. In some applications, both the active conductive traces and the dummy raised lines are formed from a metallic material that is deposited in one single step with an insulating layer deposited over both the active conductive traces and the dummy raised lines prior to the Chemical Mechanical Polishing process. In other applications, the dummy raised lines are formed from the insulating layer.

摘要翻译： 公开了用于不同层的半导体晶片的形貌图案密度的方法，以改进在晶片处理期间使用的化学机械抛光工艺。 为了实现晶片表面上的预定图案形状密度，根据需要将虚拟凸起线插入到迹线层上的有源导电迹线之间的间隙中。 在一些实施例中，预定图案密度在大约40％至80％的范围内。 在一些应用中，活性导电迹线和虚拟凸起线都由金属材料形成，该金属材料在化学机械抛光过程之前在一个步骤中沉积，绝缘层沉积在两个有源导电迹线和虚拟凸起线上 。 在其他应用中，假凸起线由绝缘层形成。

公开(公告)号：US5965941A

公开(公告)日：1999-10-12

申请号：US734501

申请日：1996-10-21

申请人： Milind G. Weling ,  Subhas Bothra ,  Calvin T. Gabriel

发明人： Milind G. Weling ,  Subhas Bothra ,  Calvin T. Gabriel

IPC分类号： H01L21/3105 ,  H01L23/48 ,  H01L23/58 ,  H01L29/00

CPC分类号： H01L21/31053 ,  Y10S438/926

摘要： A method of commonizing the pattern density of topography for different layers of semiconductor wafers to improve the Chemical Mechanical Polishing process used during wafer processing is disclosed. In order to achieve a predetermined pattern density of topography on the surface of a wafer, dummy raised lines are inserted as necessary into gaps between active conductive traces on a trace layer. In some embodiments, the predetermined pattern density is in the range of approximately 40% to 80%. In some applications, both the active conductive traces and the dummy raised lines are formed from a metallic material that is deposited in one single step with an insulating layer deposited over both the active conductive traces and the dummy raised lines prior to the Chemical Mechanical Polishing process. In other applications, the dummy raised lines are formed from the insulating layer.

摘要翻译： 公开了用于不同层的半导体晶片的形貌图案密度的方法，以改进在晶片处理期间使用的化学机械抛光工艺。 为了实现晶片表面上的预定图案形状密度，根据需要将虚拟凸起线插入到迹线层上的有源导电迹线之间的间隙中。 在一些实施例中，预定图案密度在大约40％至80％的范围内。 在一些应用中，有源导电迹线和虚拟凸起线都是由金属材料形成的，该金属材料在化学机械抛光过程之前沉积在一个单一步骤中，绝缘层沉积在两个有源导电迹线和虚拟凸起线上 。 在其他应用中，假凸起线由绝缘层形成。

公开(公告)号：US06916525B2

公开(公告)日：2005-07-12

申请号：US10666484

申请日：2003-09-19

申请人： Subhas Bothra ,  Milind G. Weling

发明人： Subhas Bothra ,  Milind G. Weling

IPC分类号： B24B37/013 ,  B24B49/10 ,  H01L21/3105 ,  B32B9/04 ,  B32B3/00

CPC分类号： B24B37/013 ,  B24B49/10 ,  H01L21/31053 ,  Y10T428/24917

摘要： A method of using films having optimized optical properties for chemical mechanical polishing (CMP) endpoint detection. Specifically, one embodiment of the present invention includes a method for improving chemical mechanical polishing endpoint detection. The method comprises the step of depositing a dielectric layer over a reflectance stop layer. The reflectance stop layer is disposed above a component that is disposed on a semiconductor wafer. During a determination of the thickness of the dielectric layer using a reflected signal of light, the reflectance stop layer substantially reduces any light from reflecting off of the component. Therefore, the present invention provides a method and system that provides more accurate endpoint detection during a CMP process of semiconductor wafers. As a result of the present invention, an operator of a CMP machine knows precisely when to stop a CMP process of a semiconductor wafer. Furthermore, the present invention enables the operator of the CMP machine to know within a certain accuracy the film (e.g., dielectric layer) thickness remaining after the CMP process of the semiconductor wafer. Moreover, the present invention essentially eliminates excessive chemical mechanical polishing of the semiconductor wafer. As such, not as much dielectric material needs to be deposited on the wafer in order to compensate for excessive chemical mechanical polishing of the semiconductor wafer. Therefore, the present invention is able to reduce fabrication costs of semiconductor wafers.

摘要翻译： 使用具有优化的光学性质的膜用于化学机械抛光（CMP）端点检测的方法。 具体地，本发明的一个实施方案包括用于改进化学机械抛光终点检测的方法。 该方法包括在反射停止层上沉积介电层的步骤。 反射阻挡层设置在配置在半导体晶片上的部件的上方。 在使用光的反射信号确定介电层的厚度期间，反射率停止层基本上减少了从组件反射的任何光。 因此，本发明提供了一种在半导体晶片的CMP工艺期间提供更准确的端点检测的方法和系统。 作为本发明的结果，CMP机器的操作者精确地知道何时停止半导体晶片的CMP工艺。 此外，本发明使得CMP机器的操作者能够在半导体晶片的CMP处理之后以一定的精度了解剩余的膜（例如介电层）的厚度。 此外，本发明基本上消除了半导体晶片的过度的化学机械抛光。 因此，为了补偿半导体晶片的过度的化学机械抛光，不需要在晶片上沉积太多的介电材料。 因此，本发明能够降低半导体晶片的制造成本。

公开(公告)号：US5618757A

公开(公告)日：1997-04-08

申请号：US593898

申请日：1996-01-30

申请人： Subhas Bothra ,  Milind G. Weling

发明人： Subhas Bothra ,  Milind G. Weling

IPC分类号： H01L21/3105 ,  H01L21/302 ,  H01L21/304 ,  H01L21/463

CPC分类号： H01L21/31053 ,  Y10S438/926 ,  Y10S438/941

摘要： Spin-on glass etchback is a technique commonly used to planarize the surface of a semiconductor wafer during fabrication. The etch rate of spin-on glass is largely affected by the amount of oxide exposed during the spin-on glass etchback process. The amount of oxide exposed during spin-on glass etchback is dependent upon the underlying pattern density of topography. A method of standardizing the pattern density of topography for different layers of semiconductor wafers to improve the spin-on glass etchback process used to planarize the surface of a wafer during processing is disclosed. In order to achieve a standardized pattern density of topography on the surface of a wafer, dummy raised areas are added into gaps between active conductive traces on a trace layer. In some embodiments, the standardized pattern density is in the range of approximately 40% to 80%. In some applications, both the active conductive traces and the dummy raised areas are formed from a metallic material that is deposited in one single step with an oxide layer deposited over both the active conductive traces and the dummy raised areas prior to the application of spin-on glass and the spin-on glass etchback process. In other applications, the dummy raised areas are formed from an oxide material.

摘要翻译： 旋转玻璃回蚀是通常用于在制造期间平面化半导体晶片的表面的技术。 旋涂玻璃的蚀刻速率很大程度上受到旋涂玻璃回蚀工艺中暴露的氧化物的影响。 在旋涂玻璃回蚀期间暴露的氧化物的量取决于地形的底层图案密度。 公开了一种标准化不同层半导体晶片的形貌图案密度的方法，以改善用于在处理期间平坦化晶片表面的旋涂玻璃回蚀工艺。 为了实现晶片表面的标准图案密度，虚拟凸起区域被添加到迹线层上的有源导电迹线之间的间隙中。 在一些实施方案中，标准化图案密度在约40％至80％的范围内。 在一些应用中，有源导电迹线和虚拟凸起区域均由金属材料形成，该金属材料在施加旋转之前沉积在两个有源导电迹线和虚拟凸起区域上的一个单一步骤中沉积， 在玻璃上和旋涂玻璃回蚀工艺。 在其他应用中，虚拟凸起区域由氧化物材料形成。

公开(公告)号：US06214734B1

公开(公告)日：2001-04-10

申请号：US09197377

申请日：1998-11-20

申请人： Subhas Bothra ,  Milind G. Weling

发明人： Subhas Bothra ,  Milind G. Weling

IPC分类号： H01L21302

CPC分类号： B24B37/013 ,  B24B37/042 ,  H01L21/31053 ,  Y10S438/959 ,  Y10T428/24917

摘要： A method of using films having optimized optical properties for chemical mechanical polishing (CMP) endpoint detection. Specifically, one embodiment of the present invention includes a method for improving chemical mechanical polishing endpoint detection. The method comprises the step of depositing a dielectric layer over a reflectance stop layer. The reflectance stop layer is disposed above a component that is disposed on a semiconductor wafer. During a determination of the thickness of the dielectric layer using a reflected signal of light, the reflectance stop layer substantially reduces any light from reflecting off of the component. Therefore, the present invention provides a method and system that provides more accurate endpoint detection during a CMP process of semiconductor wafers. As a result of the present invention, an operator of a CMP machine knows precisely when to stop a CMP process of a semiconductor wafer. Furthermore, the present invention enables the operator of the CMP machine to know within a certain accuracy the film (e.g., dielectric layer) thickness remaining after the CMP process of the semiconductor wafer. Moreover, the present invention essentially eliminates excessive chemical mechanical polishing of the semiconductor wafer. As such, not as much dielectric material needs to be deposited on the wafer in order to compensate for excessive chemical mechanical polishing of the semiconductor wafer. Therefore, the present invention is able to reduce fabrication costs of semiconductor wafers.

摘要翻译： 使用具有优化的光学性质的膜用于化学机械抛光（CMP）端点检测的方法。 具体地，本发明的一个实施方案包括用于改进化学机械抛光终点检测的方法。 该方法包括在反射停止层上沉积介电层的步骤。 反射阻挡层设置在配置在半导体晶片上的部件的上方。 在使用光的反射信号确定介电层的厚度期间，反射率停止层基本上减少了从组件反射的任何光。 因此，本发明提供了一种在半导体晶片的CMP工艺期间提供更准确的端点检测的方法和系统。 作为本发明的结果，CMP机器的操作者精确地知道何时停止半导体晶片的CMP工艺。 此外，本发明使得CMP机器的操作者能够在半导体晶片的CMP处理之后以一定的精度了解剩余的膜（例如介电层）的厚度。 此外，本发明基本上消除了半导体晶片的过度的化学机械抛光。 因此，为了补偿半导体晶片的过度的化学机械抛光，不需要在晶片上沉积太多的介电材料。 因此，本发明能够降低半导体晶片的制造成本。

公开(公告)号：US6034434A

公开(公告)日：2000-03-07

申请号：US024967

申请日：1998-02-06

申请人： Subhas Bothra ,  Milind G. Weling

发明人： Subhas Bothra ,  Milind G. Weling

IPC分类号： H01L21/3105 ,  H01L21/768 ,  H01L23/522 ,  H01L23/52

CPC分类号： H01L21/31053 ,  H01L21/76819 ,  H01L21/76837 ,  H01L23/522 ,  H01L2924/0002

摘要： A method of forming sharp oxide peaks on the surface of a semiconductor wafer for the purpose of conditioning polishing pads used during a Chemical Mechanical Polishing process is disclosed. In order to create oxide peaks on the surface of a wafer, additional elements are added to a trace layer of the wafer. An oxide layer is deposited over the additional elements using an Electron Cyclotron Resonance Chemical Vapor Deposition process, which includes a sputtering step, in order to create sharp peaks in the oxide layer over the additional lines. In some embodiments, the additional elements may be formed from a multiplicity of rectangular blocks over which pyramid-like oxide peaks are created. In others, they may be formed from a multiplicity of rectangular blocks connected by narrow lines over which pyramid-like oxide peaks and knife-edged peaks, respectively, are created.

摘要翻译： 公开了一种在化学机械研磨过程中用于调节抛光垫的目的，在半导体晶片的表面上形成尖锐的氧化物峰的方法。 为了在晶片的表面上产生氧化物峰，将另外的元素添加到晶片的迹线层。 使用电子回旋加速器共振化学气相沉积工艺在附加元件上沉积氧化物层，其包括溅射步骤，以便在附加管线上的氧化物层中产生尖锐的峰。 在一些实施例中，附加元件可以由多个矩形块形成，在其上形成金字塔状氧化物峰。 在另一些实施例中，它们可以由多个矩形块形成，该矩形块通过分别形成有金字塔形氧化物峰和刀刃峰的窄线连接。

公开(公告)号：US06649253B1

公开(公告)日：2003-11-18

申请号：US09523403

申请日：2000-03-10

申请人： Subhas Bothra ,  Milind G. Weling

发明人： Subhas Bothra ,  Milind G. Weling

IPC分类号： H01L2500

CPC分类号： B24B37/013 ,  B24B37/042 ,  H01L21/31053 ,  Y10S438/959 ,  Y10T428/24917

摘要： A method of using films having optimized optical properties for chemical mechanical polishing (CMP) endpoint detection. Specifically, one embodiment of the present invention includes a method for improving chemical mechanical polishing endpoint detection. The method comprises the step of depositing a dielectric layer over a reflectance stop layer. The reflectance stop layer is disposed above a component that is disposed on a semiconductor wafer. During a determination of the thickness of the dielectric layer using a reflected signal of light, the reflectance stop layer substantially reduces any light from reflecting off of the component. Therefore, the present invention provides a method and system that provides more accurate endpoint detection during a CMP process of semiconductor wafers. As a result of the present invention, an operator of a CMP machine knows precisely when to stop a CMP process of a semiconductor wafer. Furthermore, the present invention enables the operator of the CMP machine to know within a certain accuracy the film (e.g., dielectric layer) thickness remaining after the CMP process of the semiconductor wafer. Moreover, the present invention essentially eliminates excessive chemical mechanical polishing of the semiconductor wafer. As such, not as much dielectric material needs to be deposited on the wafer in order to compensate for excessive chemical mechanical polishing of the semiconductor wafer. Therefore, the present invention is able to reduce fabrication costs of semiconductor wafers.

摘要翻译： 使用具有优化的光学性质的膜用于化学机械抛光（CMP）端点检测的方法。 具体地，本发明的一个实施方案包括用于改进化学机械抛光终点检测的方法。 该方法包括在反射停止层上沉积介电层的步骤。 反射阻挡层设置在配置在半导体晶片上的部件的上方。 在使用光的反射信号确定介电层的厚度期间，反射率停止层基本上减少了从组件反射的任何光。 因此，本发明提供了一种在半导体晶片的CMP工艺期间提供更准确的端点检测的方法和系统。 作为本发明的结果，CMP机器的操作者精确地知道何时停止半导体晶片的CMP工艺。 此外，本发明使得CMP机器的操作者能够在半导体晶片的CMP处理之后以一定的精度了解剩余的膜（例如介电层）的厚度。 此外，本发明基本上消除了半导体晶片的过度的化学机械抛光。 因此，为了补偿半导体晶片的过度的化学机械抛光，不需要在晶片上沉积太多的介电材料。 因此，本发明能够降低半导体晶片的制造成本。

公开(公告)号：US5783488A

公开(公告)日：1998-07-21

申请号：US594874

申请日：1996-01-31

申请人： Subhas Bothra ,  Milind G. Weling

发明人： Subhas Bothra ,  Milind G. Weling

IPC分类号： H01L21/3105 ,  H01L21/768 ,  H01L23/522 ,  H01L21/302

CPC分类号： H01L21/31053 ,  H01L21/76819 ,  H01L21/76837 ,  H01L23/522 ,  H01L2924/0002

摘要： A method of forming sharp oxide peaks on the surface of a semiconductor wafer for the purpose of conditioning polishing pads used during a Chemical Mechanical Polishing process is disclosed. In order to create oxide peaks on the surface of a wafer, additional elements are added to a trace layer of the wafer. An oxide layer is deposited over the additional elements using an Electron Cyclotron Resonance Chemical Vapor Deposition process, which includes a sputtering step, in order to create sharp peaks in the oxide layer over the additional lines. In some embodiments, the additional elements may be formed from a multiplicity of rectangular blocks over which pyramid-like oxide peaks are created. In others, they may be formed from a multiplicity of rectangular blocks connected by narrow lines over which pyramid-like oxide peaks and knife-edged peaks, respectively, are created.

公开(公告)号：US5540958A

公开(公告)日：1996-07-30

申请号：US357842

申请日：1994-12-14

申请人： Subhas Bothra ,  Milind G. Weling

发明人： Subhas Bothra ,  Milind G. Weling

IPC分类号： G01N37/00 ,  G01Q60/38 ,  G01Q70/14 ,  G01Q70/16 ,  G02B21/32 ,  H05H1/00

CPC分类号： G01Q60/38 ,  B82Y35/00 ,  G01Q70/06

摘要： A method of manufacturing a microscope probe tip comprises the steps of depositing a first material over a substrate, such as silicon oxide over a silicon substrate using chemical vapor deposition. The first material is patterned to define at least one structural protrusion. During this patterning, the first material is etched back. Then a second material, such as silicon oxide, is deposited over the protrusion using an electron cyclotron resonance (ECR) process, which grows a sloped surface to form the microscope probe tip. In another aspect of the invention, two different resolution Atomic Force Microscope (AFM) probe tips are grown. Then, the cantilevers are coupled together to provide an AFM with two probe tips having different resolutions.

摘要翻译： 制造显微镜探针尖端的方法包括以下步骤：使用化学气相沉积在硅衬底上在诸如氧化硅的衬底上沉积第一材料。 图案化第一材料以限定至少一个结构突起。 在该图案化期间，第一材料被回蚀。 然后使用电子回旋共振（ECR）工艺在突起上沉积第二种材料，例如氧化硅，其生长倾斜表面以形成显微镜探针尖端。 在本发明的另一方面，生长了两种不同分辨率的原子力显微镜（AFM）探针尖端。 然后，悬臂连接在一起，为AFM提供具有不同分辨率的两个探针头。

公开(公告)号：US06229685B1

公开(公告)日：2001-05-08

申请号：US09467734

申请日：1999-12-20

申请人： Subhas Bothra ,  Dipankar Pramanik ,  Calvin T. Gabriel

发明人： Subhas Bothra ,  Dipankar Pramanik ,  Calvin T. Gabriel

IPC分类号： H01G4228

CPC分类号： H01L28/60 ,  H01L28/55

摘要： A capacitor and a method of making the capacitor is provided. The capacitor includes a metallization line with a high dielectric constant layer defined over the metallization line. A thin metallization film is defined over the high dielectric constant layer, such that the thin metallization film defines a top plate of the capacitor, the high dielectric constant layer defines a dielectric for the capacitor, and the metallization line defines a bottom plate for the capacitor. The metallization line is defined from a metallization level and the thin metallization film is defined before a next metallization level above the metallization level is defined.

摘要翻译： 提供电容器和制造电容器的方法。 电容器包括金属化线，其具有限定在金属化线上的高介电常数层。 在高介电常数层上限定薄金属化膜，使得薄金属化膜限定电容器的顶板，高介电常数层限定用于电容器的电介质，并且金属化线限定用于电容器的底板 。 金属化线由金属化水平限定，并且在限定金属化水平以上的下一个金属化水平之前限定薄金属化膜。