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    DRAM DEVICES
    5.
    发明申请
    DRAM DEVICES 审中-公开
    DRAM设备

    公开(公告)号：US20110006353A1

    公开(公告)日：2011-01-13

    申请号：US12830788

    申请日：2010-07-06

    申请人： Min-Sang KIM ,  Dong-Won Kim ,  Jun Seo ,  Keun-Hwi Cho ,  Hyun-Jun Bae ,  Ji-Myoung Lee

    发明人： Min-Sang KIM ,  Dong-Won Kim ,  Jun Seo ,  Keun-Hwi Cho ,  Hyun-Jun Bae ,  Ji-Myoung Lee

    IPC分类号： H01L27/108

    CPC分类号： H01L27/10894 ,  H01L27/10814 ,  H01L27/10852 ,  H01L27/10855 ,  H01L28/60

    摘要： A DRAM device includes a plug on a substrate, a conductive plate electrically connected to the plug and overlapping the substrate, at least one capacitor on the substrate and spaced apart from the plug, and at least one word line under the conductive plate and spaced apart from the conductive plate. The DRAM device further includes at least one first conductive pad under the conductive plate, the at least one first conductive pad being spaced apart from the conductive plate in a first state and being electrically connected to the conductive plate in a second state, the at least one first conductive pad being disposed between the plug and an adjacent word line of the at least one word line, and the at least one first conductive pad being electrically connected to a respective capacitor of the at least one capacitor.

    摘要翻译： DRAM装置包括在基板上的插头，电连接到插头并与衬底重叠的导电板，基板上的至少一个电容器和与插头间隔开的至少一个电容器，以及导电板下面的至少一个字线并间隔开 从导电板。 DRAM器件还包括在导电板下方的至少一个第一导电焊盘，所述至少一个第一导电焊盘在第一状态下与导电板间隔开并且在第二状态下电连接到导电板，至少 一个第一导电焊盘设置在所述插头和所述至少一个字线的相邻字线之间，并且所述至少一个第一导电焊盘电连接到所述至少一个电容器的相应电容器。

    Semiconductor device having bar type active pattern
    7.
    发明授权
    Semiconductor device having bar type active pattern 有权
    具有棒式有源图案的半导体器件

    公开(公告)号：US08106464B2

    公开(公告)日：2012-01-31

    申请号：US12461500

    申请日：2009-08-13

    申请人： Keun-hwl Cho ,  Dong-won Kim ,  Jun Seo ,  Min-sang Kim ,  Sung-min Kim ,  Hyun-jun Bae ,  Ji-Myoung Lee

    发明人： Keun-hwl Cho ,  Dong-won Kim ,  Jun Seo ,  Min-sang Kim ,  Sung-min Kim ,  Hyun-jun Bae ,  Ji-Myoung Lee

    IPC分类号： H01L27/088

    CPC分类号： H01L29/66795 ,  H01L27/10814 ,  H01L27/10873 ,  H01L27/10879 ,  H01L29/785

    摘要： A semiconductor device having a bar type active pattern and a method of manufacturing the same are provided. The semiconductor device may include a semiconductor substrate having a semiconductor fin configured to protrude from a surface of the semiconductor substrate in a first direction, the semiconductor substrate having a first width and a second width crossing the first width, wherein the first width and the second width extend in a second direction. A plurality of active patterns may be arranged in the first direction with a separation gap from the semiconductor fin. A plurality of support patterns may be arranged between the semiconductor fin and one of the plurality of active patterns arranged closer to the semiconductor fin in the first direction, and between the plurality of active patterns arranged in the first direction to support the plurality of active patterns. A gate may be arranged to cross the plurality of active patterns in the second direction and to cover a portion of the at least one of the plurality of active patterns.

    摘要翻译： 提供了具有条形有源图案的半导体器件及其制造方法。 半导体器件可以包括具有半导体鳍片的半导体衬底，半导体鳍片被配置为在第一方向上从半导体衬底的表面突出，半导体衬底具有与第一宽度交叉的第一宽度和第二宽度，其中第一宽度和第二宽度 宽度在第二方向上延伸。 多个有源图案可以在第一方向上与半导体鳍片分离间隙布置。 多个支撑图案可以布置在半导体翅片与沿着第一方向布置得更靠近半导体鳍片的多个有源图案中的一个之间以及沿着第一方向布置的多个有源图案之间，以支撑多个有源图案 。 栅极可以布置成在第二方向上跨越多个有源图案并且覆盖多个有源图案中的至少一个的一部分。

    Semiconductor device having bar type active pattern
    8.
    发明申请
    Semiconductor device having bar type active pattern 有权
    具有棒式有源图案的半导体器件

    公开(公告)号：US20100059807A1

    公开(公告)日：2010-03-11

    申请号：US12461500

    申请日：2009-08-13

    申请人： Keun-hwl Cho ,  Dong-won Kim ,  Jun Seo ,  Min-sang Kim ,  Sung-min Kim ,  Hyun-jun Bae ,  Ji-Myoung Lee

    发明人： Keun-hwl Cho ,  Dong-won Kim ,  Jun Seo ,  Min-sang Kim ,  Sung-min Kim ,  Hyun-jun Bae ,  Ji-Myoung Lee

    IPC分类号： H01L27/108

    CPC分类号： H01L29/66795 ,  H01L27/10814 ,  H01L27/10873 ,  H01L27/10879 ,  H01L29/785

    摘要： A semiconductor device having a bar type active pattern and a method of manufacturing the same are provided. The semiconductor device may include a semiconductor substrate having a semiconductor fin configured to protrude from a surface of the semiconductor substrate in a first direction, the semiconductor substrate having a first width and a second width crossing the first width, wherein the first width and the second width extend in a second direction. A plurality of active patterns may be arranged in the first direction with a separation gap from the semiconductor fin. A plurality of support patterns may be arranged between the semiconductor fin and one of the plurality of active patterns arranged closer to the semiconductor fin in the first direction, and between the plurality of active patterns arranged in the first direction to support the plurality of active patterns. A gate may be arranged to cross the plurality of active patterns in the second direction and to cover a portion of the at least one of the plurality of active patterns.

    摘要翻译： 提供了具有条形有源图案的半导体器件及其制造方法。 半导体器件可以包括具有半导体鳍片的半导体衬底，半导体鳍片被配置为在第一方向上从半导体衬底的表面突出，半导体衬底具有与第一宽度交叉的第一宽度和第二宽度，其中第一宽度和第二宽度 宽度在第二方向上延伸。 多个有源图案可以在第一方向上与半导体鳍片分离间隙布置。 多个支撑图案可以布置在半导体翅片与沿着第一方向布置得更靠近半导体鳍片的多个有源图案中的一个之间以及沿着第一方向布置的多个有源图案之间，以支撑多个有源图案 。 栅极可以布置成在第二方向上跨越多个有源图案并且覆盖多个有源图案中的至少一个的一部分。

    Method of fabricating a semiconductor device
    9.
    发明授权
    Method of fabricating a semiconductor device 失效
    制造半导体器件的方法

    公开(公告)号：US07939436B2

    公开(公告)日：2011-05-10

    申请号：US12353398

    申请日：2009-01-14

    申请人： Sung-Min Kim ,  Min-Sang Kim ,  Keun-Hwi Cho ,  Ji-Myoung Lee

    发明人： Sung-Min Kim ,  Min-Sang Kim ,  Keun-Hwi Cho ,  Ji-Myoung Lee

    IPC分类号： H01L21/20 ,  H01L21/36

    CPC分类号： H01L21/823425 ,  H01L21/28123 ,  H01L21/823437 ,  H01L21/823468 ,  H01L29/42376 ,  H01L29/66659 ,  H01L29/7835

    摘要： A method of fabricating a semiconductor device forms a micro-sized gate, and mitigates short channel effects. The method includes a pull-back process to form the gate on a substrate. The method also includes forming inner and outer spacers on the gate that are asymmetric to one another with respect to the gate, and using the spacers in forming junction regions in the substrate on opposite sides of the gate. In particular, the inner and outer spacers are formed on opposite sides of the gate so as to have different thicknesses at the bottom of the gate. The inner and outer junction regions are formed by doping the substrate before and after the spacers are formed. Thus, the inner and outer junction regions have extension regions under the inner and outer spacers, respectively, and the extension regions have different lengths.

    摘要翻译： 制造半导体器件的方法形成微尺寸栅极，并减轻短沟道效应。 该方法包括在衬底上形成栅极的回拉工艺。 该方法还包括在栅极上形成相对于栅极彼此不对称的内部和外部间隔物，以及在栅极的相对侧上在衬底中形成接合区域的间隔物。 特别地，内部和外部间隔件形成在栅极的相对侧上，以便在栅极的底部具有不同的厚度。 通过在形成间隔物之前和之后掺杂衬底来形成内部和外部结区域。 因此，内部和外部连接区域分别在内部和外部间隔件下方具有延伸区域，并且延伸区域具有不同的长度。

    Multibit electro-mechanical memory device having at least one cantilever electrode and at least one gate line and manufacturing method thereof
    10.
    发明授权
    Multibit electro-mechanical memory device having at least one cantilever electrode and at least one gate line and manufacturing method thereof 有权
    具有至少一个悬臂电极和至少一个栅极线的多位机电存储器件及其制造方法

    公开(公告)号：US07868401B2

    公开(公告)日：2011-01-11

    申请号：US12289851

    申请日：2008-11-06

    申请人： Ji-Myoung Lee ,  Min-Sang Kim ,  Sung-Min Kim ,  Keun-Hwi Cho

    发明人： Ji-Myoung Lee ,  Min-Sang Kim ,  Sung-Min Kim ,  Keun-Hwi Cho

    IPC分类号： H01L29/84 ,  H01L29/76 ,  H01L21/00 ,  G11C11/417

    CPC分类号： G11C11/56 ,  B82Y10/00 ,  G11C13/025 ,  G11C23/00

    摘要： Provided are a multibit electro-mechanical memory device and a method of manufacturing the same. The device may include at least one bit line in a first direction on a substrate; at least one gate line and at least one lower word line in parallel by a given interval and in a second direction intersecting the first direction on the at least one bit line; at least one contact pad adjacent to the at least one gate line on the at least one bit line; and at least one cantilever electrode coupled to the at least one contact pad, configured to float with a void above and beneath the at least one cantilever electrode and configured to curve in a third direction vertical to the first and second directions.

    摘要翻译： 提供了一种多位机电存储器件及其制造方法。 器件可以在衬底上包括沿第一方向的至少一个位线; 至少一个栅极线和至少一个下部字线平行延伸给定的间隔，并且在与所述至少一个位线上的所述第一方向相交的第二方向上; 至少一个与所述至少一条位线上的所述至少一条栅极线相邻的接触焊盘; 以及耦合到所述至少一个接触垫的至少一个悬臂电极，其构造成在所述至少一个悬臂电极的上方和下方浮动，并且被配置为在垂直于所述第一和第二方向的第三方向上弯曲。