Semiconductor memory device having refreshing function

    公开(公告)号:US06628559B2

    公开(公告)日:2003-09-30

    申请号:US09971694

    申请日:2001-10-09

    IPC分类号: G11C700

    CPC分类号: G11C11/406

    摘要: The semiconductor memory device of the invention has a refresh timer for generating a refresh clock, a refresh executing circuit for sequentially refreshing a plurality of memory cells part by part on the basis of the cycle of the refresh clock, and a refreshing control circuit disposed between the refresh timer and the refresh executing circuit, for stopping transmission of the refresh clock from the refresh timer to the refresh executing circuit in a predetermined period during which the cycle of the refresh clock is easy to become unstable. With the configuration, an erroneous operation of the refresh executing circuit can be prevented.

    Semiconductor integrated circuit device including a negative power supply circuit
    3.
    发明授权
    Semiconductor integrated circuit device including a negative power supply circuit 失效
    包括负电源电路的半导体集成电路装置

    公开(公告)号:US06737906B2

    公开(公告)日:2004-05-18

    申请号:US09986871

    申请日:2001-11-13

    IPC分类号: G05F110

    CPC分类号: H02M3/07 H02M2003/071

    摘要: In operation, a charge pumping circuit supplies negative charges to an internal voltage line so as to reduce a negative internal voltage. A voltage dividing circuit produces a control voltage according to the difference between a first positive voltage externally applied to a first input terminal in the test mode and the internal voltage. A comparison circuit operates the charge pumping circuit according to the comparison result between a second positive voltage externally applied to a second input terminal in the test mode and the control voltage. The second positive voltage is set according to a target value of the negative internal voltage.

    摘要翻译: 在操作中,电荷泵浦电路向内部电压线提供负电荷以便减小负的内部电压。 分压电路根据外部施加到测试模式中的第一输入端子的第一正电压与内部电压之间的差产生控制电压。 比较电路根据外部施加到测试模式中的第二输入端子的第二正电压与控制电压之间的比较结果来操作电荷泵送电路。 第二正电压根据负内部电压的目标值设定。

    SEMICONDUCTOR DEVICE FOR PREVENTING ERRONEOUS WRITE TO MEMORY CELL IN SWITCHING OPERATIONAL MODE BETWEEN NORMAL MODE AND STANDBY MODE
    4.
    发明申请
    SEMICONDUCTOR DEVICE FOR PREVENTING ERRONEOUS WRITE TO MEMORY CELL IN SWITCHING OPERATIONAL MODE BETWEEN NORMAL MODE AND STANDBY MODE 有权
    用于防止在正常模式和待机模式之间切换操作模式的存储器单元的错误写入的半导体器件

    公开(公告)号:US20110116321A1

    公开(公告)日:2011-05-19

    申请号:US13008448

    申请日:2011-01-18

    IPC分类号: G11C16/30 G11C5/14

    摘要: When an operational mode is shifted to a standby mode, a first transistor is brought into a conduction state by a control signal, and a word line is thereby clamped to a ground voltage. Further, a second transistor is brought into a non-conduction state, and supply of an internal power supply voltage to a word line driver is shut off. Subsequently, the supply of the internal power supply voltage is halted for saving electrical power. When the operational mode returns to a normal mode, the supply of the internal power supply voltage is started, and subsequently, the first transistor is brought into the non-conduction state by the control signal, and the second transistor is thereby brought into the conduction state.

    摘要翻译: 当操作模式转换到待机模式时,第一晶体管通过控制信号进入导通状态,并且字线由此被钳位到接地电压。 此外,第二晶体管进入非导通状态,并且切断向字线驱动器提供内部电源电压。 随后,停止内部电源电压的供应以节省电力。 当操作模式返回到正常模式时,内部电源电压的供应开始,随后通过控制信号使第一晶体管变为非导通状态,从而使第二晶体管进入导通状态 州。

    Semiconductor device with pump circuit
    5.
    发明授权
    Semiconductor device with pump circuit 有权
    带泵电路的半导体器件

    公开(公告)号:US07365578B2

    公开(公告)日:2008-04-29

    申请号:US11822184

    申请日:2007-07-03

    IPC分类号: H03K3/00

    摘要: In the present semiconductor device a positive, driving pump circuit is driven by an external power supply potential EXVDD (for example of 1.8V) to generate a positive voltage VPC (for example of 2.4V). A negative pump circuit for internal operation is driven by the positive voltage VPC to generate a negative voltage VNA (for example of −9.2V) required in an erasure or similar internal operation for a word line. The negative pump circuit for internal operation can have a smaller number of stages of pump and hence consume a smaller area than when the circuit is driven by the external power supply voltage EXVDD (for example of 1.8V) as conventional.

    摘要翻译: 在本半导体器件中,正的驱动泵电路由外部电源电位EXVDD(例如1.8V)驱动以产生正电压VPC(例如2.4V)。 用于内部操作的负泵电路由正电压VPC驱动以产生对于字线的擦除或类似的内部操作所需的负电压VNA(例如-9.2V)。 用于内部操作的负泵电路可以具有较少数量的泵级,并且因此消耗比通过外部电源电压EXVDD(例如1.8V)驱动电路时更小的面积。

    Semiconductor device for preventing erroneous write to memory cell in switching operational mode between normal mode and standby mode
    8.
    发明授权
    Semiconductor device for preventing erroneous write to memory cell in switching operational mode between normal mode and standby mode 有权
    半导体装置,用于在正常模式和待机模式之间切换操作模式时防止对存储器单元的错误写入

    公开(公告)号:US08593859B2

    公开(公告)日:2013-11-26

    申请号:US13008448

    申请日:2011-01-18

    IPC分类号: G11C11/00 G11C5/14

    摘要: When an operational mode is shifted to a standby mode, a first transistor is brought into a conduction state by a control signal, and a word line is thereby clamped to a ground voltage. Further, a second transistor is brought into a non-conduction state, and supply of an internal power supply voltage to a word line driver is shut off. Subsequently, the supply of the internal power supply voltage is halted for saving electrical power. When the operational mode returns to a normal mode, the supply of the internal power supply voltage is started, and subsequently, the first transistor is brought into the non-conduction state by the control signal, and the second transistor is thereby brought into the conduction state.

    摘要翻译: 当操作模式转换到待机模式时,第一晶体管通过控制信号进入导通状态,并且字线由此被钳位到接地电压。 此外,第二晶体管进入非导通状态,并且切断向字线驱动器提供内部电源电压。 随后,停止内部电源电压的供应以节省电力。 当操作模式返回到正常模式时,内部电源电压的供应开始,随后通过控制信号使第一晶体管变为非导通状态,从而使第二晶体管进入导通状态 州。

    SEMICONDUCTOR DEVICE FOR PREVENTING ERRONEOUS WRITE TO MEMORY CELL IN SWITCHING OPERATIONAL MODE BETWEEN NORMAL MODE AND STANDBY MODE
    10.
    发明申请
    SEMICONDUCTOR DEVICE FOR PREVENTING ERRONEOUS WRITE TO MEMORY CELL IN SWITCHING OPERATIONAL MODE BETWEEN NORMAL MODE AND STANDBY MODE 有权
    用于防止在正常模式和待机模式之间切换操作模式的存储器单元的错误写入的半导体器件

    公开(公告)号:US20090196115A1

    公开(公告)日:2009-08-06

    申请号:US12360521

    申请日:2009-01-27

    IPC分类号: G11C5/14 G11C8/08

    摘要: When an operational mode is shifted to a standby mode, a first transistor is brought into a conduction state by a control signal, and a word line is thereby clamped to a ground voltage. Further, a second transistor is brought into a non-conduction state, and supply of an internal power supply voltage to a word line driver is shut off. Subsequently, the supply of the internal power supply voltage is halted for saving electrical power. When the operational mode returns to a normal mode, the supply of the internal power supply voltage is started, and subsequently, the first transistor is brought into the non-conduction state by the control signal, and the second transistor is thereby brought into the conduction state.

    摘要翻译: 当操作模式转换到待机模式时,第一晶体管通过控制信号进入导通状态,并且字线由此被钳位到接地电压。 此外,第二晶体管进入非导通状态,并且切断向字线驱动器提供内部电源电压。 随后,停止内部电源电压的供应以节省电力。 当操作模式返回到正常模式时,内部电源电压的供应开始,随后通过控制信号使第一晶体管变为非导通状态,从而使第二晶体管进入导通状态 州。