HIGH SIDE DRIVER CIRCUIT
    1.
    发明申请
    HIGH SIDE DRIVER CIRCUIT 有权
    高侧驱动电路

    公开(公告)号:US20130106467A1

    公开(公告)日:2013-05-02

    申请号:US13284395

    申请日:2011-10-28

    IPC分类号: H03B1/00

    CPC分类号: H03K17/145 H03K2217/0063

    摘要: A driver circuit is provided that receives an ON or OFF logic control signal and further has: an output arranged to be connected to a load; a power switch, having a control terminal with a first current terminal connected to a first power supply and a second current terminal arranged to be connected to the output to drive the load; a control circuit of a first type arranged between the control terminal of the power switch and a second power supply; and a control circuit of a second type, arranged to couple the control terminal of the power switch to the first power supply when the control signal is in the OFF state.

    摘要翻译: 提供一种驱动器电路,其接收ON或OFF逻辑控制信号,并且还具有:布置成连接到负载的输出; 电源开关,具有连接到第一电源的第一电流端子的控制端子和布置成连接到输出端以驱动负载的第二电流端子; 布置在电源开关的控制端子和第二电源之间的第一类型的控制电路; 以及第二类型的控制电路,被布置成当控制信号处于OFF状态时将电源开关的控制端耦合到第一电源。

    High side driver circuit
    2.
    发明授权
    High side driver circuit 有权
    高侧驱动电路

    公开(公告)号:US08847630B2

    公开(公告)日:2014-09-30

    申请号:US13284395

    申请日:2011-10-28

    IPC分类号: H03K3/00 H03K17/14

    CPC分类号: H03K17/145 H03K2217/0063

    摘要: A driver circuit is provided that receives an ON or OFF logic control signal and further has: an output arranged to be connected to a load; a power switch, having a control terminal with a first current terminal connected to a first power supply and a second current terminal arranged to be connected to the output to drive the load; a control circuit of a first type arranged between the control terminal of the power switch and a second power supply; and a control circuit of a second type, arranged to couple the control terminal of the power switch to the first power supply when the control signal is in the OFF state.

    摘要翻译: 提供一种驱动器电路,其接收ON或OFF逻辑控制信号,并且还具有:布置成连接到负载的输出; 电源开关,具有连接到第一电源的第一电流端子的控制端子和布置成连接到输出端以驱动负载的第二电流端子; 布置在电源开关的控制端子和第二电源之间的第一类型的控制电路; 以及第二类型的控制电路,被布置成当控制信号处于OFF状态时将电源开关的控制端耦合到第一电源。

    CHARGING CIRCUIT, AN INDUCTIVE LOAD CONTROL CIRCUIT, AN INTERNAL COMBUSTION ENGINE, A VEHICLE AND A METHOD OF CHARGING A BOOTSTRAP STORAGE ELEMENT
    3.
    发明申请
    CHARGING CIRCUIT, AN INDUCTIVE LOAD CONTROL CIRCUIT, AN INTERNAL COMBUSTION ENGINE, A VEHICLE AND A METHOD OF CHARGING A BOOTSTRAP STORAGE ELEMENT 审中-公开
    充电电路,电感负载控制电路,内燃机,汽车和充电器的存储方法

    公开(公告)号:US20150188328A1

    公开(公告)日:2015-07-02

    申请号:US14423481

    申请日:2012-09-12

    IPC分类号: H02J7/00 H02M3/158 F02M51/06

    摘要: A charging circuit for a bootstrap capacitor comprises a P MOSFET having a body diode and an N channel power MOSFET also having a body diode. The drain of the P MOSFET is coupled to the source of the N channel power MOSFET, and the source of the P MOSFET receives current from a vehicle's battery. The gate of the P MOSFET receives a control signal for turning the P MOSFET either on or off and the drain of the N channel power MOSFET is connected to a bootstrap capacitor The P MOSFET's body diode prevents current flow from the battery to the bootstrap capacitor when the P MOSFET is turned off and the N MOSFET's body diode prevents current flow from the bootstrap capacitor to the battery when the N MOSFET is turned off. The use of a power MOSFET device with its low ON resistance ensures that the capacitor is charged to a sufficiently high voltage even under low battery conditions.

    摘要翻译: 用于自举电容器的充电电路包括具有体二极管的P MOSFET和还具有体二极管的N沟道功率MOSFET。 P MOSFET的漏极耦合到N沟道功率MOSFET的源极,P MOSFET的源极接收来自车辆电池的电流。 P MOSFET的栅极接收用于使P MOSFET导通或关断的控制信号,并且N沟道功率MOSFET的漏极连接到自举电容器P MOSFET的体二极管防止电流从电池流向自举电容器 当N MOSFET关闭时,P MOSFET关闭,N MOSFET的体二极管防止电流从自举电容流向电池。 使用具有低导通电阻的功率MOSFET器件,即使在低电量条件下也能将电容充电至足够高的电压。

    Apparatus and method for providing a clock signal
    4.
    发明授权
    Apparatus and method for providing a clock signal 有权
    用于提供时钟信号的装置和方法

    公开(公告)号:US07936200B2

    公开(公告)日:2011-05-03

    申请号:US12294799

    申请日:2007-01-08

    IPC分类号: G06F1/04

    CPC分类号: G01R29/0273 G06F1/24

    摘要: A clock circuit which may include a first clock input for receiving a first clock signal and a second clock input for receiving a second clock signal. A clock calibration unit is connected to the first clock input and the second clock input. The calibration unit may calibrate the second clock signal relative to the first clock signal. The clock calibration unit may have a calibration output for outputting a calibrated clock signal. The clock circuit may include a switch unit connected to the first clock input and the calibration output. The switch unit can select a selected clock signal selected from the first clock signal and the calibrated signal. The switch unit has a switch output for outputting the selected clock signal. A switch control unit is connected to the switch unit for controlling which signal is selected based on a selection criterion and a clock circuit output is connected to the switch unit for outputting the selected clock signal.

    摘要翻译: 时钟电路,其可以包括用于接收第一时钟信号的第一时钟输入和用于接收第二时钟信号的第二时钟输入。 时钟校准单元连接到第一个时钟输入和第二个时钟输入。 校准单元可以相对于第一时钟信号校准第二时钟信号。 时钟校准单元可以具有用于输出校准时钟信号的校准输出。 时钟电路可以包括连接到第一时钟输入和校准输出的开关单元。 开关单元可以选择从第一时钟信号和校准信号中选择的所选择的时钟信号。 开关单元具有用于输出所选择的时钟信号的开关输出。 开关控制单元连接到开关单元,用于基于选择标准控制哪个信号被选择,并且时钟电路输出连接到开关单元以输出所选择的时钟信号。

    APPARATUS AND METHOD FOR PROVIDING A CLOCK SIGNAL
    5.
    发明申请
    APPARATUS AND METHOD FOR PROVIDING A CLOCK SIGNAL 有权
    提供时钟信号的装置和方法

    公开(公告)号:US20100244902A1

    公开(公告)日:2010-09-30

    申请号:US12294799

    申请日:2007-01-08

    IPC分类号: G06F1/04

    CPC分类号: G01R29/0273 G06F1/24

    摘要: A clock circuit which may include a first clock input for receiving a first clock signal and a second clock input for receiving a second clock signal. A clock calibration unit is connected to the first clock input and the second clock input. The calibration unit may calibrate the second clock signal relative to the first clock signal. The clock calibration unit may have a calibration output for outputting a calibrated clock signal. The clock circuit may include a switch unit connected to the first clock input and the calibration output. The switch unit can select a selected clock signal selected from the first clock signal and the calibrated signal. The switch unit has a switch output for outputting the selected clock signal. A switch control unit is connected to the switch unit for controlling which signal is selected based on a selection criterion and a clock circuit output is connected to the switch unit for outputting the selected clock signal.

    摘要翻译: 时钟电路,其可以包括用于接收第一时钟信号的第一时钟输入和用于接收第二时钟信号的第二时钟输入。 时钟校准单元连接到第一个时钟输入和第二个时钟输入。 校准单元可以相对于第一时钟信号校准第二时钟信号。 时钟校准单元可以具有用于输出校准时钟信号的校准输出。 时钟电路可以包括连接到第一时钟输入和校准输出的开关单元。 开关单元可以选择从第一时钟信号和校准信号中选择的所选择的时钟信号。 开关单元具有用于输出所选择的时钟信号的开关输出。 开关控制单元连接到开关单元,用于基于选择标准控制哪个信号被选择,并且时钟电路输出连接到开关单元以输出所选择的时钟信号。

    SYSTEM AND METHOD TO IMPROVE SWITCHING IN POWER SWITCHING APPLICATIONS
    6.
    发明申请
    SYSTEM AND METHOD TO IMPROVE SWITCHING IN POWER SWITCHING APPLICATIONS 有权
    电力开关应用中改进开关的系统及方法

    公开(公告)号:US20100244714A1

    公开(公告)日:2010-09-30

    申请号:US12742103

    申请日:2007-11-13

    IPC分类号: H05B37/02 H03H11/26

    摘要: A circuit for improving the control of a change in state of a signal in an electronic device between a first state and a second state, wherein a first change in state occurs when the state changes from the second state to the first state and a second change in state occurs when the state changes from the first state to the second state and wherein the first and second changes in state have associated therewith a first and a second time delay over which the or each change in state occurs, characterized in that said circuit comprises a determining unit for measuring the first time delay and a calculator for calculating a common delay to replace one or more of the first and second delays to thereby improve the control of the change in state of the signal

    摘要翻译: 一种用于改善在第一状态和第二状态之间对电子设备中的信号状态变化的控制的电路,其中当状态从第二状态变为第一状态时发生第一状态变化,并且第二变化 当状态从第一状态改变到第二状态时,发生状态,并且其中第一和第二状态改变已经与第一和第二时间延迟相关联,其中状态或每种状态发生变化,其特征在于,所述电路包括 用于测量第一时间延迟的确定单元和用于计算用于替换第一和第二延迟中的一个或多个的公共延迟的计算器,从而改善信号状态变化的控制

    PACKAGED SEMICONDUCTOR DEVICE, A SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING A PACKAGED SEMICONDUCTOR DEVICE
    8.
    发明申请
    PACKAGED SEMICONDUCTOR DEVICE, A SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING A PACKAGED SEMICONDUCTOR DEVICE 有权
    包装半导体器件,半导体器件和制造包装半导体器件的方法

    公开(公告)号:US20150129928A1

    公开(公告)日:2015-05-14

    申请号:US14401132

    申请日:2012-05-30

    IPC分类号: H01L23/60 H01L29/74

    摘要: A packaged semiconductor device comprising a package and a semiconductor device is described. The semiconductor device comprises a first and a second GND-pad bonded to one or more GND-pins with a first and a second bond wire respectively, a first functional pad bonded to a first functional pin with a third bond wire, a semiconductor layer of a P-type conductivity, a first semiconductor component and a second semiconductor component. The first semiconductor component is arranged to, when a transient current is applied to the first functional pin, divert at least part of the transient current to the first GND-pad from the first P-region to the first GND-pad via at least a first PN-junction. The second semiconductor component comprises a second N-type region of a terminal of the second semiconductor component associated with the first functional pad. The first GND-pad is in contact with a second P-type region. The second GND-pad is in contact with a third N-type region. At least part of the second P-type region is arranged in between the first semiconductor component and the second semiconductor component, and at least part of the third N-type region is arranged in between the at least part of the first P-type region and the second semiconductor component.

    摘要翻译: 描述了包括封装和半导体器件的封装半导体器件。 半导体器件包括分别与第一和第二接合线接合到一个或多个GND引脚的第一和第二GND焊盘,用第三接合线接合到第一功能引脚的第一功能焊盘,半导体层 P型导电性,第一半导体元件和第二半导体元件。 第一半导体部件被布置成当瞬态电流被施加到第一功能引脚时,至少一部分瞬态电流从第一P区转移到第一GND焊盘,至少一个 第一PN结。 第二半导体部件包括与第一功能焊盘相关联的第二半导体部件的端子的第二N型区域。 第一GND焊盘与第二P型区域接触。 第二GND焊盘与第三N型区域接触。 第二P型区域的至少一部分配置在第一半导体部件和第二半导体部件之间,第三N型区域的至少一部分配置在第一P型区域的至少一部分之间 和第二半导体部件。

    Apparatus and a method for detecting faults in the delivery of electrical power to electrical loads
    9.
    发明授权
    Apparatus and a method for detecting faults in the delivery of electrical power to electrical loads 有权
    用于检测向电负载传递电力的故障的装置和方法

    公开(公告)号:US08598886B2

    公开(公告)日:2013-12-03

    申请号:US12920600

    申请日:2008-03-20

    IPC分类号: G01R31/08

    摘要: Apparatus for detecting faults in the delivery of electrical power to electrical loads, includes a plurality of load electrical connections arranged to deliver electrical power from an electrical power source to each of a plurality of electrical loads, a plurality of electrical switches, each connected to an associated one of the load connections, and a diagnostic device operable to detect a short circuit fault in the apparatus, wherein the diagnostic device is operable to apply a diagnostic procedure to detect a short circuit connection between at least two of the load electrical connections and includes a control logic unit operable to apply to each of the electrical switches in turn a test control signal causing operation of the switch to apply a test electrical signal to each of the load electrical connections in turn; and detector means connected to the load electrical connections and operable, while the test electrical signal is applied in turn to each load electrical connection, to detect whether a corresponding electrical output is produced in response on any of the other load electrical connections. Also described is a method of operation in the apparatus.

    摘要翻译: 用于检测向电力负载递送电力中的故障的装置包括多个负载电连接,其被布置为将电力从电源传送到多个电负载中的每一个,多个电开关,每个电连接到 相关联的负载连接之一,以及可操作以检测装置中的短路故障的诊断装置,其中诊断装置可操作以应用诊断程序来检测至少两个负载电连接之间的短路连接,并且包括 控制逻辑单元,可操作以依次向每个电开关施加测试控制信号,使得开关的操作依次对每个负载电连接施加测试电信号; 以及检测器装置,其连接到负载电连接并且可操作,同时将测试电信号依次施加到每个负载电连接,以检测在任何其它负载电连接上是否响应地产生相应的电输出。 还描述了该装置中的操作方法。