公开(公告)号：US5297077A

公开(公告)日：1994-03-22

申请号：US676546

申请日：1991-03-28

申请人： Motomasa Imai ,  Hiroshi Toyoda ,  Kazuhide Abe ,  Koji Yamakawa ,  Hisakazu Iizuka ,  Mitsuo Harata ,  Koji Sakui

发明人： Motomasa Imai ,  Hiroshi Toyoda ,  Kazuhide Abe ,  Koji Yamakawa ,  Hisakazu Iizuka ,  Mitsuo Harata ,  Koji Sakui

IPC分类号： G11C11/22 ,  G11C14/00

CPC分类号： G11C14/00 ,  G11C11/22

摘要： A semiconductor memory device comprises a ferroelectric capacitor, a voltage output circuit for outputting a first voltage for reversely polarizing the ferroelectric capacitor and a second voltage by which the polarization of the ferroelectric capacitor is not reversed, regardless of data stored in the ferroelectric capacitor, a first reference capacitor having a such a capacitance as to accumulate less charge than charge which the ferroelectric capacitor accumulates, when the second voltage is applied to the ferroelectric capacitor, a second reference capacitor having such a capacitance that as to accumulate greater charge than the charge which the ferroelectric capacitor accumulates while the ferroelectric capacitor is forwardly polarized, when the first voltage is applied to the ferroelectric capacitor, thus reversely polarizing the ferroelectric capacitor, a sense amplifier connected to the ferroelectric capacitor and the first or second reference capacitor, a reference-capacitor selecting circuit for connecting the first reference capacitor to the sense amplifier when the voltage output circuit outputs the second voltage, and connecting the second reference capacitor to the sense amplifier while the voltage output circuit outputs the first voltage, and a circuit for determining data from the presence or absence of an electric charge in the ferroelectric capacitors while the memory is set in volatile mode, and for determining data from the direction in which the ferroelectric capacitor is polarized, while the memory is set in nonvolatile mode.

摘要翻译： 半导体存储器件包括铁电电容器，用于输出用于使强电介质电容器反向极化的第一电压的电压输出电路和强电介质电容器的极化不反转的第二电压，而与铁电电容器中存储的数据无关 第一参考电容器具有这样的电容，即当第二电压被施加到铁电电容器时，积累比铁电电容器累积的电荷少的电荷，第二参考电容器具有这样的电容，以便积累比电荷更大的电荷 当铁电电容器向前偏振时，铁电电容器累积，当第一电压施加到铁电电容器时，从而使铁电电容器反向极化，连接到铁电电容器和第一或第二参考电容器的读出放大器，参考电容器 s 选择电路，用于当电压输出电路输出第二电压时将第一参考电容器连接到读出放大器，并且在电压输出电路输出第一电压时将第二参考电容器连接到读出放大器;以及电路，用于从 当存储器被设置为易失性模式时，铁电电容器中存在或不存在电荷，并且用于从存储器设置为非易失性模式时从铁电电容器被极化的方向确定数据。

公开(公告)号：US5155573A

公开(公告)日：1992-10-13

申请号：US633324

申请日：1990-12-24

申请人： Kazuhide Abe ,  Hiroshi Toyoda ,  Koji Yamakawa ,  Motomasa Imai ,  Mitsuo Harata ,  Koji Sakui

发明人： Kazuhide Abe ,  Hiroshi Toyoda ,  Koji Yamakawa ,  Motomasa Imai ,  Mitsuo Harata ,  Koji Sakui

IPC分类号： H01L21/02 ,  H01L21/8246 ,  H01L27/115 ,  H01L29/92

CPC分类号： H01L27/11502 ,  H01L27/11507 ,  H01L28/60

摘要： A ferroelectric capacitor includes a ferroelectric layer consisting of lead zirconate titanate formed on a silicon substrate, a plurality of rectangular trenches formed in the direction of thickness of the ferroelectric layer with a ferroelectric material therebetween, and first and second electrodes consisting of metal tungsten buried in the trenches to oppose each other with the ferroelectric material therebetween.

摘要翻译： 铁电电容器包括由在硅衬底上形成的锆钛酸铅构成的铁电层，在其间具有铁电体的铁电层的厚度方向上形成的多个矩形沟槽，以及埋入金属钨的第一和第二电极 沟槽之间用铁电材料彼此相对。

公开(公告)号：US5517445A

公开(公告)日：1996-05-14

申请号：US784073

申请日：1991-10-30

申请人： Motomasa Imai ,  Kazuhide Abe ,  Koji Yamakawa ,  Hiroshi Toyoda ,  Yoshiko Kohanawa ,  Mitsuo Harata

发明人： Motomasa Imai ,  Kazuhide Abe ,  Koji Yamakawa ,  Hiroshi Toyoda ,  Yoshiko Kohanawa ,  Mitsuo Harata

IPC分类号： G11C11/22 ,  G11C17/04

CPC分类号： G11C11/22

摘要： A non-volatile semiconductor memory device, includes a memory cell having a capacitor formed by stacking a semiconductor layer and a ferroelectric layer between a pair of electrodes, the semiconductor layer and the ferroelectric layer forming a semiconductor-ferroelectric junction, a writing circuit in which a voltage higher than a coercive electric field of the ferroelectric material is applied to the capacitor of the memory cell to align a polarization direction of the ferroelectric layer in a predetermined direction so as to set a capacitance of the capacitor at a predetermined value, thereby writing data corresponding to the predetermined value of the capacitance, and a reading circuit in which a voltage less than the coercive electric field of the ferroelectric layer is applied to the capacitor of the memory cell in which the data is written, thereby reading the data.

摘要翻译： 一种非易失性半导体存储器件，包括具有电容器的存储单元，所述电容器通过在一对电极之间堆叠半导体层和铁电层而形成，所述半导体层和形成半导体 - 铁电结的铁电层，其中写入电路 将高于铁电材料的矫顽电场的电压施加到存储单元的电容器，以将铁电层的偏振方向沿预定方向对齐，以将电容器的电容设置在预定值，从而写入 对应于电容的预定值的数据，以及读取电路，其中将低于铁电层的矫顽电场的电压施加到其中写入数据的存储单元的电容器，从而读取数据。

公开(公告)号：US5400275A

公开(公告)日：1995-03-21

申请号：US712092

申请日：1991-06-07

申请人： Kazuhide Abe ,  Hiroshi Toyoda ,  Koji Yamakawa ,  Motomasa Imai ,  Koji Sakui

发明人： Kazuhide Abe ,  Hiroshi Toyoda ,  Koji Yamakawa ,  Motomasa Imai ,  Koji Sakui

IPC分类号： G11C11/22 ,  H01L27/115 ,  G11C7/00

CPC分类号： H01L27/11502 ,  G11C11/22

摘要： A semiconductor memory device comprises a plurality of memory cells arranged in the form of a matrix to constitute rows-and columns, a plurality of first driving lines, connected to the memory cells, for transmitting a first driving signal to the memory cells, one of the plurality of first driving lines being selected by a row address, a plurality of second driving lines, connected to the memory cells, for transmitting a second driving signal to the memory cells, one of the plurality of second driving lines being selected by a column address, a plurality of read/write lines, connected to the memory cells, for performing read/write operations with respect to the memory cells, and a plurality of sense amplifiers connected to the read/ write lines, wherein one of the plurality of sense amplifiers is selected by the column address, and the memory cells in the same column are connected to the same sense amplifier through the read/write lines.

摘要翻译： 一种半导体存储器件包括以矩阵形式布置以构成行和列的多个存储器单元，连接到存储器单元的多条第一驱动线，用于将第一驱动信号发送到存储器单元，其中之一 所述多个第一驱动线由行地址选择，多个第二驱动线连接到所述存储单元，用于将第二驱动信号发送到所述存储单元，所述多个第二驱动线中的一个由列选择 连接到存储器单元的多个读/写线，用于对存储单元执行读/写操作，以及连接到读/写线的多个读出放大器，其中多个感测中的一个 放大器由列地址选择，同一列中的存储单元通过读/写线连接到相同的读出放大器。

公开(公告)号：US4767732A

公开(公告)日：1988-08-30

申请号：US90605

申请日：1987-08-28

申请人： Osamu Furukawa ,  Seiichi Yoshida ,  Motomasa Imai ,  Mitsuo Harata

发明人： Osamu Furukawa ,  Seiichi Yoshida ,  Motomasa Imai ,  Mitsuo Harata

IPC分类号： C04B35/46 ,  C04B35/45 ,  C04B35/468 ,  C04B35/472 ,  H01G4/12

CPC分类号： C04B35/4684 ,  C04B35/472 ,  H01G4/1227 ,  H01G4/1254

摘要： To obtain a ceramic material having a high dielectric constant (K=2300 to 7000), a high insulation resistance (CR=4000 to 18000 ohmF), a low temperature dependence (.+-.10%) to (.+-.22, -33%) upon dielectric constant over a wide temperature range (-55 and +125.degree. C.) and a relatively low sintering temperature (1000.degree. C. to 1250.degree. C.), BaTiO.sub.3 powder at least 50 wt % of which is 0.7 to 3 .mu.m in particle size) is mixed with another compound with perovskite structure mainly composed of oxides of Pb, Ba, Sr, Zn, Nb, Mg and Ti before sintering. Further, part of Ti of BaTiO.sub.3 is substitutable with Zr or Sn, and part of Ba of BaTiO.sub.3 is substitutable with Sr, Ca or Ce.

摘要翻译： 为了获得具有高介电常数（K = 2300〜7000）的陶瓷材料，高绝缘电阻（CR = 4000〜18000ohmF），低温度依赖性（+/- 10％）〜（+/- 22， 33％）在较宽的温度范围（-55和+ 125℃）和相对低的烧结温度（1000℃至1250℃）下的介电常数，至少50重量％的BaTiO 3粉末为0.7 至3μm的粒径）与烧结前主要由Pb，Ba，Sr，Zn，Nb，Mg，Ti的氧化物构成的钙钛矿结构的其他化合物混合。 此外，BaTiO3的Ti的一部分可以用Zr或Sn代替，BaTiO3的Ba的一部分可以用Sr，Ca或Ce代替。

公开(公告)号：US4882652A

公开(公告)日：1989-11-21

申请号：US115908

申请日：1987-11-02

申请人： Osamu Furukawa ,  Mitsuo Harata ,  Takaaki Yasumoto ,  Motomasa Imai

发明人： Osamu Furukawa ,  Mitsuo Harata ,  Takaaki Yasumoto ,  Motomasa Imai

IPC分类号： H01G4/12 ,  C04B35/00 ,  C04B35/46 ,  C04B35/499 ,  H01B3/12

CPC分类号： C04B35/499

摘要： When a portion of the Pb of a Pb(Zn.sub.1/3 Nb.sub.2/3)O.sub.3 -based ceramic composition within the region bounded by lines connecting a, b, c, d, e and f points in the ternary composition diagram of the accompanying FIG. 1 is substituted by a small amount of Ca, a high dielectric constant type ceramic composition is obtained which has a small temperature coefficient of dielectric constant and which is effective as a material for multilayer ceramic capacitors.

摘要翻译： 当Pb（Zn1 / 3Nb2 / 3）O3系陶瓷组合物的Pb的一部分在连接a，b，c，d，e和f的线所界定的区域内时，在图3的三元组成图中指出。 1被少量的Ca代替，获得了介电常数较小温度系数高的介电常数型陶瓷组合物，作为多层陶瓷电容器的材料是有效的。

公开(公告)号：US4701767A

公开(公告)日：1987-10-20

申请号：US870898

申请日：1986-06-05

申请人： Motomasa Imai ,  Mitsuo Harata ,  Takashi Takahashi ,  Kazuo Nishijima

发明人： Motomasa Imai ,  Mitsuo Harata ,  Takashi Takahashi ,  Kazuo Nishijima

IPC分类号： G03G15/05 ,  B41J2/395 ,  G03G19/00 ,  G01D15/12

CPC分类号： G03G19/00

摘要： A method is disclosed which manufactures a recording head adapted to be moved relative to a recording medium, which is comprised of a conductive substrate and dielectric layer formed on the conductive substrate, to permit data to be recorded on the recording medium with the use of a conductive/magnetic toner on the recording medium. A conductive/magnetic sheet is attached to an insulating substrate of a first size with an adhesive layer therebetween, the first size of the insulating substrate is greater than a second size thereof defined by an insulating substrate of a finally completed recording head. The conductive/magnetic sheet is selectively etched to form an array of slits at a predetermined interval with both ends of the slits located beyond the side edges of an insulating substrate of a finally completed recording head. At one side edge portion of the conductive/magnetic sheet the conductive/magnetic sheet is electroplated to form a plated layer for a bonding pad. Those areas of the conductive/magnetic sheet, plated layer and insulating substrate, which are located beyond the side edge of the insulating substrate of the finally completed recording head, are cut to form a parallel array of electrodes and a bonding pad on one side edge portion of the conductive/magnetic electrodes.

摘要翻译： 公开了一种制造适于相对于记录介质移动的记录头的方法，该记录介质由形成在导电基底上的导电基底和电介质层组成，以便使用数据记录在记录介质上 导电/磁性调色剂在记录介质上。 将导电/磁性薄片附着在第一尺寸的绝缘基板上，其间具有粘合剂层，绝缘基板的第一尺寸大于由最终完成的记录头的绝缘基板限定的第二尺寸。 选择性地蚀刻导电/磁性薄片以形成狭缝阵列，以预定的间隔，狭缝的两端位于最终完成的记录头的绝缘基底的侧边缘之外。 在导电/磁性片的一个侧边缘部分，电导/磁性片被电镀以形成用于焊盘的镀层。 将位于超过最终完成的记录头的绝缘衬底的侧边缘的导电/磁性片，镀层和绝缘衬底的那些区域切割成在一个侧边缘上形成平行的电极阵列和焊盘 部分导电/磁极。

公开(公告)号：US5373129A

公开(公告)日：1994-12-13

申请号：US28284

申请日：1993-03-09

申请人： Naoki Shutoh ,  Motomasa Imai ,  Fumio Ueno

发明人： Naoki Shutoh ,  Motomasa Imai ,  Fumio Ueno

IPC分类号： H01C7/10 ,  H01H33/16

CPC分类号： H01C7/10 ,  H01H33/165

摘要： A compact power circuit breaker having a large breaking capacity and stable breaking performance by using a compact closing resistor unit having high performance. The power circuit breaker includes a main switch arranged in a current path, an auxiliary switch connected to the current path parallel with respect to the main switch and turned on prior to an ON state of the main switch, and a closing resistor unit connected in series with the auxiliary switch and incorporated with a resistor having a sintered body consisting of a Zn--Ti--Co--O--based oxide and having metal components consisting of titanium calculated as titanium oxide (TiO.sub.2) in an amount of 0.5 to 25 mol %, cobalt calculated as cobalt oxide (CoO) in an amount of 0.5 to 30 mol %, and Zn as substantially the balance.

摘要翻译： 通过使用具有高性能的紧凑型闭合电阻器单元，具有大的分断能力和稳定的断开性能的紧凑型电力断路器。 电源断路器包括布置在电流路径中的主开关，辅助开关连接到电流路径，相对于主开关并联并在主开关的导通状态之前导通，以及闭合电阻器单元串联连接 与辅助开关一起并入具有由Zn-Ti-Co-O系氧化物构成的烧结体的电阻体，并具有以氧化钛（TiO 2）计为0.5〜25摩尔％的由钛构成的金属成分， 作为氧化钴（CoO）计算的钴的量为0.5〜30摩尔％，Zn为大致余量。

公开(公告)号：US4516105A

公开(公告)日：1985-05-07

申请号：US395278

申请日：1982-07-06

申请人： Motomasa Imai ,  Takashi Takahashi ,  Osamu Furukawa ,  Hideyuki Kanai

发明人： Motomasa Imai ,  Takashi Takahashi ,  Osamu Furukawa ,  Hideyuki Kanai

IPC分类号： H01C7/10 ,  C04B35/453 ,  H01C7/112 ,  C04B35/00

CPC分类号： H01C7/112

摘要： Disclosed is a metal oxide varistor which comprises; a sintered body containing (a) ZnO as a principal component, and (b), as auxiliary components, Bi, Co and Mn in amounts of 0.05.about.2 mole %, 0.05.about.2 mole % and 0.05.about.2 mole %, when calculated in terms of Bi.sub.2 O.sub.3, Co.sub.2 O.sub.3 and MnO.sub.2, respectively, and at least one selected from Al, In and Ga in amounts of 1.times.10.sup.-4 .about.3.times.10.sup.-2 mole %, when calculated in terms of Al.sub.2 O.sub.3, In.sub.2 O.sub.3 and Ga.sub.2 O.sub.3, respectively; said sintered material having been reheated at a temperature of 650.degree..about.900.degree. C. after sintering; and a non-diffusible electrode provided on said sintered body. The metal oxide varistor has excellent pulse response and volt-ampere non-linearity even with respect to a pulse having a short rise time of less than a microsecond.

摘要翻译： 公开了一种金属氧化物变阻器，其包括： 含有（a）ZnO作为主要成分的烧结体，和（b）作为辅助成分的Bi，Co和Mn，其量为0.05DIFFERENCE 2摩尔％，0.05差异2摩尔％和0.05差异2摩尔％，当计算 分别以Bi 2 O 3，Co 2 O 3和MnO 2为单位，以Al 2 O 3，In 2 O 3和Ga 2 O 3计算，选自Al，In和Ga中的至少1种为1×10 -4 DIFFERENCE 3×10 -2摩尔％ 所述烧结材料在烧结后在650℃的温度下再加热; 以及设置在所述烧结体上的非扩散电极。 金属氧化物变阻器即使对于具有小于一微秒的短上升时间的脉冲也具有优异的脉冲响应和伏安非线性。

公开(公告)号：US5629666A

公开(公告)日：1997-05-13

申请号：US445725

申请日：1995-05-22

申请人： Motomasa Imai ,  Naoki Shutoh ,  Fumio Ueno

发明人： Motomasa Imai ,  Naoki Shutoh ,  Fumio Ueno

IPC分类号： H01C7/108 ,  H01C7/10

CPC分类号： H01C7/108

摘要： Disclosed is a power resistor which has a large heat capacity per unit volume and an appropriate and stable electrical resistance, and in which the resistance changes little with time due to surge absorption. This power resistor includes a sintered body containing aluminum oxide and carbon, and a pair of electrodes formed on the two opposing surfaces of the sintered body. This sintered body consists of first regions containing a small amount of carbon or not containing carbon and second regions containing a larger amount of carbon than in the first regions and so arranged as to be connected to the electrodes.

摘要翻译： 公开了一种功率电阻器，其具有每单位体积的大的热容量和适当且稳定的电阻，并且由于浪涌吸收，电阻随时间变化很小。 该功率电阻器包括含有氧化铝和碳的烧结体以及形成在烧结体的两个相对表面上的一对电极。 该烧结体由含有少量碳或不含碳的第一区域和包含比第一区域中的碳含量更大的第二区域组成，并且被布置为连接到电极。