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公开(公告)号：US12131871B2
公开(公告)日：2024-10-29
申请号：US17412410
申请日：2021-08-26
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Yasuhiro Tamatani , Kazuya Kusuda , Takeshi Furukawa
IPC: H01G4/38 , H01G4/012 , H01G4/224 , H01G4/232 , H01G4/248 , H01G4/30 , B01D1/26 , B05D1/32 , B05D5/12
CPC classification number: H01G4/385 , H01G4/012 , H01G4/224 , H01G4/2325 , H01G4/248 , H01G4/30 , B01D1/26 , B05D1/32 , B05D5/12
Abstract: An electronic component that includes an electronic component body including a first internal electrode exposed at a first end surface and a second internal electrode exposed at a second end surface; a first external electrode on the first end surface and a bottom surface of the electronic component body; and a second external electrode on the second end surface and the bottom surface of the electronic component body, wherein the first external electrode comprises a first end surface electrode and a first bottom surface electrode that are integrated, and a thickness of the first end surface electrode is smaller than a thickness of the first bottom surface electrode, and the second external electrode comprises a second end surface electrode and a second bottom surface electrode that are integrated, and a thickness of the second end surface electrode is smaller than a thickness of the second bottom surface electrode.
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公开(公告)号：US11437198B2
公开(公告)日：2022-09-06
申请号：US16953546
申请日：2020-11-20
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Takeshi Furukawa , Katsutomo Aritomi , Koji Fujimoto
Abstract: A solid electrolytic capacitor that includes a multilayer body element having a number of first layers that are laminated together, the multilayer body element having first and second main surfaces that oppose each other in a lamination direction, first and second side surface that oppose each other in a width direction, and first and second end surfaces that oppose each other in a length direction; a sealing portion covering the first and the second main surfaces and the first and the second side surfaces, wherein in the first layers, a cutting region is formed at an end of the multilayer body element on a side of the second end surface and a sealing portion filled with a sealing material in the cutting region is exposed at the second end surface.
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公开(公告)号：US11244790B2
公开(公告)日：2022-02-08
申请号：US16819804
申请日：2020-03-16
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Kazutoyo Horio , Takeshi Furukawa
Abstract: A solid electrolytic capacitor that includes an element laminate having a first end face and a second end face, a first external electrode on the first end face, and a second external electrode on the second end face. In the element laminate, a first layer and a second layer are stacked. The first layer has a valve-action metal substrate, a dielectric layer on a surface thereof, and a solid electrolyte layer on the dielectric layer. The second layer contains a metal foil. The first layer and the second layer are bonded by an adhesive layer containing a conductive adhesive layer and an insulating adhesive layer that surrounds an outer perimeter of the conductive adhesive layer. The adhesive layer includes a notched part that extends from the first end face or the second end face to the conductive adhesive layer.
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公开(公告)号：US11121123B2
公开(公告)日：2021-09-14
申请号：US16907557
申请日：2020-06-22
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Koshi Himeda , Tatsuya Kitamura , Chiharu Sakaki , Shinya Kiyono , Sho Fujita , Atsushi Yamamoto , Takeshi Furukawa , Kenji Nishiyama , Tatsuya Funaki , Kinya Aoki
IPC: H05K3/46 , H01L25/16 , H01L21/48 , H01L23/498 , H02M3/00
Abstract: A semiconductor composite device is provided that includes a voltage regulator, a package board, and a load, and converts an input DC voltage into a different DC voltage to supply the converted DC voltage to the load. The VR includes a semiconductor active element. The package board includes a C layer in which a capacitor is formed, and an L layer in which an inductor is formed. A plurality of through holes penetrate the C layer and the L layer in a direction perpendicular to the mounting face in the package board. The capacitor is connected to the load through the through hole. The inductor is connected to the load through the through hole and to the VR through the through hole.
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公开(公告)号：US12237118B2
公开(公告)日：2025-02-25
申请号：US18306554
申请日：2023-04-25
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Takeshi Furukawa
Abstract: A solid electrolytic capacitor element that includes: an anode plate having a first main surface and a second main surface which oppose each other in a thickness direction thereof, and made of a valve-action metal; a porous layer on at least one main surface of the anode plate; a dielectric layer on a surface of the porous layer; a cathode layer including a solid electrolyte layer on a surface of the dielectric layer; and a stress relaxation layer, wherein in a plan view of the first main surface, at least a portion of the stress relaxation layer overlaps with the anode plate, and the portion of the stress relaxation layer does not overlap with the cathode layer.
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Patent Agency Ranking
公开(公告)号：US11469053B2
公开(公告)日：2022-10-11
申请号：US17108015
申请日：2020-12-01
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Takeshi Furukawa , Misato Miyake
Abstract: A capacitor array that includes a plurality of solid electrolytic capacitor elements each of which has a first main surface and a second main surface facing each other in a thickness direction and includes an anode plate made of a valve action metal, a porous layer on at least one surface of the anode plate, a dielectric layer on a surface of the porous layer, and a cathode layer on a surface of the dielectric layer and including a solid electrolyte layer; a first sealing layer in a sheet-like shape and covering the first main surface of the plurality of solid electrolytic capacitor elements; and a second sealing layer in a sheet-like shape and covering the second main surface of the plurality of solid electrolytic capacitor elements.
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公开(公告)号：US11355289B2
公开(公告)日：2022-06-07
申请号：US17014263
申请日：2020-09-08
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Takeshi Furukawa
Abstract: A solid electrolytic capacitor that includes: a capacitor element having a valve action metal base with a core portion, a first porous portion and a second porous portion, a first dielectric layer on the first porous portion, a first solid electrolyte layer on the first dielectric layer, a first conductor layer on the first solid electrolyte layer, a second dielectric layer on the second porous portion, and a second solid electrolyte layer on the second dielectric layer, the first dielectric layer and the first solid electrolyte layer constituting a first capacitance portion, and the second dielectric layer and the second solid electrolyte layer constituting a second capacitance portion; a cathode through electrode electrically connecting the first capacitance portion to a cathode external electrode; and a connection portion connecting the second capacitance portion to the first capacitance portion.
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公开(公告)号：US11011318B2
公开(公告)日：2021-05-18
申请号：US16371620
申请日：2019-04-01
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Takeshi Furukawa
Abstract: A solid electrolytic capacitor comprises a capacitor element including a valve-acting metal substrate including a core part and a porous part disposed on at least one principal surface of the core part, a dielectric layer formed on a surface of the porous part and a solid electrolyte layer is disposed on the dielectric layer. The capacitor element further includes a conductive layer disposed on the solid electrolyte layer. A sealing resin is located on the conductive layer and seals a principal surface of the capacitor element. A cathodic outer electrode is located on the sealing resin and is electrically connected to the conductive layer by a cathodic via electrode which extends through the sealing resin. An anodic outer electrode is electrically connected to the core part.
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公开(公告)号：US10998139B2
公开(公告)日：2021-05-04
申请号：US16409032
申请日：2019-05-10
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Daisuke Obara , Takeo Arakawa , Takeshi Furukawa , Yuji Yokoyama , Yoshihiro Fujita , Masahiro Matsuo , Hideo Ito
Abstract: A solid electrolytic capacitor element that includes a porous body, a dielectric layer on a surface of the porous body, and a solid electrolyte layer on a surface of the dielectric layer. The porous body is made from a sintered body of a Ti-alloy-containing grain having a Ti—Zr—X multicomponent alloy on a surface thereof, where X is at least one valve metal element selected from Si, Hf, Y, Al, Mo, W, Ta, Nb, and V, and a composition of the Ti—Zr—X multicomponent alloy is Ti: 50 atm % to 80 atm %, Zr: 8 atm % to 32 atm %, and X: 1 atm % to 20 atm %.
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公开(公告)号：US20210082630A1
公开(公告)日：2021-03-18
申请号：US17108015
申请日：2020-12-01
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Takeshi Furukawa , Misato Miyake
Abstract: A capacitor array that includes a plurality of solid electrolytic capacitor elements each of which has a first main surface and a second main surface facing each other in a thickness direction and includes an anode plate made of a valve action metal, a porous layer on at least one surface of the anode plate, a dielectric layer on a surface of the porous layer, and a cathode layer on a surface of the dielectric layer and including a solid electrolyte layer; a first sealing layer in a sheet-like shape and covering the first main surface of the plurality of solid electrolytic capacitor elements; and a second sealing layer in a sheet-like shape and covering the second main surface of the plurality of solid electrolytic capacitor elements.
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