公开(公告)号：US20190172813A1

公开(公告)日：2019-06-06

申请号：US16321282

申请日：2017-05-15

Applicant: MITSUBISHI HEAVY INDUSTRIES MACHINE TOOL CO., LTD. ,  NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY

Inventor： Jun UTSUMI ,  Kensuke IDE ,  Takenori SUZUKI ,  Takayuki GOTO ,  Hideki TAKAGI ,  Yuuichi KURASHIMA

IPC: H01L23/00 ,  H01L21/263

Abstract: Provided is a substrate bonding method for bonding a first substrate (11) and a second substrate (12) by sputter-etching, the substrate bonding method comprising: an activation step in which the surface of a first substrate (11) is irradiated with a beam (2) of ion particles of a gas (1) such as Ar and sputter-etched to thereby deposit sputtered particles (Ms) from the first substrate (11) on the surface of a second substrate (12), the first substrate (11) comprising at least one among a semiconductor material, a compound semiconductor material, and a metal material; and a bonding step in which the surface of the second substrate (12), on which the sputtered particles (Ms) from the first substrate (11) are deposited, and the surface of the substrate (11), which is sputter-etched, are overlapped and bonded with each other.

公开(公告)号：US20150155165A1

公开(公告)日：2015-06-04

申请号：US14568159

申请日：2014-12-12

Applicant: SUMITOMO CHEMICAL COMPANY, LIMITED ,  NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY ,  HITACHI KOKUSAI ELECTRIC INC.

Inventor： Masahiko HATA ,  Takenori OSADA ,  Taketsugu YAMAMOTO ,  Takeshi AOKI ,  Tetsuji YASUDA ,  Tatsuro MAEDA ,  Eiko MIEDA ,  Hideki TAKAGI ,  Yuichi KURASHIMA ,  Yasuo KUNII ,  Toshiyuki KIKUCHI ,  Arito OGAWA

IPC: H01L21/02 ,  H01L29/16 ,  H01L29/20 ,  H01L21/306

CPC classification number: H01L21/02373 ,  H01L21/02002 ,  H01L21/02387 ,  H01L21/02546 ,  H01L21/2007 ,  H01L21/30604 ,  H01L21/84 ,  H01L29/0657 ,  H01L29/16 ,  H01L29/20 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of producing a composite wafer including a semiconductor crystal layer, includes forming a sacrificial layer and the semiconductor crystal layer above a semiconductor crystal layer forming wafer in the stated order, etching the semiconductor crystal layer to partially expose the sacrificial layer and dividing the semiconductor crystal layer into a plurality of divided pieces, bonding the semiconductor crystal layer forming wafer and a transfer target wafer made of an inorganic material in such a manner that a first surface of the semiconductor crystal layer forming wafer faces and comes into contact with a second surface of the transfer target wafer, and etching the sacrificial layer to separate the transfer target wafer and the semiconductor crystal layer forming wafer from each other with the semiconductor crystal layer being left on the transfer target wafer.

Abstract translation: 一种制造包括半导体晶体层的复合晶片的方法，包括按照所述顺序在半导体晶体层形成晶片之上形成牺牲层和半导体晶体层，蚀刻半导体晶体层以部分地暴露牺牲层并将半导体 晶体层分成多个分割片，将半导体晶体层形成晶片和由无机材料制成的转移目标晶片接合，使得半导体晶体层形成晶片的第一表面面对并与第二表面接触 的转印目标晶片，并且蚀刻牺牲层以将转印目标晶片和半导体晶体层形成晶片彼此分离，半导体晶体层留在转印目标晶片上。

公开(公告)号：US20240276626A1

公开(公告)日：2024-08-15

申请号：US18568770

申请日：2022-03-24

Applicant: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY

Inventor： Yuuichi KURASHIMA ,  Taisei MOTOMURA ,  Shinya YANAGIMACHI ,  Hideki TAKAGI ,  Eiji HIGURASHI ,  Takashi MATSUMAE

IPC: H05H1/10 ,  G04F5/14 ,  H03L7/26

CPC classification number: H05H1/10 ,  G04F5/14 ,  H03L7/26

Abstract: A small plasma source that enables highly efficient discharge in an ultra-high vacuum state includes a first magnet, a second magnet arranged so that a second magnetic pole faces the first magnetic pole of the first magnet, a third magnet having the second magnetic pole directed in the same direction as the first magnetic pole of the first magnet and arranged to surround the first magnet, a fourth magnet having the first magnetic pole different from the second magnetic pole facing the second magnetic pole of the third magnet and arranged to surround the second magnet, a first electrode provided on sides of the first magnetic pole of the first magnet and the second magnetic pole of the third magnet, a second electrode facing the first electrode and provided on sides of the second magnetic pole of the second magnet and the first magnetic pole of the fourth magnet, and a third electrode arranged between the first electrode and the second electrode. A value obtained by dividing a shorter distance between a distance between the first magnet and the second magnet and a distance between the third magnet and the fourth magnet by an average value of thicknesses of the first to fourth magnets is 1 or more and 10 or less.

公开(公告)号：US20160204023A1

公开(公告)日：2016-07-14

申请号：US14902764

申请日：2014-07-03

Applicant: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI ,  SICOXS CORPORATION ,  NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY

Inventor： Ko IMAOKA ,  Motoki KOBAYASHI ,  Hidetsugu UCHIDA ,  Kuniaki YAGI ,  Takamitsu KAWAHARA ,  Naoki HATTA ,  Akiyuki MINAMI ,  Toyokazu SAKATA ,  Tomoatsu MAKINO ,  Hideki TAKAGI ,  Yuuichi KURASHIMA

IPC: H01L21/762 ,  H01L29/16

CPC classification number: H01L21/76251 ,  H01L21/02002 ,  H01L21/187 ,  H01L21/2007 ,  H01L21/76254 ,  H01L29/1608

Abstract: A technique disclosed herein relates to a manufacturing method for a semiconductor substrate having the bonded interface with high bonding strength without forming an oxide layer at the bonded interface also for the substrate having surface that is hardly planarized. The manufacturing method for the semiconductor substrate may include an amorphous layer formation process in which a first amorphous layer is formed by modifying a surface of a support substrate and a second amorphous layer is formed by modifying a surface of a single-crystalline layer of a semiconductor. The manufacturing method may include a contact process in which the first amorphous layer and the second amorphous layer are contacted with each other. The manufacturing method may include a heat treatment process in which the support substrate and single-crystalline layer are heat-treated with the first amorphous layer and the second amorphous layer being in contact with each other.

Abstract translation: 本文公开的技术涉及具有接合界面高的接合界面的半导体基板的制造方法，而在不具有几乎不平坦化的表面的基板上，在接合界面处也不形成氧化物层。 半导体衬底的制造方法可以包括非晶层形成工艺，其中通过修饰支撑衬底的表面形成第一非晶层，并且通过改变半导体的单晶层的表面形成第二非晶层 。 制造方法可以包括其中第一非晶层和第二非晶层彼此接触的接触工艺。 制造方法可以包括其中第一非晶层和第二非晶层彼此接触地对支撑基板和单晶层进行热处理的热处理工艺。

公开(公告)号：US20160042102A1

公开(公告)日：2016-02-11

申请号：US14777176

申请日：2014-07-16

Applicant: MARUBUN CORPORATION ,  TOSHIBA KIKAI KABUSHIKI KAISHA ,  RIKEN ,  NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY ,  ULVAC, INC. ,  TOKYO OHKA KOGYO CO., LTD.

Inventor： Yukio KASHIMA ,  Eriko MATSUURA ,  Mitsunori KOKUBO ,  Takaharu TASHIRO ,  Takafumi OOKAWA ,  Hideki HIRAYAMA ,  Won Sung YOUN ,  Hideki TAKAGI ,  Ryuichiro KAMIMURA ,  Yamato OSADA ,  Satoshi SHIMATANI

IPC: G06F17/50 ,  H01L33/44 ,  G06F17/10 ,  H01L33/50

CPC classification number: H01L33/22 ,  G06F17/10 ,  G06F17/5009 ,  H01L33/24 ,  H01L33/44 ,  H01L33/502 ,  H01L2933/0083

Abstract: A semiconductor light emitting element with a design wavelength of λ, comprising a photonic crystal periodic structure having two structures with different refractive indices at each of one or more interfaces between layers that form the light emitting element. The period a and the radius R that are parameters of each of the one or more periodic structures and the design wavelength λ satisfy Bragg conditions. The ratio (R/a) between the period a and the radius R is a value determined so that a predetermined photonic band gap (PBG) for TE light becomes maximum for each periodic structure. The parameters of each periodic structure are determined so that light extraction efficiency of the entire semiconductor light emitting element with respect to light with the wavelength λ becomes maximum as a result of conducting a simulation analysis with a FDTD method using as variables the depth h of the periodic structure that is of greater than or equal to 0.5a and the period a and the radius R that are determined for each order m of the Bragg conditions.

Abstract translation: 具有设计波长为λ的半导体发光元件，包括在形成发光元件的层之间的一个或多个界面的每一个处具有两个具有不同折射率的结构的光子晶体周期性结构。 作为一个或多个周期结构和设计波长λ中的每一个的参数的周期a和半径R满足布拉格条件。 周期a和半径R之间的比率（R / a）是确定的，使得每个周期性结构的TE光的预定光子带隙（PBG）变得最大。 确定每个周期结构的参数，使得整个半导体发光元件相对于波长λ的光的光提取效率变得最大，作为使用FDTD方法进行模拟分析的结果，使用作为变量的深度h 大于或等于0.5a的周期性结构以及针对布拉格条件的每个阶m确定的周期a和半径R.

公开(公告)号：US20240258195A1

公开(公告)日：2024-08-01

申请号：US18565295

申请日：2022-05-31

Applicant: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY ,  MITSUBISHI ELECTRIC CORPORATION

Inventor： Hideaki YAMADA ,  Akiyoshi CHAYAHARA ,  Yoshiaki MOKUNO ,  Takashi MATSUMAE ,  Yuuichi KURASHIMA ,  Eiji HIGURASHI ,  Hideki TAKAGI ,  Shuichi HIZA ,  Ken IMAMURA ,  Yusuke SHIRAYANAGI ,  Koji YOSHITSUGU ,  Kunihiko NISHIMURA

IPC: H01L23/373 ,  B32B9/00 ,  B32B9/04 ,  B32B37/18 ,  B32B38/00 ,  C30B29/04 ,  C30B29/40 ,  C30B33/00 ,  H01L23/00

CPC classification number: H01L23/3732 ,  B32B9/007 ,  B32B9/04 ,  B32B37/18 ,  C30B29/04 ,  C30B29/406 ,  C30B33/00 ,  H01L24/32 ,  H01L24/83 ,  B32B2038/0064 ,  B32B2457/14 ,  H01L2224/32225 ,  H01L2224/83005

Abstract: This bonded body (10) comprising a mosaic diamond wafer and a semiconductor of a different type is a bonded body in which a mosaic diamond wafer (1) having a coalescence boundary (B1) between a plurality of single-crystal diamond substrates (1A and 1B) and a semiconductor of a different type (2) are bonded together, in which a maximum level difference on a bonding surface (1aa) of the mosaic diamond wafer (1) with the semiconductor of a different type (2) is 10 nm or less.

公开(公告)号：US20240149565A1

公开(公告)日：2024-05-09

申请号：US18550096

申请日：2022-02-18

Applicant: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY

Inventor： Takashi MATSUMAE ,  Hideki TAKAGI ,  Hitoshi UMEZAWA ,  Yuuichi KURASHIMA ,  Eiji HIGURASHI

IPC: B32B18/00 ,  H01L23/373

CPC classification number: B32B18/00 ,  H01L23/3738

Abstract: There is provided a silicon carbide composite body that can be expected to have efficient heat conduction and electrical conduction between bonding base materials. The silicon carbide composite body includes a first base material including silicon carbide having a silicon oxide layer SiOx formed on the surface and a second base material which has an oxide layer MOy with an element M, which is one or more of metals that forms an oxide in the atmosphere (excluding alkali metals and alkaline earth metals), Si, Ge, As, Se, Sb, and C in diamond on the surface, and is bonded to the first base material such that the MOy side faces the SiOx side, and when at least some of C in silicon carbide forms C—O-M bonds and/or at least some of Si in the silicon carbide forms Si—O−M bonds, the second base material is bonded to the first base material.

公开(公告)号：US20220230934A1

公开(公告)日：2022-07-21

申请号：US17609919

申请日：2020-04-17

Applicant: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY

Inventor： Takashi MATSUMAE ,  Hitoshi UMEZAWA ,  Yuuichi KURASHIMA ,  Hideki TAKAGI

IPC: H01L23/373 ,  C30B33/06 ,  C30B29/04 ,  C30B29/06 ,  C30B29/16

Abstract: A composite that includes a base including an oxide layer MOx of an element M on a surface thereof and a diamond crystal base bonded to the surface of the base. The M is one or more selected from among metal elements capable of forming an oxide (excluding alkali metals and alkaline earth metals), Si, Ge, As, Se, Sb, Te, and Bi, and the diamond crystal base is bonded to the surface of the base by M-O-C bonding of at least some C atoms of the (111) surface of the diamond crystal base.

公开(公告)号：US20130115433A1

公开(公告)日：2013-05-09

申请号：US13732655

申请日：2013-01-02

Applicant: National Institute of Advanced Industrial Science and Technology

Inventor： Kazuma KURIHARA ,  Takeshi KOBAYASHI ,  Hideki TAKAGI

IPC: B81C1/00

CPC classification number: B81C1/00015 ,  B29C43/021 ,  B29C43/18 ,  B29C45/14016 ,  B29C45/14639 ,  B29C45/16 ,  B81C99/0085 ,  Y10T428/2486

Abstract: High precision MEMESs can be manufactured in a large amount without requiring a vacuum process or a lithography process. A film is aligned with a die so as to contact with each other. The film has a functional layer and a releasing layer printed thereon. The die is configured to mold a structure which comprises a functional layer retention part retaining the functional layer and a frame supporting the functional layer retention part. The resin filled between the die and the film is cured. Then, the film is separated from the die so that the functional layer is released from the releasing layer and transferred on the resin cured in the die, thereby the structure is formed.

Abstract translation: 可以大量地制造高精度MEMES，而不需要真空工艺或光刻工艺。 将膜与模具对准以便彼此接触。 膜具有印刷在其上的功能层和释放层。 模具被构造成模制包括保持功能层的功能层保持部分和支撑功能层保持部分的框架的结构。 填充在模具和膜之间的树脂固化。 然后，将膜与模具分离，使得功能层从释放层释放并转移到在模具中固化的树脂上，从而形成结构。