公开(公告)号：US20180130909A1

公开(公告)日：2018-05-10

申请号：US15674813

申请日：2017-08-11

Applicant: National Institute of Advanced Industrial Science and Technology ,  WACOM R&D Corporation

Inventor： Shigeki SAKAI ,  Mitsue TAKAHASHI ,  Masaki KUSUHARA ,  Masayuki TODA ,  Masaru UMEDA

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/51 ,  H01L21/28 ,  C23C16/40 ,  H01L21/02

CPC classification number: H01L29/78391 ,  C23C16/40 ,  H01L21/02197 ,  H01L21/02271 ,  H01L27/1159 ,  H01L29/40111 ,  H01L29/516 ,  H01L29/6684

Abstract: A ferroelectric device and a manufacturing method are provided. While holding a nonvolatile memory retention capability and a multiple rewriting endurance as the distinctive features of a ferroelectric device, the disclosed ferroelectric device is wider in memory window and more adaptively made microfiner than a conventional ferroelectric device that has used a ferroelectric mainly constituted of Sr—Bi—Ta—O as an oxide of strontium, bismuth and tantalum. Directly on or with intermediary of an insulator on a semiconductor there are layered a first ferroelectric and a conductor to form a gate stack, the first ferroelectric being mainly constituted of Sr—Ca—Bi—Ta—O as an oxide of strontium, calcium, bismuth and tantalum and being built up by a metal organic vapor deposition technique from a suitable film-forming raw material. The gate stack is heat-treated to cause the first ferroelectric to develop its ferroelectricity.

公开(公告)号：US20170309488A1

公开(公告)日：2017-10-26

申请号：US15493995

申请日：2017-04-21

Applicant: National Institute of Advanced Industrial Science and Technology ,  WACOM R&D Corporation

Inventor： Shigeki SAKAI ,  Mitsue TAKAHASHI ,  Masaki KUSUHARA ,  Masayuki TODA ,  Masaru UMEDA ,  Yoshikazu SASAKI

IPC: H01L21/28 ,  H01L21/02 ,  H01L29/51 ,  H01L29/78 ,  H01L29/49 ,  H01L27/1159

CPC classification number: H01L29/40111 ,  G11C11/223 ,  H01L21/02181 ,  H01L21/02197 ,  H01L21/022 ,  H01L21/02266 ,  H01L21/02271 ,  H01L21/02337 ,  H01L21/02356 ,  H01L27/1159 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/516 ,  H01L29/517 ,  H01L29/518 ,  H01L29/6684 ,  H01L29/78391

Abstract: [Object] To provide a FeFET and a method of its manufacture, the FeFET having a ferroelectric whose film thickness (dr) is made small and so nanofine as to range in: 59 nm

公开(公告)号：US20190273086A1

公开(公告)日：2019-09-05

申请号：US16315784

申请日：2017-07-03

Applicant: National Institute of Advanced Industrial Science and Technology ,  WACOM R&D Corporation

Inventor： Mitsue TAKAHASHI ,  Shigeki SAKAI ,  Masaki KUSUHARA ,  Masayuki TODA ,  Masaru UMEDA ,  Yoshikazu SASAKI

IPC: H01L27/1159 ,  H01L29/49 ,  H01L29/51 ,  H01L29/78 ,  H01L21/28 ,  H01L21/311 ,  H01L29/66

Abstract: A semiconductor memory element is provided including a laminated structure, in which a memory member and a conductor are superposed on a semiconductor substrate. The memory member has a bottom surface in contact with the semiconductor substrate, an upper surface in contact with the conductor, and side surfaces, which are in contact with and surrounded by a partition wall; the bottom surface of the memory member has a width of equal to or not more than 100 nm; a shortest distance between the conductor and the semiconductor substrate is twice or more of the width of the bottom surface of the memory member; the side surface of the memory member has a width, which is either the same as the width of the bottom surface and constant at any position above the bottom surface, or the widest at a position other than the bottom surface and above the bottom surface.

公开(公告)号：US20200279927A1

公开(公告)日：2020-09-03

申请号：US16870308

申请日：2020-05-08

Applicant: National Institute of Advanced Industrial Science and Technology ,  WACOM R&D Corporation

Inventor： Shigeki SAKAI ,  Mitsue TAKAHASHI ,  Masaki KUSUHARA ,  Masayuki TODA ,  Masaru UMEDA ,  Yoshikazu SASAKI

IPC: H01L21/28 ,  H01L29/66 ,  G11C11/22 ,  H01L21/02 ,  H01L29/78 ,  H01L29/51

Abstract: [Object] To provide a FeFET and a method of its manufacture, the FeFET having a ferroelectric whose film thickness (dr) is made small and so nanofine as to range in: 59 nm

公开(公告)号：US20180006130A1

公开(公告)日：2018-01-04

申请号：US15690054

申请日：2017-08-29

Applicant: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY

Inventor： Shigeki SAKAI ,  Wei ZHANG ,  Mitsue TAKAHASHI

IPC: H01L29/51 ,  H01L29/49 ,  H01L21/324 ,  H01L21/28 ,  H01L21/02 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/516 ,  H01L21/02197 ,  H01L21/02266 ,  H01L21/28194 ,  H01L21/28291 ,  H01L21/324 ,  H01L29/495 ,  H01L29/513 ,  H01L29/517 ,  H01L29/6684 ,  H01L29/78391

Abstract: Provided is a ferroelectric field effect transistor (FeFET) which has a wide memory window even if the ferroelectric film thickness is 200 nm or less, and which has excellent data retention characteristics, pulse rewriting endurance and the like. An FeFET which has a structure wherein an insulating body (11) and a gate electrode conductor (4) are sequentially laminated in this order on a semiconductor base (10) that has a source region (12) and a drain region (13). The insulating body (11) is configured by laminating a first insulating body (1) and a second insulating body (2) in this order on the base (10), and the second insulating body (2) is mainly composed of an oxide of strontium, calcium, bismuth and tantalum.

公开(公告)号：US20160247932A1

公开(公告)日：2016-08-25

申请号：US14903769

申请日：2014-07-24

Applicant: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY ,  WACOM R&D CORPORATION

Inventor： Shigeki SAKAI ,  Mitsue TAKAHASHI ,  Masaki KUSUHARA ,  Masayuki TODA ,  Masaru UMEDA

IPC: H01L29/78 ,  H01L21/28 ,  H01L29/66

CPC classification number: H01L29/78391 ,  C23C16/40 ,  H01L21/02197 ,  H01L21/02271 ,  H01L21/28291 ,  H01L27/1159 ,  H01L29/516 ,  H01L29/6684

Abstract: A ferroelectric device and a manufacturing method are provided. While holding a nonvolatile memory retention capability and a multiple rewriting endurance as the distinctive features of a ferroelectric device, the disclosed ferroelectric device is wider in memory window and more adaptively made microfiner than a conventional ferroelectric device that has used a ferroelectric mainly constituted of Sr—Bi—Ta—O as an oxide of strontium, bismuth and tantalum. Directly on or with intermediary of an insulator on a semiconductor there are layered a first ferroelectric and a conductor to form a gate stack, the first ferroelectric being mainly constituted of Sr—Ca—Bi—Ta—O as an oxide of strontium, calcium, bismuth and tantalum and being built up by a metal organic vapor deposition technique from a suitable film-forming raw material. The gate stack is heat-treated to cause the first ferroelectric to develop its ferroelectricity.

Abstract translation: 提供了一种铁电体元件及其制造方法。 在将非易失性存储器保持能力和多次重写耐久性作为铁电体器件的特征的同时，所公开的铁电体器件与使用主要由Sr-型铁电体构成的铁电体的常规铁电体器件相比，在存储窗口中更宽， Bi-Ta-O作为锶，铋和钽的氧化物。 直接在半导体上或具有中间体的半导体上的绝缘体，层叠有第一铁电体和导体以形成栅极堆叠，第一铁电体主要由作为锶，钙，锶的氧化物的Sr-Ca-Bi-Ta-O构成， 铋和钽，并由合适的成膜原料由金属有机气相沉积技术构成。 对栅极叠层进行热处理，使第一铁电体产生铁电性。