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    Method and apparatus for a steam system
    1.
    发明申请
    Method and apparatus for a steam system 有权
    蒸汽系统的方法和装置

    公开(公告)号：US20080223354A1

    公开(公告)日：2008-09-18

    申请号：US12075698

    申请日：2008-03-13

    Applicant: Owen Roger McGhee ,  Chris Hill

    Inventor： Owen Roger McGhee ,  Chris Hill

    IPC: A21B1/24 ,  F28B1/02

    CPC classification number: A21B3/04 ,  F28B9/08

    Abstract: A steam system includes a cooking chamber, a housing comprising a volume of water and an inlet to receive steam, condensate, drain water, and/or weak steam from the cooking chamber, a sensor that detects a temperature of the water, a dispenser that sprays cooling water into the water to reduce the temperature of the water if the temperature exceeds a predetermined level, and an outlet to drain a portion of the water from the housing.

    Abstract translation: 蒸汽系统包括烹饪室，包括大量水的壳体和用于接收来自烹饪室的蒸汽，冷凝水，排水和/或弱蒸汽的入口，检测水的温度的传感器，分配器 如果温度超过预定水平，则将冷却水喷入水中以降低水的温度，以及从壳体排出一部分水的出口。

    Method and apparatus for a steam system
    2.
    发明授权
    Method and apparatus for a steam system 有权
    蒸汽系统的方法和装置

    公开(公告)号：US08387613B2

    公开(公告)日：2013-03-05

    申请号：US12075698

    申请日：2008-03-13

    Applicant: Owen Roger McGhee ,  Chris Hill

    Inventor： Owen Roger McGhee ,  Chris Hill

    IPC: A47J27/00

    CPC classification number: A21B3/04 ,  F28B9/08

    Abstract: A steam system includes a cooking chamber, a housing comprising a volume of water and an inlet to receive steam, condensate, drain water, and/or weak steam from the cooking chamber, a sensor that detects a temperature of the water, a dispenser that sprays cooling water into the water to reduce the temperature of the water if the temperature exceeds a predetermined level, and an outlet to drain a portion of the water from the housing.

    Abstract translation: 蒸汽系统包括烹饪室，包括大量水的壳体和用于接收来自烹饪室的蒸汽，冷凝水，排水和/或弱蒸汽的入口，检测水的温度的传感器，分配器 如果温度超过预定水平，则将冷却水喷入水中以降低水的温度，以及从壳体排出一部分水的出口。

    Method of depositing a silicon dioxide comprising layer doped with at least one of P, B and Ge
    4.
    发明申请
    Method of depositing a silicon dioxide comprising layer doped with at least one of P, B and Ge 有权
    沉积掺杂有P，B和Ge中的至少一种的包含二氧化硅的层的方法

    公开(公告)号：US20060035471A1

    公开(公告)日：2006-02-16

    申请号：US11204509

    申请日：2005-08-16

    Applicant: Chris Hill ,  Weimin Li ,  Gurtej Sandhu

    Inventor： Chris Hill ,  Weimin Li ,  Gurtej Sandhu

    IPC: H01L21/336

    CPC classification number: C23C16/45523 ,  C23C16/401 ,  H01L21/02126 ,  H01L21/02129 ,  H01L21/02271 ,  H01L21/31625

    Abstract: A substrate is positioned within a deposition chamber. At least two gaseous precursors are fed to the chamber which collectively comprise silicon, an oxidizer comprising oxygen and dopant which become part of the deposited doped silicon dioxide. The feeding is over at least two different time periods and under conditions effective to deposit a doped silicon dioxide layer on the substrate. The time periods and conditions are characterized by some period of time when one of said gaseous precursors comprising said dopant is flowed to the chamber in the substantial absence of flowing any of said oxidizer precursor. In one implementation, the time periods and conditions are effective to at least initially deposit a greater quantity of doped silicon dioxide within at least some gaps on the substrate as compared to any doped silicon dioxide deposited atop substrate structure which define said gaps.

    Abstract translation: 衬底位于沉积室内。 将至少两种气体前体进料到共同包含硅的室，包含氧和掺杂剂的氧化剂成为沉积的掺杂二氧化硅的一部分。 进料至少在两个不同的时间段内并且在有效沉积掺杂的二氧化硅层的条件下在基板上。 时间段和条件的特征在于一段时间，其中一种所述包含所述掺杂剂的气态前体在基本上不流动任何所述氧化剂前体的情况下流动到所述室。 在一个实施方案中，与沉积在限定所述间隙的衬底结构上的任何掺杂二氧化硅相比，时间段和条件有效地至少在衬底上的至少一些间隙内沉积更大量的掺杂二氧化硅。

    DOUBLE-SIDED CONTAINER CAPACITORS USING A SACRIFICIAL LAYER
    5.
    发明申请
    DOUBLE-SIDED CONTAINER CAPACITORS USING A SACRIFICIAL LAYER 有权
    双面集装箱电容器使用一个真正的层

    公开(公告)号：US20070117335A1

    公开(公告)日：2007-05-24

    申请号：US11625130

    申请日：2007-01-19

    Applicant: Gurtej Sandhu ,  Kevin Shea ,  Chris Hill ,  Kevin Torek

    Inventor： Gurtej Sandhu ,  Kevin Shea ,  Chris Hill ,  Kevin Torek

    IPC: H01L21/336

    CPC classification number: H01L28/91 ,  H01L27/10852

    Abstract: Double-sided container capacitors are formed using sacrificial layers. A sacrificial layer is formed within a recess in a structural layer. A lower electrode is formed within the recess. The sacrificial layer is removed to create a space to allow access to the sides of the structural layer. The structural layer is removed, creating an isolated lower electrode. The lower electrode can be covered with a capacitor dielectric and upper electrode to form a double-sided container capacitor.

    Abstract translation: 使用牺牲层形成双面容器电容器。 在结构层的凹部内形成牺牲层。 下部电极形成在凹部内。 去除牺牲层以产生允许接近结构层的侧面的空间。 去除结构层，形成隔离的下电极。 下电极可以用电容器电介质和上电极覆盖以形成双面容器电容器。

    Double-sided container capacitors using a sacrificial layer
    7.
    发明申请
    Double-sided container capacitors using a sacrificial layer 有权
    双面容器电容器采用牺牲层

    公开(公告)号：US20060046419A1

    公开(公告)日：2006-03-02

    申请号：US11021639

    申请日：2004-12-22

    Applicant: Gurtej Sandhu ,  Kevin Shea ,  Chris Hill ,  Kevin Torek

    Inventor： Gurtej Sandhu ,  Kevin Shea ,  Chris Hill ,  Kevin Torek

    IPC: H01L21/20

    CPC classification number: H01L28/91 ,  H01L27/10852

    Abstract: Double-sided container capacitors are formed using sacrificial layers. A sacrificial layer is formed within a recess in a structural layer. A lower electrode is formed within the recess. The sacrificial layer is removed to create a space to allow access to the sides of the structural layer. The structural layer is removed, creating an isolated lower electrode. The lower electrode can be covered with a capacitor dielectric and upper electrode to form a double-sided container capacitor.

    Abstract translation: 使用牺牲层形成双面容器电容器。 在结构层的凹部内形成牺牲层。 下部电极形成在凹部内。 去除牺牲层以产生允许接近结构层的侧面的空间。 去除结构层，形成隔离的下电极。 下电极可以用电容器电介质和上电极覆盖以形成双面容器电容器。

    Method of forming trench isolation in the fabrication of integrated circuitry
    8.
    发明申请
    Method of forming trench isolation in the fabrication of integrated circuitry 失效
    在集成电路制造中形成沟槽隔离的方法

    公开(公告)号：US20060008972A1

    公开(公告)日：2006-01-12

    申请号：US11215934

    申请日：2005-08-31

    Applicant: Garo Derderian ,  Chris Hill

    Inventor： Garo Derderian ,  Chris Hill

    IPC: H01L21/8238

    CPC classification number: H01L21/02164 ,  C23C16/0272 ,  C23C16/402 ,  H01L21/02145 ,  H01L21/02214 ,  H01L21/02271 ,  H01L21/31612 ,  H01L21/76227

    Abstract: This invention includes methods of depositing a silicon dioxide comprising layer in the fabrication of integrated circuitry, and to methods of forming trench isolation in the fabrication of integrated circuitry. In one implementation, a method of depositing a silicon dioxide comprising layer in the fabrication of integrated circuitry includes flowing an aluminum containing organic precursor to a chamber containing a semiconductor substrate effective to deposit an aluminum comprising layer over the substrate. An alkoxysilanol is flowed to the substrate comprising the aluminum comprising layer within the chamber effective to deposit a silicon dioxide comprising layer over the substrate. At least one halogen is provided within the chamber during at least one of the aluminum containing organic precursor flowing and the alkoxysilanol flowing under conditions effective to reduce rate of the deposit of the silicon dioxide comprising layer over the substrate than would otherwise occur under identical conditions but for providing the halogen. Other implementations are contemplated.

    Abstract translation: 本发明包括在制造集成电路中沉积含二氧化硅的层的方法以及在集成电路的制造中形成沟槽隔离的方法。 在一个实施方案中，在集成电路的制造中沉积含二氧化硅的层的方法包括将含有铝的有机前体流动到含有半导体衬底的室，该半导体衬底有效地在衬底上沉积含铝层。 烷氧基硅烷流到包含室内的包含铝的基材的基材中，有效地将二氧化硅包含层沉积在基材上。 在含铝的有机前驱体和烷氧基硅烷中的至少一种中，至少有一个卤素在有效地降低衬底上沉积二氧化硅层的条件下流动的条件下流动，这与在相同条件下将会发生的情况相反，但是 用于提供卤素。 考虑其他实现。

    Methods of depositing a silicon dioxide comprising layer in the fabrication of integrated circuitry, and methods of forming trench isolation in the fabrication of integrated circuitry
    10.
    发明申请
    Methods of depositing a silicon dioxide comprising layer in the fabrication of integrated circuitry, and methods of forming trench isolation in the fabrication of integrated circuitry 失效
    在制造集成电路中沉积含二氧化硅的层的方法以及在集成电路的制造中形成沟槽隔离的方法

    公开(公告)号：US20060189159A1

    公开(公告)日：2006-08-24

    申请号：US11404703

    申请日：2006-04-14

    Applicant: Garo Derderian ,  Chris Hill

    Inventor： Garo Derderian ,  Chris Hill

    IPC: H01L21/31

    CPC classification number: H01L21/02164 ,  C23C16/0272 ,  C23C16/402 ,  H01L21/02145 ,  H01L21/02214 ,  H01L21/02271 ,  H01L21/31612 ,  H01L21/76227

    Abstract: This invention includes methods of depositing a silicon dioxide comprising layer in the fabrication of integrated circuitry, and to methods of forming trench isolation in the fabrication of integrated circuitry. In one implementation, a method of depositing a silicon dioxide comprising layer in the fabrication of integrated circuitry includes flowing an aluminum containing organic precursor to a chamber containing a semiconductor substrate effective to deposit an aluminum comprising layer over the substrate. An alkoxysilanol is flowed to the substrate comprising the aluminum comprising layer within the chamber effective to deposit a silicon dioxide comprising layer over the substrate. At least one halogen is provided within the chamber during at least one of the aluminum containing organic precursor flowing and the alkoxysilanol flowing under conditions effective to reduce rate of the deposit of the silicon dioxide comprising layer over the substrate than would otherwise occur under identical conditions but for providing the halogen. Other implementations are contemplated.

    Abstract translation: 本发明包括在制造集成电路中沉积含二氧化硅的层的方法以及在集成电路的制造中形成沟槽隔离的方法。 在一个实施方案中，在集成电路的制造中沉积含二氧化硅的层的方法包括将含有铝的有机前体流动到含有半导体衬底的室，该半导体衬底有效地在衬底上沉积含铝层。 烷氧基硅烷流到包含室内的包含铝的基材的基材中，有效地将二氧化硅包含层沉积在基材上。 在含铝的有机前驱体和烷氧基硅烷中的至少一种中，至少有一个卤素在有效地降低衬底上沉积二氧化硅层的条件下流动的条件下流动，这与在相同条件下将会发生的情况相反，但是 用于提供卤素。 考虑其他实现。

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