公开(公告)号：US20150194483A1

公开(公告)日：2015-07-09

申请号：US14663140

申请日：2015-03-19

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： RYO KAJITANI ,  TETSUZO UEDA ,  YOSHIHARU ANDA ,  NAOHIRO TSURUMI ,  SATOSHI NAKAZAWA

IPC: H01L29/06 ,  H01L29/78 ,  H01L29/40 ,  H01L29/51 ,  H01L29/20 ,  H01L29/205

CPC classification number: H01L29/0611 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/402 ,  H01L29/404 ,  H01L29/51 ,  H01L29/66462 ,  H01L29/7786 ,  H01L29/78

Abstract: An object is to achieve an increase in gain by reducing a current collapse, and reducing Cgd and Rg. A semiconductor device according to the present invention includes a substrate; a first semiconductor layer disposed on the substrate and made of a Group III nitride semiconductor; a second semiconductor layer disposed on the first semiconductor layer and made of a Group III nitride semiconductor; a gate electrode, a source electrode, and a drain electrode disposed on the second semiconductor layer; a first field plate electrode disposed on the second semiconductor layer; and a second field plate electrode disposed on the first field plate electrode, in which the first field plate electrode and the second field plate electrode are disposed between the gate electrode and the drain electrode.

Abstract translation: 目的是通过减少电流崩溃来实现增益的增加，并减少Cgd和Rg。 根据本发明的半导体器件包括：衬底; 设置在所述基板上并由III族氮化物半导体构成的第一半导体层; 设置在第一半导体层上并由III族氮化物半导体构成的第二半导体层; 设置在所述第二半导体层上的栅电极，源电极和漏电极; 设置在所述第二半导体层上的第一场板电极; 以及设置在第一场极板电极上的第二场极板电极，其中第一场极板电极和第二场极板电极设置在栅电极和漏电极之间。

公开(公告)号：US20170098703A1

公开(公告)日：2017-04-06

申请号：US15381120

申请日：2016-12-16

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： MASAHIRO OGAWA ,  MASAHIRO ISHIDA ,  DAISUKE SHIBATA ,  RYO KAJITANI

IPC: H01L29/778 ,  H01L21/02 ,  H01L29/04 ,  H01L29/20 ,  H01L29/205

CPC classification number: H01L29/7787 ,  H01L21/02414 ,  H01L21/02428 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02658 ,  H01L29/045 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/7786 ,  H01L29/7847

Abstract: Provided is a semiconductor device in which electron mobility is improved by applying sufficiently large tensile stress in a predetermined direction without occurrence of cracks in a nitride semiconductor. The semiconductor device includes: substrate (101), electron transit layer (103) that is disposed on substrate (101) and is formed by GaN; and electron supply layer (104) that is disposed on electron transit layer (103) and is formed by AlGaN. A coefficient of thermal expansion of substrate (101) is different between a first direction in a main surface of substrate (101) and a second direction that is perpendicular to the first direction in the main surface, and tensile stress occurs in electron transit layer (103).