Analog varactor
    1.
    发明申请
    Analog varactor 有权
    模拟变容二极管

    公开(公告)号:US20070057743A1

    公开(公告)日:2007-03-15

    申请号:US11227421

    申请日:2005-09-14

    IPC分类号: H03B5/12

    摘要: An oscillator includes a plurality of varactor cells to receive a control signal to control a frequency of the oscillator. Each of the varactor cells includes a switch that includes a first terninal to receive the control signal and a second terminal such that the switch operates to control a capacitance of the varactor cell in response to a voltage between the first and second terminals. The oscillator includes a bias circuit to provide a different bias voltage to each second terminal and an amplifier that is coupled to the varactor cells to generate an oscillating signal.

    摘要翻译: 振荡器包括多个变容二极管单元,用于接收控制信号以控制振荡器的频率。 每个变容二极管单元包括开关,该开关包括用于接收控制信号的第一三极管和第二端子,使得开关操作以响应于第一和第二端子之间的电压来控制变容二极管单元的电容。 振荡器包括偏置电路,以向每个第二端子提供不同的偏置电压,以及耦合到变容二极管单元以产生振荡信号的放大器。

    PARTITIONING OF RADIO-FREQUENCY APPARATUS
    2.
    发明申请
    PARTITIONING OF RADIO-FREQUENCY APPARATUS 有权
    无线电频率设备的分配

    公开(公告)号:US20070054629A1

    公开(公告)日:2007-03-08

    申请号:US10730404

    申请日:2003-12-08

    IPC分类号: H04B1/38

    摘要: Components of a radio-frequency (RF) apparatus including transceiver circuitry and frequency modification circuitry of a crystal oscillator circuit that generates a reference signal with adjustable frequency may be partitioned in a variety of ways, for example, as one or more separate integrated circuits. The frequency modification circuitry may be implemented as part of a crystal oscillator circuit that includes digitally controlled crystal oscillator (“DCXO”) circuitry and a crystal. The frequency modification circuitry may include at least one variable capacitance device and may be employed to generate a reference signal with adjustable frequency. The adjustable reference signal may be provided to other components of the RF apparatus and/or the RF apparatus may be configured to provide the adjustable reference signal to baseband processor circuitry. Automatic frequency control (AFC) circuitry may be integrated with other components of RF circuitry and may generate frequency control signals for the frequency modification circuitry based on, for example, a signal received from a temperature sensor. Digital-to-analog converter (DAC) circuitry may be integrated with other components of RF circuitry to enable all-digital frequency control communications from baseband processor circuitry to RF circuitry.

    摘要翻译: 包括生成具有可变频率的参考信号的晶体振荡器电路的收发器电路和频率修改电路的射频(RF)设备的组件可以以各种方式被划分,例如作为一个或多个单独的集成电路。 频率修改电路可以被实现为包括数字控制的晶体振荡器(“DCXO”)电路和晶体的晶体振荡器电路的一部分。 频率修改电路可以包括至少一个可变电容器件,并且可以用于产生具有可调频率的参考信号。 可调参考信号可以被提供给RF装置的其他部件,和/或RF装置可以被配置为向基带处理器电路提供可调参考信号。 自动频率控制(AFC)电路可以与RF电路的其它组件集成,并且可以基于例如从温度传感器接收的信号来生成用于频率修改电路的频率控制信号。 数模转换器(DAC)电路可以与RF电路的其他部件集成,以实现从基带处理器电路到RF电路的全数字频率控制通信。

    Voltage regulator with shunt feedback
    3.
    发明申请
    Voltage regulator with shunt feedback 有权
    具有并联反馈的稳压器

    公开(公告)号:US20070052396A1

    公开(公告)日:2007-03-08

    申请号:US11220958

    申请日:2005-09-07

    IPC分类号: G05F1/613

    CPC分类号: G05F1/613

    摘要: A voltage regulator configured to receive a supply voltage from a voltage supply and provide a regulated voltage to digital circuitry is provided. The voltage regulator comprises first circuitry configured to inhibit high frequency energy generated by the digital circuitry from transmitting into the voltage supply, second circuitry configured to inhibit low frequency energy generated by the digital circuitry from transmitting into the voltage supply, and third circuitry configured to maintain the regulated voltage at a substantially constant value in response to a current drawn by the digital circuitry.

    摘要翻译: 提供了一种电压调节器,其被配置为从电压源接收电源电压并向数字电路提供调节电压。 电压调节器包括被配置为禁止由数字电路产生的高频能量传送到电压源中的第一电路,被配置为禁止由数字电路产生的低频能量传输到电压源中的第二电路,以及被配置为维持 响应于由数字电路汲取的电流,调节电压处于基本恒定的值。

    Radio frequency CMOS buffer circuit and method
    5.
    发明申请
    Radio frequency CMOS buffer circuit and method 失效
    射频CMOS缓冲电路及方法

    公开(公告)号:US20050212581A1

    公开(公告)日:2005-09-29

    申请号:US10809195

    申请日:2004-03-25

    IPC分类号: G02B6/26 H03K19/0185

    CPC分类号: H03K19/018571

    摘要: A buffer (40) includes a capacitor (42) having a first terminal for receiving an input signal, and a second terminal; a first transistor (44) having a first current electrode for receiving a first power supply voltage, a control electrode coupled to the second terminal of the capacitor (42), and a second current electrode for providing an output signal of the buffer (40); and a second transistor (45) having a first current electrode coupled to the second current electrode of the first transistor (44), a control electrode coupled to the second terminal of the capacitor (42), and a second current electrode for receiving a second power supply voltage. A capacitance of the capacitor (42) is chosen to reduce a peak-to-peak voltage swing of the input signal such that a peak-to-peak voltage swing at the control electrodes of the first (44) and second (45) transistors is less than or equal to a difference between the first and second power supply voltages.

    摘要翻译: 缓冲器(40)包括具有用于接收输入信号的第一端子的电容器(42)和第二端子; 第一晶体管(44),具有用于接收第一电源电压的第一电流电极,耦合到电容器(42)的第二端子的控制电极和用于提供缓冲器(40)的输出信号的第二电流电极, ; 以及第二晶体管(45),其具有耦合到所述第一晶体管(44)的所述第二电流电极的第一电流电极,耦合到所述电容器(42)的所述第二端子的控制电极和用于接收第二晶体管 电源电压。 选择电容器(42)的电容以减小输入信号的峰 - 峰电压摆幅,使得在第一(44)和第(45)晶体管的控制电极处的峰 - 峰电压摆幅 小于或等于第一和第二电源电压之间的差。

    DIGITALLY CONTROLLED OSCILLATOR
    6.
    发明申请
    DIGITALLY CONTROLLED OSCILLATOR 有权
    数字控制振荡器

    公开(公告)号:US20130043958A1

    公开(公告)日:2013-02-21

    申请号:US13210280

    申请日:2011-08-15

    IPC分类号: H03B5/12

    摘要: A digitally controlled oscillator is provided. The digitally controlled oscillator includes a pair of transistors cross-coupled to each other, a switched capacitor array coupled to the pair of transistors and a plurality of frequency tracking units coupled to the pair of transistors. The pair of transistors provides an output signal. The switched capacitor array tunes a frequency of the output signal. The frequency tracking units tune the frequency of the output signal to a target frequency. At least one of the frequency tracking units is capable of selectively providing a first capacitance and a second capacitance. A tuning resolution of the frequency tracking unit is determined by a difference between the first and second capacitances.

    摘要翻译: 提供数字控制振荡器。 数字控制振荡器包括彼此交叉耦合的一对晶体管,耦合到该对晶体管的开关电容器阵列和耦合到该对晶体管的多个频率跟踪单元。 一对晶体管提供输出信号。 开关电容阵列调节输出信号的频率。 频率跟踪单元将输出信号的频率调谐到目标频率。 频率跟踪单元中的至少一个能够选择性地提供第一电容和第二电容。 频率跟踪单元的调谐分辨率由第一和第二电容之间的差确定。

    INTEGRATED CIRCUIT DEVICE, ELECTRONIC DEVICE AND METHOD FOR COMPENSATING FREQUENCY DRIFT OF A CONTROLLABLE OSCILLATOR
    7.
    发明申请
    INTEGRATED CIRCUIT DEVICE, ELECTRONIC DEVICE AND METHOD FOR COMPENSATING FREQUENCY DRIFT OF A CONTROLLABLE OSCILLATOR 审中-公开
    集成电路装置,电子装置和用于补偿可控振荡器的频率干扰的方法

    公开(公告)号:US20120074998A1

    公开(公告)日:2012-03-29

    申请号:US13115126

    申请日:2011-05-25

    IPC分类号: H03L7/08

    摘要: An integrated circuit device for compensating frequency drift of a controllable oscillator is described. The integrated circuit device includes at least one compensation module including: an input for receiving at least an indication of a frequency control signal (vci) from at least one frequency control module; and an output for providing at least one compensation signal (vct) to the controllable oscillator. The at least one compensation module is arranged to compare the at least indication of the frequency control signal (vci) with a reference voltage signal (vref); and generate the at least one compensation signal (vct) based at least partly on the comparison of the indication of the frequency control signal (vci) to the reference voltage signal (vref).

    摘要翻译: 描述了用于补偿可控振荡器的频率漂移的集成电路装置。 集成电路装置包括至少一个补偿模块,包括:用于从至少一个频率控制模块接收至少一个频率控制信号(vci)的指示的输入; 以及用于向可控振荡器提供至少一个补偿信号(vct)的输出。 所述至少一个补偿模块被布置为将所述频率控制信号(vci)的所述至少指示与参考电压信号(vref)进行比较; 并且至少部分地基于频率控制信号(vci)的指示与参考电压信号(vref)的比较来生成至少一个补偿信号(vct)。

    SYSTEM AND METHOD FOR BIASING ELECTRICAL CIRCUITS
    9.
    发明申请
    SYSTEM AND METHOD FOR BIASING ELECTRICAL CIRCUITS 失效
    用于偏置电路的系统和方法

    公开(公告)号:US20050212585A1

    公开(公告)日:2005-09-29

    申请号:US10810039

    申请日:2004-03-26

    CPC分类号: H03F1/301 H03B5/04

    摘要: A bias system is disclosed including a calibration bus to which a controller, a reference bias source, a master bias source, and first and second slave bias sources are coupled. The controller varies a control code sent over the calibration bus to the master bias source until a particular control code is found that causes the bias signal of the master bias source to equal a desired bias value which is provided by the reference bias source. The controller then sends the particular control code to the first and second slave bias sources to cause the first and second slave bias sources to generate a bias signal having the same desired bias value as the master bias source. Isolation between load circuits coupled to the first and second bias sources is thus enhanced while providing low noise, stable operation

    摘要翻译: 公开了一种偏置系统,其包括校准总线,控制器,参考偏置源,主偏置源以及第一和第二从属偏置源耦合到校准总线。 控制器将通过校准总线发送的控制代码改变为主偏置源,直到找到导致主偏置源的偏置信号等于由参考偏置源提供的期望偏置值的特定控制代码。 然后,控制器将特定控制码发送到第一和第二从属偏置源,以使第一和第二从属偏置源产生具有与主偏置源相同的期望偏置值的偏置信号。 因此,耦合到第一和第二偏置源的负载电路之间的隔离增强,同时提供低噪声,稳定的操作

    Clock generating apparatus and frequency calibrating method of the clock generating apparatus
    10.
    发明授权
    Clock generating apparatus and frequency calibrating method of the clock generating apparatus 有权
    时钟发生装置和时钟发生装置的频率校准方法

    公开(公告)号:US08570107B2

    公开(公告)日:2013-10-29

    申请号:US13299347

    申请日:2011-11-17

    IPC分类号: H03L7/087 H03L7/085

    摘要: A clock generating apparatus includes: a time-to-digital converter (TDC) arranged to convert a timing difference between a reference clock and a variable clock to generate a digital value; a calibrating device arranged to generate a control signal according to the digital value and the reference clock; a controllable oscillator arranged to generate an oscillating signal according to the control signal and the digital value; and a feedback device arranged to generate the variable clock to the TDC according to the oscillating signal, and the calibrating device calibrates the controllable oscillator to make the oscillating signal have a target oscillating frequency.

    摘要翻译: 时钟发生装置包括:时间数字转换器(TDC),被配置为转换参考时钟和可变时钟之间的定时差以产生数字值; 校准装置,被配置为根据数字值和参考时钟产生控制信号; 可控振荡器,被配置为根据控制信号和数字值产生振荡信号; 以及反馈装置,其被配置为根据振荡信号向TDC生成可变时钟,并且校准装置校准可控振荡器以使振荡信号具有目标振荡频率。