公开(公告)号：US20190006532A1

公开(公告)日：2019-01-03

申请号：US15748994

申请日：2016-07-28

Applicant: Photonics Electronics Technology Research Association

Inventor： Shigekazu Okumura ,  Tohru Mogami ,  Keizo Kinoshita ,  Tsuyoshi Horikawa ,  Junichi Fujikata

IPC: H01L31/028 ,  H01L31/036 ,  H01L31/105 ,  H01L31/109 ,  H01L31/0232

CPC classification number: H01L31/028 ,  H01L31/02327 ,  H01L31/036 ,  H01L31/105 ,  H01L31/1055 ,  H01L31/1085 ,  H01L31/109

Abstract: Provided is an optical device in which an Si cap layer is provided on a Ge layer, and which is capable of effectively reducing dark current, while having a good effect on prevention of production line contamination by Ge. One embodiment of the optical device according to the present invention is provided with: a semiconductor layer which contains Ge and has a (001) surface and a facet surface between the (001) surface and a (110) surface; and a cap layer which is formed from Si, and which is formed on the (001) surface and the facet surface of the semiconductor layer. The ratio of the film thickness of the cap layer on the facet surface to the film thickness of the cap layer on the (001) surface is 0.4 or more; and the film thickness of the cap layer on the (001) surface is from 9 nm to 30 nm (inclusive).

公开(公告)号：US09985149B2

公开(公告)日：2018-05-29

申请号：US15244853

申请日：2016-08-23

Applicant: Renesas Electronics Corporation ,  Photonics Electronics Technology Research Association

Inventor： Tatsuya Usami ,  Yoshiaki Yamamoto ,  Keiji Sakamoto ,  Tohru Mogami ,  Tsuyoshi Horikawa ,  Keizo Kinoshita

IPC: H01L31/0232 ,  H01L31/18 ,  G02B6/12 ,  G02B6/136 ,  G02B6/122

CPC classification number: H01L31/02327 ,  G02B6/12004 ,  G02B6/122 ,  G02B6/136 ,  G02B2006/12061 ,  G02B2006/12123 ,  H01L31/1808

Abstract: A performance of a semiconductor device is improved. In a method of manufacturing a semiconductor device, a first semiconductor portion and a second semiconductor portion made of silicon are formed on a base body via an insulation layer, and a third semiconductor portion including a semiconductor layer made of germanium is formed on the second semiconductor portion. Next, an insulation film is formed above the first semiconductor portion, an opening portion reaching the first semiconductor portion from an upper surface of the insulation film is formed, and a metal silicide layer is formed on a part of an upper surface of the first semiconductor portion exposed to the opening portion.

公开(公告)号：US10247882B2

公开(公告)日：2019-04-02

申请号：US15692062

申请日：2017-08-31

Applicant: NEC CORPORATION ,  Photonics Electronics Technology Research Association

Inventor： Tsuyoshi Horikawa ,  Tohru Mogami ,  Keizo Kinoshita

IPC: G02B6/13 ,  G02B6/132 ,  C23C14/08 ,  C23C14/48 ,  G02B6/122 ,  G02B6/12

Abstract: Provided is an optical waveguide circuit avoiding the difficulty of the property compensation based on temperature control, compensated with respect to the property variations due to fabrication error, particularly paid attention in a silicon waveguide, and being low in power consumption and high in performances. The optical waveguide circuit includes a silicon (Si) substrate, a buried oxide film (BOX) layer formed on the Si substrate, and an SOI (Silicon on Insulator) layer, formed on the BOX layer, including an optical element utilizing the SOI layer as a main optical transmission medium. At least part of a waveguide of the optical element includes uniformly distributed and thermally unstable crystal defects.

公开(公告)号：US10162110B2

公开(公告)日：2018-12-25

申请号：US15243718

申请日：2016-08-22

Applicant: Renesas Electronics Corporation ,  Photonics Electronics Technology Research Association

Inventor： Tatsuya Usami ,  Keiji Sakamoto ,  Yoshiaki Yamamoto ,  Shinichi Watanuki ,  Masaru Wakabayashi ,  Tohru Mogami ,  Tsuyoshi Horikawa ,  Keizo Kinoshita

IPC: G02B6/12 ,  G02B6/132 ,  G02B6/136

Abstract: A semiconductor device is provided with an insulating layer formed on a base substrate, an optical waveguide composed of a semiconductor layer formed on the insulating layer, and an insulating film formed along an upper surface of the insulating layer and a front surface of the optical waveguide. A peripheral edge portion of a lower surface of the optical waveguide is separated from the insulating layer, and the insulating film is buried between the peripheral edge portion and the insulating layer.

公开(公告)号：US10078182B2

公开(公告)日：2018-09-18

申请号：US15243746

申请日：2016-08-22

Applicant: Renesas Electronics Corporation ,  Photonics Electronics Technology Research Association

Inventor： Shinichi Watanuki ,  Akira Mitsuiki ,  Atsuro Inada ,  Tohru Mogami ,  Tsuyoshi Horikawa ,  Keizo Kinoshita

IPC: G02B6/12 ,  G02B6/136 ,  G02B6/122 ,  G02F1/025

CPC classification number: G02B6/136 ,  G02B6/12004 ,  G02B6/122 ,  G02B2006/12061 ,  G02B2006/12097 ,  G02F1/025 ,  G02F2201/063 ,  G02F2201/066 ,  G02F2202/105

Abstract: When an optical waveguide is formed, an area of an opening of a resist mask is equal to an area of a semiconductor layer for a dummy pattern exposed from the resist mask, and the semiconductor layer for the dummy pattern exposed from the resist mask has a uniform thickness in a region in which the dummy pattern is formed. As a result, an effective pattern density does not change in etching the semiconductor layer for the dummy pattern, and accordingly, it is possible to form a rib-shaped optical waveguide having desired dimensions and a desired shape.

公开(公告)号：US11177623B2

公开(公告)日：2021-11-16

申请号：US16659077

申请日：2019-10-21

Applicant: FUJITSU LIMITED ,  NEC Corporation ,  Photonics Electronics Technology Research Association

Inventor： Nobuaki Hatori ,  Keizo Kinoshita

IPC: G02B6/12 ,  G02B6/42 ,  H01S5/00 ,  G02B6/43 ,  H01S5/042 ,  G02B1/116

Abstract: An optical device includes a light-emitting element; an electronic circuit chip; a substrate on which the light-emitting element and the electronic circuit chip are mounted; a first electrode formed on a first mounting surface of the light-emitting element on the substrate; and a second electrode formed on a second mounting surface of the electronic circuit chip on the substrate. The first electrode and the second electrode have the same structure.

公开(公告)号：US10340399B2

公开(公告)日：2019-07-02

申请号：US15748994

申请日：2016-07-28

Applicant: PHOTONICS ELECTRONICS TECHNOLOGY RESEARCH ASSOCIATION

Inventor： Shigekazu Okumura ,  Tohru Mogami ,  Keizo Kinoshita ,  Tsuyoshi Horikawa ,  Junichi Fujikata

IPC: H01L31/028 ,  H01L31/036 ,  H01L31/102 ,  H01L31/105 ,  H01L31/109 ,  H01L31/0232

Abstract: Provided is an optical device in which an Si cap layer is provided on a Ge layer, and which is capable of effectively reducing dark current, while having a good effect on prevention of production line contamination by Ge. One embodiment of the optical device according to the present invention is provided with: a semiconductor layer which contains Ge and has a (001) surface and a facet surface between the (001) surface and a (110) surface; and a cap layer which is formed from Si, and which is formed on the (001) surface and the facet surface of the semiconductor layer. The ratio of the film thickness of the cap layer on the facet surface to the film thickness of the cap layer on the (001) surface is 0.4 or more; and the film thickness of the cap layer on the (001) surface is from 9 nm to 30 nm (inclusive).