Bragg mirror and BAW resonator with a high quality factor on the bragg mirror
    1.
    发明授权
    Bragg mirror and BAW resonator with a high quality factor on the bragg mirror 有权
    布拉格镜和布拉格镜具有高品质因数的BAW谐振器

    公开(公告)号:US08593234B2

    公开(公告)日:2013-11-26

    申请号:US12896361

    申请日:2010-10-01

    IPC分类号: H03H9/15 H03H9/05 H03H9/54

    摘要: A method for manufacturing a bulk acoustic wave resonator, each resonator including: above a substrate, a piezoelectric resonator, and next to the piezoelectric resonator, a contact pad connected to an electrode of the piezoelectric resonator; and, between the piezoelectric resonator and the substrate, a Bragg mirror including at least one conductive layer extending between the pad and the substrate and at least one upper silicon oxide layer extending between the pad and the substrate, the method including the steps of: depositing the upper silicon oxide layer; and decreasing the thickness unevenness of the upper silicon oxide layer due to the deposition method, so that this layer has a same thickness to within better than 2%, and preferably to within better than 1%, at the level of each pad.

    摘要翻译: 一种制造体声波谐振器的方法,每个谐振器包括:在基板上方,压电谐振器上方,并且紧邻压电谐振器,连接到压电谐振器的电极的接触焊盘; 并且在所述压电谐振器和所述基板之间,布拉格反射镜包括在所述焊盘和所述衬底之间延伸的至少一个导电层和在所述焊盘和所述衬底之间延伸的至少一个上部氧化硅层,所述方法包括以下步骤: 上氧化硅层; 并且由于沉积方法而减小上部氧化硅层的厚度不均匀性,使得该层在每个焊盘的水平处具有相同的厚度,优于2%以内,优选在1%以内。

    Semiconductor device comprising a capacitor and an electrical connection via, and fabrication method
    3.
    发明授权
    Semiconductor device comprising a capacitor and an electrical connection via, and fabrication method 有权
    包括电容器和电连接通孔的半导体器件及其制造方法

    公开(公告)号:US08841749B2

    公开(公告)日:2014-09-23

    申请号:US13298823

    申请日:2011-11-17

    摘要: A main blind hole is formed in a front face of a wafer having a rear face. A through capacitor is formed in the main blind hole including a conductive outer electrode, a dielectric intermediate layer, and a filling conductive material forming an inner electrode. Cylindrical portions of the outer electrode, the dielectric intermediate layer and the inner electrode have front ends situated in a plane of the front face of the wafer. A secondary rear hole is formed in the rear face of the wafer to reveal a bottom of the outer electrode. A rear electrical connection is made to contact the bottom of the outer electrode through the secondary rear hole. A through hole via filled with a conductive material is provided adjacent the through capacitor. An electrical connection is made on the rear face between the rear electrical connection and the through hole via.

    摘要翻译: 在具有背面的晶片的正面形成有主盲孔。 在主盲孔中形成贯通电容器,其包括导电外电极,电介质中间层和形成内电极的填充导电材料。 外部电极,电介质中间层和内部电极的圆柱形部分具有位于晶片正面的平面内的前端。 在晶片的背面形成有副后孔以露出外电极的底部。 后电气连接通过次级后孔与外部电极的底部接触。 在贯通电容器附近提供填充有导电材料的通孔通孔。 在后电气连接和通孔通孔之间的后表面上形成电连接。

    METHOD FOR ELECTRICAL CONNECTION BETWEEN ELEMENTS OF A THREE-DIMENSIONAL INTEGRATED STRUCTURE AND CORRESPONDING DEVICE
    4.
    发明申请
    METHOD FOR ELECTRICAL CONNECTION BETWEEN ELEMENTS OF A THREE-DIMENSIONAL INTEGRATED STRUCTURE AND CORRESPONDING DEVICE 有权
    三维集成结构元件与相应器件之间电气连接的方法

    公开(公告)号:US20120320550A1

    公开(公告)日:2012-12-20

    申请号:US13517819

    申请日:2012-06-14

    IPC分类号: H05K1/11 H05K3/36 H05K3/30

    摘要: A link device for three-dimensional integrated structure may include a module having a first end face designed to be in front of a first element of the structure, and a second end face designed to be placed in front of a second element of the structure. The two end faces may be substantially parallel, and the module including a substrate having a face substantially perpendicular to the two end faces and carrying an electrically conducting pattern formed in a metallization level on top of the face and enclosed in an insulating region. The electrically conducting pattern may include a first end part emerging onto the first end face and a second end part emerging onto the second end face and connected to the first end part.

    摘要翻译: 用于三维一体化结构的连杆装置可以包括具有设计成在结构的第一元件的前面的第一端面和设计成放置在结构的第二元件的前面的第二端面的模块。 两个端面可以是基本上平行的,并且该模块包括具有基本上垂直于两个端面的表面的基底,并且承载形成在表面顶部的金属化水平并且封闭在绝缘区域中的导电图案。 导电图案可以包括出现在第一端面上的第一端部和露出到第二端面上并连接到第一端部的第二端部。

    SEMICONDUCTOR DEVICE COMPRISING A CAPACITOR AND AN ELECTRICAL CONNECTION VIA, AND FABRICATION METHOD
    5.
    发明申请
    SEMICONDUCTOR DEVICE COMPRISING A CAPACITOR AND AN ELECTRICAL CONNECTION VIA, AND FABRICATION METHOD 有权
    包含电容器和电气连接的半导体器件,以及制造方法

    公开(公告)号:US20120133021A1

    公开(公告)日:2012-05-31

    申请号:US13298823

    申请日:2011-11-17

    IPC分类号: H01L29/92 H01L21/02

    摘要: A main blind hole is formed in a front face of a wafer having a rear face. A through capacitor is formed in the main blind hole including a conductive outer electrode, a dielectric intermediate layer, and a filling conductive material forming an inner electrode. Cylindrical portions of the outer electrode, the dielectric intermediate layer and the inner electrode have front ends situated in a plane of the front face of the wafer. A secondary rear hole is formed in the rear face of the wafer to reveal a bottom of the outer electrode. A rear electrical connection is made to contact the bottom of the outer electrode through the secondary rear hole. A through hole via filled with a conductive material is provided adjacent the through capacitor. An electrical connection is made on the rear face between the rear electrical connection and the through hole via.

    摘要翻译: 在具有背面的晶片的正面形成有主盲孔。 在主盲孔中形成贯通电容器,其包括导电外电极,电介质中间层和形成内电极的填充导电材料。 外部电极,电介质中间层和内部电极的圆柱形部分具有位于晶片正面的平面内的前端。 在晶片的背面形成有副后孔以露出外电极的底部。 后电气连接通过次级后孔与外部电极的底部接触。 在贯通电容器附近提供填充有导电材料的通孔通孔。 在后电气连接和通孔通孔之间的后表面上形成电连接。

    METHOD FOR MANUFACTURING A BAW RESONATOR WITH A HIGH QUALITY FACTOR
    8.
    发明申请
    METHOD FOR MANUFACTURING A BAW RESONATOR WITH A HIGH QUALITY FACTOR 有权
    具有高质量因子的BAW谐振器的制造方法

    公开(公告)号:US20110080232A1

    公开(公告)日:2011-04-07

    申请号:US12896361

    申请日:2010-10-01

    IPC分类号: H03H9/15 H01L41/22

    摘要: A method for manufacturing a bulk acoustic wave resonator, each resonator including: above a substrate, a piezoelectric resonator, and next to the piezoelectric resonator, a contact pad connected to an electrode of the piezoelectric resonator; and, between the piezoelectric resonator and the substrate, a Bragg mirror including at least one conductive layer extending between the pad and the substrate and at least one upper silicon oxide layer extending between the pad and the substrate, the method including the steps of: depositing the upper silicon oxide layer; and decreasing the thickness unevenness of the upper silicon oxide layer due to the deposition method, so that this layer has a same thickness to within better than 2%, and preferably to within better than 1%, at the level of each pad.

    摘要翻译: 一种制造体声波谐振器的方法,每个谐振器包括:在基板上方,压电谐振器上方,并且紧邻压电谐振器,连接到压电谐振器的电极的接触焊盘; 并且在所述压电谐振器和所述基板之间,布拉格反射镜包括在所述焊盘和所述衬底之间延伸的至少一个导电层和在所述焊盘和所述衬底之间延伸的至少一个上部氧化硅层,所述方法包括以下步骤: 上氧化硅层; 并且由于沉积方法而减小上部氧化硅层的厚度不均匀性,使得该层在每个焊盘的水平处具有相同的厚度,优于2%以内,优选在1%以内。

    Method for electrical connection between elements of a three-dimensional integrated structure and corresponding device
    9.
    发明授权
    Method for electrical connection between elements of a three-dimensional integrated structure and corresponding device 有权
    三维一体化结构元件与相应装置之间的电连接方法

    公开(公告)号:US08988893B2

    公开(公告)日:2015-03-24

    申请号:US13517819

    申请日:2012-06-14

    摘要: A link device for three-dimensional integrated structure may include a module having a first end face designed to be in front of a first element of the structure, and a second end face designed to be placed in front of a second element of the structure. The two end faces may be substantially parallel, and the module including a substrate having a face substantially perpendicular to the two end faces and carrying an electrically conducting pattern formed in a metallization level on top of the face and enclosed in an insulating region. The electrically conducting pattern may include a first end part emerging onto the first end face and a second end part emerging onto the second end face and connected to the first end part.

    摘要翻译: 用于三维一体化结构的连杆装置可以包括具有设计成在结构的第一元件的前面的第一端面和设计成放置在结构的第二元件的前面的第二端面的模块。 两个端面可以是基本上平行的,并且该模块包括具有基本上垂直于两个端面的表面的基底,并且承载形成在表面顶部的金属化水平并且封闭在绝缘区域中的导电图案。 导电图案可以包括出现在第一端面上的第一端部和露出到第二端面上并连接到第一端部的第二端部。

    METHOD FOR MANUFACTURING BAW RESONATORS ON A SEMICONDUCTOR WAFER
    10.
    发明申请
    METHOD FOR MANUFACTURING BAW RESONATORS ON A SEMICONDUCTOR WAFER 审中-公开
    在半导体波形上制造BAW谐振器的方法

    公开(公告)号:US20110080233A1

    公开(公告)日:2011-04-07

    申请号:US12896382

    申请日:2010-10-01

    IPC分类号: H03H9/17 H01L41/22

    摘要: A method for manufacturing a wafer on which are formed resonators, each resonator including, above a semiconductor substrate, a stack of layers including, in the following order from the substrate surface: a Bragg mirror; a compensation layer made of a material having a temperature coefficient of the acoustic velocity of a sign opposite to that of all the other stack layers; and a piezoelectric resonator, the method including the successive steps of: a) depositing the compensation layer; and b) decreasing thickness inequalities of the compensation layer due to the deposition method, so that this layer has a same thickness to within better than 2%, and preferably to within better than 1%, at the level of each resonator.

    摘要翻译: 一种制造晶片的方法,其上形成有谐振器,每个谐振器包括在半导体衬底上方的一叠层,其从衬底表面依次包括:布拉格反射镜; 由具有与所有其它堆叠层相反的符号的声速的温度系数的材料制成的补偿层; 和压电谐振器,该方法包括以下连续步骤:a)沉积补偿层; 和b)由于沉积方法而减小补偿层的厚度不等式,使得该层在每个谐振器的电平上具有相同的厚度,优于2%以内,优选在1%以内。