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16 条记录 (耗时 0.012 秒)

    Integrated microelectronic device with through-vias
    1.
    发明授权
    Integrated microelectronic device with through-vias 失效
    具有通孔的集成微电子器件

    公开(公告)号：US08410574B2

    公开(公告)日：2013-04-02

    申请号：US12961730

    申请日：2010-12-07

    申请人： Alexis Farcy ,  Maxime Rousseau

    发明人： Alexis Farcy ,  Maxime Rousseau

    IPC分类号： H01L29/00 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

    CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00012 ,  H01L2924/00

    摘要： An integrated microelectronic device is formed from a substrate having a first side and a second side and including a doped active zone (2) in the first side of the substrate. A circuit component is situated in the doped active zone. A through silicon via extends between the second side and the first side, the via being electrically isolated from the substrate by an insulating layer. A buffer zone is situated between the insulating layer and the doped active zone. This buffer zone is positioned under a shallow trench isolation zone provided around the doped active zone. The buffer zone functions to reduce the electrical coupling between the through silicon via and the doped active zone.

    摘要翻译： 集成微电子器件由具有第一侧和第二侧的衬底形成，并且在衬底的第一侧包括掺杂的有源区（2）。 电路元件位于掺杂的有源区。 通孔硅通孔在第二侧和第一侧之间延伸，通孔由绝缘层与衬底电隔离。 缓冲区位于绝缘层和掺杂活性区之间。 该缓冲区位于设置在掺杂活性区周围的浅沟槽隔离区的下方。 缓冲区用于减少贯穿硅通孔和掺杂有源区之间的电耦合。

    Integrated capacitor with a high breakdown voltage
    3.
    发明申请
    Integrated capacitor with a high breakdown voltage 审中-公开
    具有高击穿电压的集成电容器

    公开(公告)号：US20070096253A1

    公开(公告)日：2007-05-03

    申请号：US11436117

    申请日：2006-05-17

    申请人： Joaquin Torres ,  Alexis Farcy

    发明人： Joaquin Torres ,  Alexis Farcy

    IPC分类号： H01L29/00

    CPC分类号： H01L28/91 ,  H01L27/0805 ,  H01L28/65

    摘要： A capacitor incorporated into an integrated electronic circuit comprises two plates and a series of intermediate layers placed between the plates. The intermediate layers are alternately insulating layers and conducting layers, and each conducting layer is electrically isolated from the rest of the circuit. Such a capacitor may have a high breakdown voltage.

    摘要翻译： 并入集成电子电路中的电容器包括两个板和放置在板之间的一系列中间层。 中间层是交替绝缘层和导电层，并且每个导电层与电路的其余部分电隔离。 这种电容器可能具有高击穿电压。

    Integrated circuit comprising an auxiliary component, for example a passive component or a microelectromechanical system, placed above an electronic chip, and the corresponding fabrication process
    4.
    发明授权
    Integrated circuit comprising an auxiliary component, for example a passive component or a microelectromechanical system, placed above an electronic chip, and the corresponding fabrication process 有权
    包括放置在电子芯片上方的辅助部件，例如无源部件或微机电系统的集成电路，以及相应的制造工艺

    公开(公告)号：US06846690B2

    公开(公告)日：2005-01-25

    申请号：US10308482

    申请日：2002-12-03

    申请人： Alexis Farcy ,  Philippe Coronel ,  Pascal Ancey ,  Joaquin Torres

    发明人： Alexis Farcy ,  Philippe Coronel ,  Pascal Ancey ,  Joaquin Torres

    IPC分类号： B81B7/00 ,  B81C3/00 ,  H01L21/00 ,  H01L21/30

    CPC分类号： B81C1/0023 ,  B29C2043/5825

    摘要： The fabrication of an integrated circuit includes a first phase of producing an electronic chip and a second phase of producing at least one auxiliary component placed above the chip and of producing a protective cover which covers the auxiliary component. The first phase of producing the chip is effected from a first semiconductor substrate and comprises the formation of a cavity lying in a chosen region of the chip and emerging at the upper surface of the chip. The second production phase includes the production of the auxiliary component from a second semiconductor substrate, separate from the first, and then the placement in the cavity of the auxiliary component supported by the second substrate and the mutual adhesion of the second substrate to the upper surface of the chip lying outside the cavity. The second substrate then also forms the protective cover.

    摘要翻译： 集成电路的制造包括制造电子芯片的第一阶段和产生放置在芯片上方的至少一个辅助部件并产生覆盖辅助部件的保护盖的第二阶段。 制造芯片的第一阶段从第一半导体衬底实现，并且包括形成位于芯片的选定区域中并且出现在芯片的上表面处的空腔。 第二生产阶段包括从第二半导体衬底生产辅助部件，与第一半导体衬底分离，然后放置在由第二衬底支撑的辅助部件的空腔中，以及将第二衬底与上表面的相互粘合 的芯片位于腔外。 第二基板然后也形成保护盖。

    High-frequency line
    8.
    发明授权
    High-frequency line 有权
    高频线

    公开(公告)号：US06949444B2

    公开(公告)日：2005-09-27

    申请号：US10117782

    申请日：2002-04-05

    申请人： Joaquim Torres ,  Vincent Arnal ,  Alexis Farcy

    发明人： Joaquim Torres ,  Vincent Arnal ,  Alexis Farcy

    IPC分类号： H01L21/3205 ,  H01L23/522 ,  H01L21/76

    CPC分类号： H01L23/522 ,  H01L21/32051 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method for forming at least one conductive line intended to receive high-frequency or high-value currents, formed above a given portion of a solid substrate outside of which are formed other elements, including the steps of digging at least one trench in the solid substrate; forming an insulating area in the trench; and forming said conductive line above the insulating area.

    摘要翻译： 一种用于形成用于接收高频或高电流电流的至少一条导线的方法，其形成在固体衬底的给定部分之上，其外部形成其它元件，包括以下步骤：在固体中挖掘至少一个沟槽 基质; 在沟槽中形成绝缘区域; 以及在所述绝缘区域上方形成所述导电线。