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    Continuous time common mode feedback circuit, system, and method
    1.
    发明申请
    Continuous time common mode feedback circuit, system, and method 有权
    连续时间共模反馈电路，系统和方法

    公开(公告)号：US20080068083A1

    公开(公告)日：2008-03-20

    申请号：US11900929

    申请日：2007-09-12

    申请人： Pratap Singh ,  Chandrajit Debnath ,  Rakesh Malik ,  Ashish Sharma

    发明人： Pratap Singh ,  Chandrajit Debnath ,  Rakesh Malik ,  Ashish Sharma

    IPC分类号： H03F3/45

    CPC分类号： H03F1/3211 ,  H03F3/45192 ,  H03F3/45659 ,  H03F2200/513 ,  H03F2203/45082 ,  H03F2203/45424 ,  H03F2203/45428 ,  H03F2203/45521 ,  H03F2203/45642 ,  H03F2203/45681

    摘要： Embodiments of the present invention provide a low voltage continuous time common mode feedback (CMFB) module, for low voltage operational amplifiers, providing good linearity, wide bandwidth and low systematic offset. The common mode feedback module includes a controlling module and an initializing module. The controlling module and the initializing module are parallel common mode feedback loops. The controlling module is a main CMFB loop and the initializing module is an auxiliary CMFB loop and both the loops work simultaneously. The controlling module and the initializing module receive a first differential input voltage and a second differential input voltage supplied by differential outputs of a main differential amplifier. Both the CMFB loops are low gain amplifiers in order to provide operation as linear as possible over the entire differential output operating range of the main differential amplifier.

    摘要翻译： 本发明的实施例为低电压运算放大器提供低电压连续时间共模反馈（CMFB）模块，提供良好的线性度，宽带宽和低系统偏移。 共模反馈模块包括控制模块和初始化模块。 控制模块和初始化模块是并联共模反馈回路。 控制模块是主CMFB循环，初始化模块是辅助CMFB循环，两个循环同时工作。 控制模块和初始化模块接收由主差分放大器的差分输出提供的第一差分输入电压和第二差分输入电压。 CMFB环路都是低增益放大器，以便在主差分放大器的整个差分输出工作范围内提供尽可能线性的操作。

    Continuous time common-mode feedback module and method with wide swing and good linearity
    2.
    发明申请
    Continuous time common-mode feedback module and method with wide swing and good linearity 有权
    连续时间共模反馈模块和方法具有宽摆幅和良好的线性度

    公开(公告)号：US20080074189A1

    公开(公告)日：2008-03-27

    申请号：US11900928

    申请日：2007-09-12

    申请人： Pratap Singh ,  Chandrajit Debnath ,  Rakesh Malik

    发明人： Pratap Singh ,  Chandrajit Debnath ,  Rakesh Malik

    IPC分类号： H03F3/45

    CPC分类号： H03F3/45659 ,  H03F1/3211 ,  H03F3/45183 ,  H03F2203/45404 ,  H03F2203/45418 ,  H03F2203/45424 ,  H03F2203/45428 ,  H03F2203/45434 ,  H03F2203/45521 ,  H03F2203/45642 ,  H03F2203/45681

    摘要： A continuous time common mode feedback module is capable of operating in a wide range of input voltages. The common mode feedback module includes a common mode detector and an amplifier for computing and amplifying the difference of a reference voltage and a common mode voltage of a first input signal and a second input signal. The common-mode feedback module includes a common mode resolver and a control voltage generating module coupled to each other to provide a common mode feedback voltage. The common mode feedback module provides a good linearity and a wide bandwidth, without compensation requirements. The common mode feedback module also provides small process corner dependence of bias current and a common mode offset.

    摘要翻译： 连续时间共模反馈模块能够在宽范围的输入电压下工作。 共模反馈模块包括共模检测器和用于计算和放大第一输入信号和第二输入信号的参考电压和共模电压的差的放大器。 共模反馈模块包括共模分解器和彼此耦合以提供共模反馈电压的控制电压产生模块。 共模反馈模块提供良好的线性度和宽带宽，无需补偿要求。 共模反馈模块还提供偏置电流和共模偏移的小过程角依赖性。

    Continuous time common-mode feedback module and method with wide swing and good linearity
    4.
    发明授权
    Continuous time common-mode feedback module and method with wide swing and good linearity 有权
    连续时间共模反馈模块和方法具有宽摆幅和良好的线性度

    公开(公告)号：US07671676B2

    公开(公告)日：2010-03-02

    申请号：US11900928

    申请日：2007-09-12

    申请人： Pratap N Singh ,  Chandrajit Debnath ,  Rakesh Malik

    发明人： Pratap N Singh ,  Chandrajit Debnath ,  Rakesh Malik

    IPC分类号： H03F3/45

    CPC分类号： H03F3/45659 ,  H03F1/3211 ,  H03F3/45183 ,  H03F2203/45404 ,  H03F2203/45418 ,  H03F2203/45424 ,  H03F2203/45428 ,  H03F2203/45434 ,  H03F2203/45521 ,  H03F2203/45642 ,  H03F2203/45681

    摘要： A continuous time common mode feedback module is capable of operating in a wide range of input voltages. The common mode feedback module includes a common mode detector and an amplifier for computing and amplifying the difference of a reference voltage and a common mode voltage of a first input signal and a second input signal. The common-mode feedback module includes a common mode resolver and a control voltage generating module coupled to each other to provide a common mode feedback voltage. The common mode feedback module provides a good linearity and a wide bandwidth, without compensation requirements. The common mode feedback module also provides small process corner dependence of bias current and a common mode offset.

    摘要翻译： 连续时间共模反馈模块能够在宽范围的输入电压下工作。 共模反馈模块包括共模检测器和用于计算和放大第一输入信号和第二输入信号的参考电压和共模电压的差的放大器。 共模反馈模块包括共模分解器和彼此耦合以提供共模反馈电压的控制电压产生模块。 共模反馈模块提供良好的线性度和宽带宽，无需补偿要求。 共模反馈模块还提供偏置电流和共模偏移的小过程角依赖性。

    Reduction in kickback effect in comparators
    6.
    发明授权
    Reduction in kickback effect in comparators 有权
    比较者减少反冲效应

    公开(公告)号：US08120385B2

    公开(公告)日：2012-02-21

    申请号：US12512824

    申请日：2009-07-30

    申请人： Pratap Singh ,  Chandrajit Debnath

    发明人： Pratap Singh ,  Chandrajit Debnath

    IPC分类号： G01R19/00

    CPC分类号： H03K3/356139 ,  H03K3/013

    摘要： The present disclosure relates to reduction in the effect of kickback in comparators by means of charge injection implemented by means of voltage controlled switches with attributes similar to those of an input differential pair. The voltage controlled switches produce charge to neutralize the charge loss during latching of inputs in the comparator.

    摘要翻译： 本公开涉及通过借助于具有与输入差分对的属性类似的电压控制开关实现的电荷注入来减少比较器中反冲的影响。 电压控制开关产生电荷以中和比较器中的输入锁存期间的电荷损失。

    Continuous time common mode feedback circuit, system, and method
    7.
    发明授权
    Continuous time common mode feedback circuit, system, and method 有权
    连续时间共模反馈电路，系统和方法

    公开(公告)号：US07652535B2

    公开(公告)日：2010-01-26

    申请号：US11900929

    申请日：2007-09-12

    申请人： Pratap N Singh ,  Chandrajit Debnath ,  Rakesh Malik ,  Ashish Kumar Sharma

    发明人： Pratap N Singh ,  Chandrajit Debnath ,  Rakesh Malik ,  Ashish Kumar Sharma

    IPC分类号： H03F3/45

    CPC分类号： H03F1/3211 ,  H03F3/45192 ,  H03F3/45659 ,  H03F2200/513 ,  H03F2203/45082 ,  H03F2203/45424 ,  H03F2203/45428 ,  H03F2203/45521 ,  H03F2203/45642 ,  H03F2203/45681

    摘要： Embodiments of the present invention provide a low voltage continuous time common mode feedback (CMFB) module, for low voltage operational amplifiers, providing good linearity, wide bandwidth and low systematic offset. The common mode feedback module includes a controlling module and an initializing module. The controlling module and the initializing module are parallel common mode feedback loops. The controlling module is a main CMFB loop and the initializing module is an auxiliary CMFB loop and both the loops work simultaneously. The controlling module and the initializing module receive a first differential input voltage and a second differential input voltage supplied by differential outputs of a main differential amplifier. Both the CMFB loops are low gain amplifiers in order to provide operation as linear as possible over the entire differential output operating range of the main differential amplifier.

    摘要翻译： 本发明的实施例为低电压运算放大器提供低电压连续时间共模反馈（CMFB）模块，提供良好的线性度，宽带宽和低系统偏移。 共模反馈模块包括控制模块和初始化模块。 控制模块和初始化模块是并联共模反馈回路。 控制模块是主CMFB循环，初始化模块是辅助CMFB循环，两个循环同时工作。 控制模块和初始化模块接收由主差分放大器的差分输出提供的第一差分输入电压和第二差分输入电压。 CMFB环路都是低增益放大器，以便在主差分放大器的整个差分输出工作范围内提供尽可能线性的操作。

    REDUCTION IN KICKBACK EFFECT IN COMPARATORS
    8.
    发明申请
    REDUCTION IN KICKBACK EFFECT IN COMPARATORS 有权
    在比较器中减少KICKBACK效应

    公开(公告)号：US20110032136A1

    公开(公告)日：2011-02-10

    申请号：US12512824

    申请日：2009-07-30

    申请人： Pratap Singh ,  Chandrajit Debnath

    发明人： Pratap Singh ,  Chandrajit Debnath

    IPC分类号： H03M1/12 ,  H03K5/22

    CPC分类号： H03K3/356139 ,  H03K3/013

    摘要： The present disclosure relates to reduction in the effect of kickback in comparators by means of charge injection implemented by means of voltage controlled switches with attributes similar to those of an input differential pair. The voltage controlled switches produce charge to neutralize the charge loss during latching of inputs in the comparator.

    摘要翻译： 本公开涉及通过借助于具有与输入差分对的属性类似的电压控制开关实现的电荷注入来减少比较器中反冲的影响。 电压控制开关产生电荷以中和比较器中的输入锁存期间的电荷损失。

    Calibration method and circuit
    9.
    发明授权
    Calibration method and circuit 有权
    校准方法和电路

    公开(公告)号：US08576102B2

    公开(公告)日：2013-11-05

    申请号：US13310932

    申请日：2011-12-05

    申请人： Chandrajit Debnath ,  Pratap Narayan Singh

    发明人： Chandrajit Debnath ,  Pratap Narayan Singh

    IPC分类号： H03M1/10

    CPC分类号： H03M1/1038 ,  H03M1/46

    摘要： An analog input signal is sampled, and the sampled analog input signal is converted to a digital value. A calibration value is also sampled, and a single bit of an N bit offset value is calculated from the sampled calibration value. The sampling operations are alternatively performed so that one bit of the offset value is generated for each generated digital value. For example, the process is repeated N times to calculate all N bits of the offset value while generating N digital values.

    摘要翻译： 对模拟输入信号进行采样，并将采样的模拟输入信号转换为数字值。 还对采样的校准值进行采样，并根据采样的校准值计算N位偏移值的单个位。 替代地执行采样操作，使得针对每个产生的数字值产生偏移值的一个位。 例如，该过程重复N次以计算偏移值的所有N位，同时生成N个数字值。

    Switched charge storage element network
    10.
    发明授权
    Switched charge storage element network 有权
    开关电荷存储元件网络

    公开(公告)号：US08421519B2

    公开(公告)日：2013-04-16

    申请号：US12615991

    申请日：2009-11-10

    申请人： Chandrajit Debnath ,  Anubhuti Rangbulla

    发明人： Chandrajit Debnath ,  Anubhuti Rangbulla

    IPC分类号： H03K5/00

    CPC分类号： G06G7/18

    摘要： A switched charge storage element integrator in a continuous or discrete time circuit, the integrator including a differential input amplifier, a first 2-terminal charge storage element, a second 2-terminal charge storage element, and a plurality of controlled switches. The differential input amplifier is coupled to a capacitor and a resistor and configured as an inverting integrator. An inverting terminal of the amplifier is coupled to two controlled switches. A non-inverting terminal of the amplifier is coupled to a reference voltage. The first and second switched charge storage element blocks are alternatingly coupled to the inverting terminal INM of the amplifier XOPA during the active state of a second clock signal and a first clock signal, respectively, for making the supply noise continuous and eliminating its dependency on the clock phases, thereby zeroing its convolution with the clock signal.

    摘要翻译： 一种在连续或离散时间电路中的开关电荷存储元件积分器，所述积分器包括差分输入放大器，第一2端电荷存储元件，第二二端电荷存储元件和多个受控开关。 差分输入放大器耦合到电容器和电阻器，并被配置为反相积分器。 放大器的反相端子耦合到两个受控开关。 放大器的非反相端子耦合到参考电压。 第一和第二开关电荷存储元件块分别在第二时钟信号和第一时钟信号的有效状态下交替耦合到放大器XOPA的反相端INM，以使供电噪声连续并且消除其对 时钟相位，从而使其与时钟信号的卷积归零。