公开(公告)号：US11095301B1

公开(公告)日：2021-08-17

申请号：US16945090

申请日：2020-07-31

Applicant: QUALCOMM Incorporated

Inventor： Yongjian Tang ,  Chieh-Yu Hsieh ,  Lei Sun ,  Anand Meruva ,  Seyed Arash Mirhaj ,  Yuhua Guo ,  Dinesh Jagannath Alladi

IPC: H03M1/12 ,  H03M1/10 ,  H03M1/06 ,  H03M1/00

Abstract: Certain aspects provide a circuit for analog-to-digital conversion. The circuit generally includes a flash analog-to-digital converter (ADC) having a plurality of comparators, each comparator being configured to compare an input voltage to a reference voltage; and a calibration circuit coupled to the flash ADC and configured to tune the reference voltage prior to a conversion operation by the flash ADC.

公开(公告)号：US12095893B2

公开(公告)日：2024-09-17

申请号：US17946798

申请日：2022-09-16

Applicant: QUALCOMM Incorporated

Inventor： Anand Meruva ,  Jeffrey Mark Hinrichs

IPC: H04L7/00 ,  G06F13/42

CPC classification number: H04L7/0025 ,  H04L7/0029 ,  G06F13/4291

Abstract: A phase interpolator includes a sampling circuit configured to capture samples of an output of the phase interpolator, a delay circuit configured to delay sampling by the sampling circuit, a comparator configured to provide a comparison signal that indicates whether voltage of the samples exceed a reference voltage, and a counter responsive to the comparison signal and configured to provide an output that controls an operating point of the phase interpolator. The phase interpolator my further include a pair of driver circuits configured to concurrently drive the output of the phase interpolator.

公开(公告)号：US10312927B1

公开(公告)日：2019-06-04

申请号：US15935988

申请日：2018-03-26

Applicant: QUALCOMM Incorporated

Inventor： Seyed Arash Mirhaj ,  Elias Dagher ,  Yongjian Tang ,  Dinesh Alladi ,  Masoud Ensafdaran ,  Lei Sun ,  Anand Meruva ,  Yuhua Guo ,  Balasubramanian Sivakumar

IPC: H03K4/08 ,  H03M1/10

Abstract: Certain aspects of the present disclosure provide methods and apparatus for calibrating time-interleaved analog-to-digital converter (ADC) circuits and generating a suitable signal for such calibration. Certain aspects provide a signal generator for calibrating a time-interleaved ADC circuit having a plurality of channels. The signal generator generally includes a pattern generator configured to receive a periodic signal and to output a bitstream based on the periodic signal and a conversion circuit having an input coupled to an output of the pattern generator and configured to generate a waveform based on the bitstream. The bitstream has a bit pattern with a total number of bits that shares no common factor with a number of the channels and includes a relatively lower frequency component combined with a relatively higher frequency component.

公开(公告)号：US12095467B2

公开(公告)日：2024-09-17

申请号：US17974460

申请日：2022-10-26

Applicant: QUALCOMM Incorporated

Inventor： Anand Meruva ,  Jeffrey Mark Hinrichs ,  Prince Mathew

IPC: H03L7/081 ,  H03K5/131 ,  H03K5/134 ,  H03K5/00

CPC classification number: H03L7/0814 ,  H03K5/131 ,  H03K5/134 ,  H03L7/0818 ,  H03K2005/00058

Abstract: A delay buffer includes a delay device having an input, an output, and a current terminal. The delay buffer also includes a current circuit coupled between a rail and the current terminal. The current circuit includes transistors and switches. Each one of the switches is coupled in series with a respective one of the transistors between the rail and the current terminal.

公开(公告)号：US11916558B1

公开(公告)日：2024-02-27

申请号：US18080728

申请日：2022-12-13

Applicant: QUALCOMM Incorporated

Inventor： Yong Xu ,  Boris Dimitrov Andreev ,  Vikas Mahendiyan ,  Yuxin Li ,  Anand Meruva ,  Jeffrey Mark Hinrichs

IPC: H03L7/00 ,  G06F1/12 ,  H03K19/20 ,  H03L7/081

CPC classification number: H03L7/0812 ,  G06F1/12 ,  H03K19/20

Abstract: A method for clock switching includes propagating a first clock signal through a first clock path, propagating a second clock signal through a second clock path, generating a first delay control signal based on the first clock signal, and generating a second delay control signal based on the second clock signal. The method also includes, in a first mode, coupling the first clock path to a delay circuit and inputting the first delay control signal to a control input of the delay circuit. The method also includes, in a second mode, coupling the second clock path to the delay circuit and inputting the second delay control signal to the control input of the delay circuit.

公开(公告)号：US20160252409A1

公开(公告)日：2016-09-01

申请号：US14634371

申请日：2015-02-27

Applicant: QUALCOMM, Incorporated

Inventor： Li Lu ,  Masoud Roham ,  Liang Dai ,  Anand Meruva

IPC: G01K19/00 ,  G01K7/22

CPC classification number: G01K19/00 ,  G01K7/01 ,  G01K7/22 ,  G01K15/005 ,  G05F3/225

Abstract: Systems and methods for sensing temperature on a chip are described herein. In one aspect, a temperature sensing system includes a sensing circuit with matching diode devices for providing corresponding diode voltages proportional to currents through the diode devices. The system also includes a digital code calculation unit for generating a plurality of digital code values based on first and second reference voltages and the diode voltages and a digital calibration engine configured for computing a calibrated temperature based on the plurality of digital codes. The system further includes a switching circuit for routing the diode voltages, during first and second times, to diode voltage input terminals of the digital code calculation unit.

Abstract translation: 本文描述了用于感测芯片上的温度的系统和方法。 在一个方面，温度感测系统包括具有匹配二极管器件的感测电路，用于提供与通过二极管器件的电流成比例的相应的二极管电压。 该系统还包括一个数字代码计算单元，用于基于第一和第二参考电压和二极管电压产生多个数字代码值，以及数字校准引擎，被配置为基于多个数字代码来计算校准温度。 该系统还包括用于在第一次和第二次期间将二极管电压布置到数字代码计算单元的二极管电压输入端的开关电路。