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公开(公告)号:US20240355781A1
公开(公告)日:2024-10-24
申请号:US18628469
申请日:2024-04-05
Applicant: QUALCOMM Incorporated
Inventor: Yangyang SUN , Xuefeng ZHANG , Jun CHEN , Lily ZHAO
IPC: H01L25/065 , H01L23/00 , H01L23/31 , H01L23/498
CPC classification number: H01L25/0657 , H01L23/3128 , H01L23/49816 , H01L24/05 , H01L24/13 , H01L2224/05009 , H01L2224/05025 , H01L2224/13009 , H01L2224/13025 , H01L2225/06513 , H01L2225/06562 , H01L2924/1306 , H01L2924/1434 , H01L2924/15311 , H01L2924/182
Abstract: A device includes an integrated device. The integrated device includes a die that is at least partially encapsulated. The die includes a conductive pad. The device also includes a first passivation layer coupled to a first surface of the die. The device includes an offset interconnect extending along a surface of the first passivation layer and including a portion that extends through an opening in the first passivation layer to contact the conductive pad. The device includes a bump including a portion that extends through an opening in a second passivation layer to contact the offset interconnect. The bump is offset, in a direction along a surface of the second passive layer, from the conductive pad.
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公开(公告)号:US20210118834A1
公开(公告)日:2021-04-22
申请号:US17071432
申请日:2020-10-15
Applicant: QUALCOMM Incorporated
Inventor: Yangyang SUN , John HOLMES , Xuefeng ZHANG , Dongming HE
IPC: H01L23/00
Abstract: Disclosed are devices, fabrication methods and design rules for flip-chip devices. Aspects include an apparatus including a flip-chip device. The flip-chip device including a die having a plurality of under bump metallizations (UBMs). A package substrate having a plurality of bond pads is also included. A plurality of solder joints coupling the die to the package substrate. The plurality of solder joints are formed from a plurality of solder bumps plated on the plurality of UBMs, where the plurality of solder bumps are directly connected to the plurality of bond pads.
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公开(公告)号:US20240105688A1
公开(公告)日:2024-03-28
申请号:US17952163
申请日:2022-09-23
Applicant: QUALCOMM Incorporated
Inventor: Xia LI , Xuefeng ZHANG , Aniket PATIL
IPC: H01L25/10 , H01L23/00 , H01L23/498 , H01L23/538
CPC classification number: H01L25/105 , H01L23/49816 , H01L23/49833 , H01L23/49838 , H01L23/5381 , H01L23/5385 , H01L23/5386 , H01L24/08 , H01L24/16 , H01L2224/08145 , H01L2224/08235 , H01L2224/16146 , H01L2224/16227 , H01L2224/16235 , H01L2224/16238 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2225/107 , H01L2924/182 , H01L2924/37001
Abstract: A package comprising a substrate comprising at least one dielectric layer and a plurality of interconnects, a first chiplet coupled to the substrate, a second chiplet coupled to the first chiplet, an encapsulation layer coupled to the substrate, the first chiplet and the second chiplet, a plurality of encapsulation interconnects located in the encapsulation layer, a metallization portion coupled to the encapsulation layer, the second chiplet and the plurality of encapsulation interconnects and a first integrated device coupled to the metallization portion.
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公开(公告)号:US20240429141A1
公开(公告)日:2024-12-26
申请号:US18340556
申请日:2023-06-23
Applicant: QUALCOMM Incorporated
Inventor: Xia LI , Xuefeng ZHANG , Aniket PATIL
IPC: H01L23/498 , H01L23/00 , H01L23/31 , H01L23/538 , H01L25/065
Abstract: A device comprising a package. The package comprises a package substrate; a first integrated device coupled to the package substrate through a first plurality of bump interconnects; an encapsulation layer at least partially encapsulating the first integrated device; a plurality of post interconnects located in the encapsulation layer; a metallization portion coupled to the plurality of post interconnects; a second integrated device coupled to the metallization portion through a second plurality of bump interconnects; and a plurality of side wall interconnects coupled to the encapsulation layer and the metallization portion.
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