公开(公告)号：US3801477A

公开(公告)日：1974-04-02

申请号：US3801477D

申请日：1972-06-23

Applicant: RCA CORP

Inventor： RONEN R ,  JAMES E

IPC: H01L21/60 ,  H01L23/485 ,  B44D1/18 ,  C23B5/48 ,  H01L1/14

CPC classification number: H01L24/82 ,  H01L24/24 ,  H01L2224/24051 ,  H01L2224/24225 ,  H01L2224/24226 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01044 ,  H01L2924/01046 ,  H01L2924/01063 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/00

Abstract: METHOD OF MAKING AN ELECTRICAL LEAD CONNECTION TO THE TOP SURFACE OF A PASSIVATION COATED SEMICONDUCTOR DEVICE CHIP MOUNTED ON A SUBSTRATE, WHERE THE LEAD IS A CONDUCTING METAL PATH EXTENDING ACROSS THE SUBSTRATE AND OVER AN EDGE OF THE CHIP, COMPRISING DEPOSITING A FIRST THIN, ELECTRICALLY CONDUCTIVE LAYER OF METAL OVER BOTH SUBSTRATE AND COATED CHIP, COVERING THE FIRST LAYER OF METAL WITH A THICK LAYER OF PHOTORESIST, REMOVING PORTIONS OF PHOTORESISTS LAYER CONFORMING TO THE DESIRED SHAPE OF THE LEAD, ELECTRODEPOSITING A THICK LAYER OF METAL WHERE THE PHOTORESIST HAS BEEN REMOVED, COVERING THE THICK LAYER OF METAL WITH A LAYER OF A MATERIAL WHICH IS RESISTANT TO A PARTICULAR SOLVENT FOR THE FIRST METAL LAYER, AND TREATING THE CHIP AND SUBSTRATE WITH THE SOLVENT TO REMOVE THAT PART OF THE FIRST METAL LAYER NOT COVERED BY THE RESISTANT MATERIAL.

公开(公告)号：US3837071A

公开(公告)日：1974-09-24

申请号：US32418073

申请日：1973-01-16

Applicant: RCA CORP

Inventor： RONEN R

IPC: H01L21/86 ,  H01L27/088 ,  H01L27/12 ,  H01L29/00 ,  B01J17/00

CPC classification number: H01L27/12 ,  H01L21/86 ,  H01L27/0883 ,  H01L29/00 ,  Y10S148/03 ,  Y10S148/043 ,  Y10S148/049 ,  Y10S148/053 ,  Y10S148/085 ,  Y10S148/122 ,  Y10S148/141

Abstract: A method comprising providing a gate electrode layer of polycrystalline silicon for a SIGFET, depositing a layer of silicon dioxide doped with an impurity of opposite conductivity type on the gate electrode layer and on the surface of the single crystal layer except where the channel of a MOSFET is to be located, diffusing dopant from the doped oxide layer into the gate electrode layer, and into the single crystal layer to form source and drain regions of the transistors, depositing a layer of gate insulating material on the channel region of the MOSFET, and depositing metal on the source and drain regions and on the gates of both transistors.

Abstract translation: 一种方法包括提供用于SIGFET的多晶硅栅极电极层，在栅极电极层和单晶层的表面上沉积掺杂有相反导电类型的杂质的二氧化硅层，除了MOSFET的沟道 将掺杂剂从掺杂的氧化物层扩散到栅极电极层中，并进入单晶层以形成晶体管的源极和漏极区域，在MOSFET的沟道区域上沉积栅极绝缘材料层，以及 在两个晶体管的源极和漏极区域以及栅极上沉积金属。

公开(公告)号：US3740280A

公开(公告)日：1973-06-19

申请号：US3740280D

申请日：1971-05-14

Applicant: RCA CORP

Inventor： RONEN R

IPC: H01L21/00 ,  H01L21/86 ,  H01L7/50

CPC classification number: H01L21/86 ,  H01L21/00 ,  Y10S148/051 ,  Y10S148/085 ,  Y10S148/106 ,  Y10S148/118 ,  Y10S148/15

Abstract: A SEMICONDUCTOR DEVICE IS MADE BY FORMING ON THE SURFACE OF AN ELECTRICAL INSULATING SUBSTRATE A PLURALITY OF SPACED REGIONS OF A SEMICONDUCTOR MATERIAL. A MASKING LAYER IS PROVIDED ON THE SURFACE OF EACH SEMICONDUCTOR REGION. A LAYER OF AN ELECTRICAL INSULATING MATERIAL IS COATED ON THE SURFACE OF THE SUBSTRATE BETWEEN THE AROUND THE SEMICONDUCTOR REGIONS AND OVER THE MASKING LAYERS ON THE SEMICONDUCTOR REGIONS. A PHOTOSENSITIVE RESIST IS COATED OVER THE INSULATING LAYER. OPENINGS ARE PROVIDED IN THE RESIST OVER EACH OF THE SEMICONDUCTOR REGIONS USING THE MASKING LAYERS TO DEFINE THE OPENINGS. THE EXPOSED PORTIONS OF THE INSULATING LAYER OVER EACH OF THE SEMICONDUCTOR REGIONS AND REMOVED LEAVING THE INSULATING LAYER BETWEEN AND AROUND THE SEMICONDUCTOR REGIONS.